#[doc = "Reader of register CHANNEL"]
pub type R = crate::R<u32, super::CHANNEL>;
#[doc = "Writer for register CHANNEL"]
pub type W = crate::W<u32, super::CHANNEL>;
#[doc = "Register CHANNEL `reset()`'s with value 0x8000"]
impl crate::ResetValue for super::CHANNEL {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0x8000
}
}
#[doc = "Reader of field `EVGEN`"]
pub type EVGEN_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `EVGEN`"]
pub struct EVGEN_W<'a> {
w: &'a mut W,
}
impl<'a> EVGEN_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !0x3f) | ((value as u32) & 0x3f);
self.w
}
}
#[doc = "Possible values of the field `PATH`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PATH_A {
#[doc = "Synchronous path"]
SYNCHRONOUS,
#[doc = "Resynchronized path"]
RESYNCHRONIZED,
#[doc = "Asynchronous path"]
ASYNCHRONOUS,
}
impl crate::ToBits<u8> for PATH_A {
#[inline(always)]
fn _bits(&self) -> u8 {
match *self {
PATH_A::SYNCHRONOUS => 0,
PATH_A::RESYNCHRONIZED => 1,
PATH_A::ASYNCHRONOUS => 2,
}
}
}
#[doc = "Reader of field `PATH`"]
pub type PATH_R = crate::R<u8, PATH_A>;
impl PATH_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<u8, PATH_A> {
use crate::Variant::*;
match self.bits {
0 => Val(PATH_A::SYNCHRONOUS),
1 => Val(PATH_A::RESYNCHRONIZED),
2 => Val(PATH_A::ASYNCHRONOUS),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `SYNCHRONOUS`"]
#[inline(always)]
pub fn is_synchronous(&self) -> bool {
*self == PATH_A::SYNCHRONOUS
}
#[doc = "Checks if the value of the field is `RESYNCHRONIZED`"]
#[inline(always)]
pub fn is_resynchronized(&self) -> bool {
*self == PATH_A::RESYNCHRONIZED
}
#[doc = "Checks if the value of the field is `ASYNCHRONOUS`"]
#[inline(always)]
pub fn is_asynchronous(&self) -> bool {
*self == PATH_A::ASYNCHRONOUS
}
}
#[doc = "Write proxy for field `PATH`"]
pub struct PATH_W<'a> {
w: &'a mut W,
}
impl<'a> PATH_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: PATH_A) -> &'a mut W {
use crate::ToBits;
unsafe { self.bits(variant._bits()) }
}
#[doc = "Synchronous path"]
#[inline(always)]
pub fn synchronous(self) -> &'a mut W {
self.variant(PATH_A::SYNCHRONOUS)
}
#[doc = "Resynchronized path"]
#[inline(always)]
pub fn resynchronized(self) -> &'a mut W {
self.variant(PATH_A::RESYNCHRONIZED)
}
#[doc = "Asynchronous path"]
#[inline(always)]
pub fn asynchronous(self) -> &'a mut W {
self.variant(PATH_A::ASYNCHRONOUS)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8);
self.w
}
}
#[doc = "Possible values of the field `EDGSEL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum EDGSEL_A {
#[doc = "No event output when using the resynchronized or synchronous path"]
NO_EVT_OUTPUT,
#[doc = "Event detection only on the rising edge of the signal from the event generator when using the resynchronized or synchronous path"]
RISING_EDGE,
#[doc = "Event detection only on the falling edge of the signal from the event generator when using the resynchronized or synchronous path"]
FALLING_EDGE,
#[doc = "Event detection on rising and falling edges of the signal from the event generator when using the resynchronized or synchronous path"]
BOTH_EDGES,
}
impl crate::ToBits<u8> for EDGSEL_A {
#[inline(always)]
fn _bits(&self) -> u8 {
match *self {
EDGSEL_A::NO_EVT_OUTPUT => 0,
EDGSEL_A::RISING_EDGE => 1,
EDGSEL_A::FALLING_EDGE => 2,
EDGSEL_A::BOTH_EDGES => 3,
}
}
}
#[doc = "Reader of field `EDGSEL`"]
pub type EDGSEL_R = crate::R<u8, EDGSEL_A>;
impl EDGSEL_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> EDGSEL_A {
match self.bits {
0 => EDGSEL_A::NO_EVT_OUTPUT,
1 => EDGSEL_A::RISING_EDGE,
2 => EDGSEL_A::FALLING_EDGE,
3 => EDGSEL_A::BOTH_EDGES,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `NO_EVT_OUTPUT`"]
#[inline(always)]
pub fn is_no_evt_output(&self) -> bool {
*self == EDGSEL_A::NO_EVT_OUTPUT
}
#[doc = "Checks if the value of the field is `RISING_EDGE`"]
#[inline(always)]
pub fn is_rising_edge(&self) -> bool {
*self == EDGSEL_A::RISING_EDGE
}
#[doc = "Checks if the value of the field is `FALLING_EDGE`"]
#[inline(always)]
pub fn is_falling_edge(&self) -> bool {
*self == EDGSEL_A::FALLING_EDGE
}
#[doc = "Checks if the value of the field is `BOTH_EDGES`"]
#[inline(always)]
pub fn is_both_edges(&self) -> bool {
*self == EDGSEL_A::BOTH_EDGES
}
}
#[doc = "Write proxy for field `EDGSEL`"]
pub struct EDGSEL_W<'a> {
w: &'a mut W,
}
impl<'a> EDGSEL_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EDGSEL_A) -> &'a mut W {
use crate::ToBits;
{
self.bits(variant._bits())
}
}
#[doc = "No event output when using the resynchronized or synchronous path"]
#[inline(always)]
pub fn no_evt_output(self) -> &'a mut W {
self.variant(EDGSEL_A::NO_EVT_OUTPUT)
}
#[doc = "Event detection only on the rising edge of the signal from the event generator when using the resynchronized or synchronous path"]
#[inline(always)]
pub fn rising_edge(self) -> &'a mut W {
self.variant(EDGSEL_A::RISING_EDGE)
}
#[doc = "Event detection only on the falling edge of the signal from the event generator when using the resynchronized or synchronous path"]
#[inline(always)]
pub fn falling_edge(self) -> &'a mut W {
self.variant(EDGSEL_A::FALLING_EDGE)
}
#[doc = "Event detection on rising and falling edges of the signal from the event generator when using the resynchronized or synchronous path"]
#[inline(always)]
pub fn both_edges(self) -> &'a mut W {
self.variant(EDGSEL_A::BOTH_EDGES)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 10)) | (((value as u32) & 0x03) << 10);
self.w
}
}
#[doc = "Reader of field `RUNSTDBY`"]
pub type RUNSTDBY_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RUNSTDBY`"]
pub struct RUNSTDBY_W<'a> {
w: &'a mut W,
}
impl<'a> RUNSTDBY_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
self.w
}
}
#[doc = "Reader of field `ONDEMAND`"]
pub type ONDEMAND_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `ONDEMAND`"]
pub struct ONDEMAND_W<'a> {
w: &'a mut W,
}
impl<'a> ONDEMAND_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
self.w
}
}
impl R {
#[doc = "Bits 0:5 - Event Generator Selection"]
#[inline(always)]
pub fn evgen(&self) -> EVGEN_R {
EVGEN_R::new((self.bits & 0x3f) as u8)
}
#[doc = "Bits 8:9 - Path Selection"]
#[inline(always)]
pub fn path(&self) -> PATH_R {
PATH_R::new(((self.bits >> 8) & 0x03) as u8)
}
#[doc = "Bits 10:11 - Edge Detection Selection"]
#[inline(always)]
pub fn edgsel(&self) -> EDGSEL_R {
EDGSEL_R::new(((self.bits >> 10) & 0x03) as u8)
}
#[doc = "Bit 14 - Run in standby"]
#[inline(always)]
pub fn runstdby(&self) -> RUNSTDBY_R {
RUNSTDBY_R::new(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 15 - Generic Clock On Demand"]
#[inline(always)]
pub fn ondemand(&self) -> ONDEMAND_R {
ONDEMAND_R::new(((self.bits >> 15) & 0x01) != 0)
}
}
impl W {
#[doc = "Bits 0:5 - Event Generator Selection"]
#[inline(always)]
pub fn evgen(&mut self) -> EVGEN_W {
EVGEN_W { w: self }
}
#[doc = "Bits 8:9 - Path Selection"]
#[inline(always)]
pub fn path(&mut self) -> PATH_W {
PATH_W { w: self }
}
#[doc = "Bits 10:11 - Edge Detection Selection"]
#[inline(always)]
pub fn edgsel(&mut self) -> EDGSEL_W {
EDGSEL_W { w: self }
}
#[doc = "Bit 14 - Run in standby"]
#[inline(always)]
pub fn runstdby(&mut self) -> RUNSTDBY_W {
RUNSTDBY_W { w: self }
}
#[doc = "Bit 15 - Generic Clock On Demand"]
#[inline(always)]
pub fn ondemand(&mut self) -> ONDEMAND_W {
ONDEMAND_W { w: self }
}
}