rvv-encode 0.2.1

/* Automatically generated by parse_opcodes

python script code: https://github.com/TheWaWaR/riscv-opcodes/blob/1e8fe82b9d61795738b31268b45acbb6dfac5bfe/parse.py#L772-L784
The generate method:

    $ python parse.py rv_v -rust

 */
const MATCH_VAADD_VV: u32 = 0x24002057;
const MASK_VAADD_VV: u32 = 0xfc00707f;
const MATCH_VAADD_VX: u32 = 0x24006057;
const MASK_VAADD_VX: u32 = 0xfc00707f;
const MATCH_VAADDU_VV: u32 = 0x20002057;
const MASK_VAADDU_VV: u32 = 0xfc00707f;
const MATCH_VAADDU_VX: u32 = 0x20006057;
const MASK_VAADDU_VX: u32 = 0xfc00707f;
const MATCH_VADC_VIM: u32 = 0x40003057;
const MASK_VADC_VIM: u32 = 0xfe00707f;
const MATCH_VADC_VVM: u32 = 0x40000057;
const MASK_VADC_VVM: u32 = 0xfe00707f;
const MATCH_VADC_VXM: u32 = 0x40004057;
const MASK_VADC_VXM: u32 = 0xfe00707f;
const MATCH_VADD_VI: u32 = 0x3057;
const MASK_VADD_VI: u32 = 0xfc00707f;
const MATCH_VADD_VV: u32 = 0x57;
const MASK_VADD_VV: u32 = 0xfc00707f;
const MATCH_VADD_VX: u32 = 0x4057;
const MASK_VADD_VX: u32 = 0xfc00707f;
const MATCH_VAMOADDEI16_V: u32 = 0x502f;
const MASK_VAMOADDEI16_V: u32 = 0xf800707f;
const MATCH_VAMOADDEI32_V: u32 = 0x602f;
const MASK_VAMOADDEI32_V: u32 = 0xf800707f;
const MATCH_VAMOADDEI64_V: u32 = 0x702f;
const MASK_VAMOADDEI64_V: u32 = 0xf800707f;
const MATCH_VAMOADDEI8_V: u32 = 0x2f;
const MASK_VAMOADDEI8_V: u32 = 0xf800707f;
const MATCH_VAMOANDEI16_V: u32 = 0x6000502f;
const MASK_VAMOANDEI16_V: u32 = 0xf800707f;
const MATCH_VAMOANDEI32_V: u32 = 0x6000602f;
const MASK_VAMOANDEI32_V: u32 = 0xf800707f;
const MATCH_VAMOANDEI64_V: u32 = 0x6000702f;
const MASK_VAMOANDEI64_V: u32 = 0xf800707f;
const MATCH_VAMOANDEI8_V: u32 = 0x6000002f;
const MASK_VAMOANDEI8_V: u32 = 0xf800707f;
const MATCH_VAMOMAXEI16_V: u32 = 0xa000502f;
const MASK_VAMOMAXEI16_V: u32 = 0xf800707f;
const MATCH_VAMOMAXEI32_V: u32 = 0xa000602f;
const MASK_VAMOMAXEI32_V: u32 = 0xf800707f;
const MATCH_VAMOMAXEI64_V: u32 = 0xa000702f;
const MASK_VAMOMAXEI64_V: u32 = 0xf800707f;
const MATCH_VAMOMAXEI8_V: u32 = 0xa000002f;
const MASK_VAMOMAXEI8_V: u32 = 0xf800707f;
const MATCH_VAMOMAXUEI16_V: u32 = 0xe000502f;
const MASK_VAMOMAXUEI16_V: u32 = 0xf800707f;
const MATCH_VAMOMAXUEI32_V: u32 = 0xe000602f;
const MASK_VAMOMAXUEI32_V: u32 = 0xf800707f;
const MATCH_VAMOMAXUEI64_V: u32 = 0xe000702f;
const MASK_VAMOMAXUEI64_V: u32 = 0xf800707f;
const MATCH_VAMOMAXUEI8_V: u32 = 0xe000002f;
const MASK_VAMOMAXUEI8_V: u32 = 0xf800707f;
const MATCH_VAMOMINEI16_V: u32 = 0x8000502f;
const MASK_VAMOMINEI16_V: u32 = 0xf800707f;
const MATCH_VAMOMINEI32_V: u32 = 0x8000602f;
const MASK_VAMOMINEI32_V: u32 = 0xf800707f;
const MATCH_VAMOMINEI64_V: u32 = 0x8000702f;
const MASK_VAMOMINEI64_V: u32 = 0xf800707f;
const MATCH_VAMOMINEI8_V: u32 = 0x8000002f;
const MASK_VAMOMINEI8_V: u32 = 0xf800707f;
const MATCH_VAMOMINUEI16_V: u32 = 0xc000502f;
const MASK_VAMOMINUEI16_V: u32 = 0xf800707f;
const MATCH_VAMOMINUEI32_V: u32 = 0xc000602f;
const MASK_VAMOMINUEI32_V: u32 = 0xf800707f;
const MATCH_VAMOMINUEI64_V: u32 = 0xc000702f;
const MASK_VAMOMINUEI64_V: u32 = 0xf800707f;
const MATCH_VAMOMINUEI8_V: u32 = 0xc000002f;
const MASK_VAMOMINUEI8_V: u32 = 0xf800707f;
const MATCH_VAMOOREI16_V: u32 = 0x4000502f;
const MASK_VAMOOREI16_V: u32 = 0xf800707f;
const MATCH_VAMOOREI32_V: u32 = 0x4000602f;
const MASK_VAMOOREI32_V: u32 = 0xf800707f;
const MATCH_VAMOOREI64_V: u32 = 0x4000702f;
const MASK_VAMOOREI64_V: u32 = 0xf800707f;
const MATCH_VAMOOREI8_V: u32 = 0x4000002f;
const MASK_VAMOOREI8_V: u32 = 0xf800707f;
const MATCH_VAMOSWAPEI16_V: u32 = 0x800502f;
const MASK_VAMOSWAPEI16_V: u32 = 0xf800707f;
const MATCH_VAMOSWAPEI32_V: u32 = 0x800602f;
const MASK_VAMOSWAPEI32_V: u32 = 0xf800707f;
const MATCH_VAMOSWAPEI64_V: u32 = 0x800702f;
const MASK_VAMOSWAPEI64_V: u32 = 0xf800707f;
const MATCH_VAMOSWAPEI8_V: u32 = 0x800002f;
const MASK_VAMOSWAPEI8_V: u32 = 0xf800707f;
const MATCH_VAMOXOREI16_V: u32 = 0x2000502f;
const MASK_VAMOXOREI16_V: u32 = 0xf800707f;
const MATCH_VAMOXOREI32_V: u32 = 0x2000602f;
const MASK_VAMOXOREI32_V: u32 = 0xf800707f;
const MATCH_VAMOXOREI64_V: u32 = 0x2000702f;
const MASK_VAMOXOREI64_V: u32 = 0xf800707f;
const MATCH_VAMOXOREI8_V: u32 = 0x2000002f;
const MASK_VAMOXOREI8_V: u32 = 0xf800707f;
const MATCH_VAND_VI: u32 = 0x24003057;
const MASK_VAND_VI: u32 = 0xfc00707f;
const MATCH_VAND_VV: u32 = 0x24000057;
const MASK_VAND_VV: u32 = 0xfc00707f;
const MATCH_VAND_VX: u32 = 0x24004057;
const MASK_VAND_VX: u32 = 0xfc00707f;
const MATCH_VASUB_VV: u32 = 0x2c002057;
const MASK_VASUB_VV: u32 = 0xfc00707f;
const MATCH_VASUB_VX: u32 = 0x2c006057;
const MASK_VASUB_VX: u32 = 0xfc00707f;
const MATCH_VASUBU_VV: u32 = 0x28002057;
const MASK_VASUBU_VV: u32 = 0xfc00707f;
const MATCH_VASUBU_VX: u32 = 0x28006057;
const MASK_VASUBU_VX: u32 = 0xfc00707f;
const MATCH_VCOMPRESS_VM: u32 = 0x5e002057;
const MASK_VCOMPRESS_VM: u32 = 0xfe00707f;
const MATCH_VCPOP_M: u32 = 0x40082057;
const MASK_VCPOP_M: u32 = 0xfc0ff07f;
const MATCH_VDIV_VV: u32 = 0x84002057;
const MASK_VDIV_VV: u32 = 0xfc00707f;
const MATCH_VDIV_VX: u32 = 0x84006057;
const MASK_VDIV_VX: u32 = 0xfc00707f;
const MATCH_VDIVU_VV: u32 = 0x80002057;
const MASK_VDIVU_VV: u32 = 0xfc00707f;
const MATCH_VDIVU_VX: u32 = 0x80006057;
const MASK_VDIVU_VX: u32 = 0xfc00707f;
const MATCH_VFADD_VF: u32 = 0x5057;
const MASK_VFADD_VF: u32 = 0xfc00707f;
const MATCH_VFADD_VV: u32 = 0x1057;
const MASK_VFADD_VV: u32 = 0xfc00707f;
const MATCH_VFCLASS_V: u32 = 0x4c081057;
const MASK_VFCLASS_V: u32 = 0xfc0ff07f;
const MATCH_VFCVT_F_X_V: u32 = 0x48019057;
const MASK_VFCVT_F_X_V: u32 = 0xfc0ff07f;
const MATCH_VFCVT_F_XU_V: u32 = 0x48011057;
const MASK_VFCVT_F_XU_V: u32 = 0xfc0ff07f;
const MATCH_VFCVT_RTZ_X_F_V: u32 = 0x48039057;
const MASK_VFCVT_RTZ_X_F_V: u32 = 0xfc0ff07f;
const MATCH_VFCVT_RTZ_XU_F_V: u32 = 0x48031057;
const MASK_VFCVT_RTZ_XU_F_V: u32 = 0xfc0ff07f;
const MATCH_VFCVT_X_F_V: u32 = 0x48009057;
const MASK_VFCVT_X_F_V: u32 = 0xfc0ff07f;
const MATCH_VFCVT_XU_F_V: u32 = 0x48001057;
const MASK_VFCVT_XU_F_V: u32 = 0xfc0ff07f;
const MATCH_VFDIV_VF: u32 = 0x80005057;
const MASK_VFDIV_VF: u32 = 0xfc00707f;
const MATCH_VFDIV_VV: u32 = 0x80001057;
const MASK_VFDIV_VV: u32 = 0xfc00707f;
const MATCH_VFIRST_M: u32 = 0x4008a057;
const MASK_VFIRST_M: u32 = 0xfc0ff07f;
const MATCH_VFMACC_VF: u32 = 0xb0005057;
const MASK_VFMACC_VF: u32 = 0xfc00707f;
const MATCH_VFMACC_VV: u32 = 0xb0001057;
const MASK_VFMACC_VV: u32 = 0xfc00707f;
const MATCH_VFMADD_VF: u32 = 0xa0005057;
const MASK_VFMADD_VF: u32 = 0xfc00707f;
const MATCH_VFMADD_VV: u32 = 0xa0001057;
const MASK_VFMADD_VV: u32 = 0xfc00707f;
const MATCH_VFMAX_VF: u32 = 0x18005057;
const MASK_VFMAX_VF: u32 = 0xfc00707f;
const MATCH_VFMAX_VV: u32 = 0x18001057;
const MASK_VFMAX_VV: u32 = 0xfc00707f;
const MATCH_VFMERGE_VFM: u32 = 0x5c005057;
const MASK_VFMERGE_VFM: u32 = 0xfe00707f;
const MATCH_VFMIN_VF: u32 = 0x10005057;
const MASK_VFMIN_VF: u32 = 0xfc00707f;
const MATCH_VFMIN_VV: u32 = 0x10001057;
const MASK_VFMIN_VV: u32 = 0xfc00707f;
const MATCH_VFMSAC_VF: u32 = 0xb8005057;
const MASK_VFMSAC_VF: u32 = 0xfc00707f;
const MATCH_VFMSAC_VV: u32 = 0xb8001057;
const MASK_VFMSAC_VV: u32 = 0xfc00707f;
const MATCH_VFMSUB_VF: u32 = 0xa8005057;
const MASK_VFMSUB_VF: u32 = 0xfc00707f;
const MATCH_VFMSUB_VV: u32 = 0xa8001057;
const MASK_VFMSUB_VV: u32 = 0xfc00707f;
const MATCH_VFMUL_VF: u32 = 0x90005057;
const MASK_VFMUL_VF: u32 = 0xfc00707f;
const MATCH_VFMUL_VV: u32 = 0x90001057;
const MASK_VFMUL_VV: u32 = 0xfc00707f;
const MATCH_VFMV_F_S: u32 = 0x42001057;
const MASK_VFMV_F_S: u32 = 0xfe0ff07f;
const MATCH_VFMV_S_F: u32 = 0x42005057;
const MASK_VFMV_S_F: u32 = 0xfff0707f;
const MATCH_VFMV_V_F: u32 = 0x5e005057;
const MASK_VFMV_V_F: u32 = 0xfff0707f;
const MATCH_VFNCVT_F_F_W: u32 = 0x480a1057;
const MASK_VFNCVT_F_F_W: u32 = 0xfc0ff07f;
const MATCH_VFNCVT_F_X_W: u32 = 0x48099057;
const MASK_VFNCVT_F_X_W: u32 = 0xfc0ff07f;
const MATCH_VFNCVT_F_XU_W: u32 = 0x48091057;
const MASK_VFNCVT_F_XU_W: u32 = 0xfc0ff07f;
const MATCH_VFNCVT_ROD_F_F_W: u32 = 0x480a9057;
const MASK_VFNCVT_ROD_F_F_W: u32 = 0xfc0ff07f;
const MATCH_VFNCVT_RTZ_X_F_W: u32 = 0x480b9057;
const MASK_VFNCVT_RTZ_X_F_W: u32 = 0xfc0ff07f;
const MATCH_VFNCVT_RTZ_XU_F_W: u32 = 0x480b1057;
const MASK_VFNCVT_RTZ_XU_F_W: u32 = 0xfc0ff07f;
const MATCH_VFNCVT_X_F_W: u32 = 0x48089057;
const MASK_VFNCVT_X_F_W: u32 = 0xfc0ff07f;
const MATCH_VFNCVT_XU_F_W: u32 = 0x48081057;
const MASK_VFNCVT_XU_F_W: u32 = 0xfc0ff07f;
const MATCH_VFNMACC_VF: u32 = 0xb4005057;
const MASK_VFNMACC_VF: u32 = 0xfc00707f;
const MATCH_VFNMACC_VV: u32 = 0xb4001057;
const MASK_VFNMACC_VV: u32 = 0xfc00707f;
const MATCH_VFNMADD_VF: u32 = 0xa4005057;
const MASK_VFNMADD_VF: u32 = 0xfc00707f;
const MATCH_VFNMADD_VV: u32 = 0xa4001057;
const MASK_VFNMADD_VV: u32 = 0xfc00707f;
const MATCH_VFNMSAC_VF: u32 = 0xbc005057;
const MASK_VFNMSAC_VF: u32 = 0xfc00707f;
const MATCH_VFNMSAC_VV: u32 = 0xbc001057;
const MASK_VFNMSAC_VV: u32 = 0xfc00707f;
const MATCH_VFNMSUB_VF: u32 = 0xac005057;
const MASK_VFNMSUB_VF: u32 = 0xfc00707f;
const MATCH_VFNMSUB_VV: u32 = 0xac001057;
const MASK_VFNMSUB_VV: u32 = 0xfc00707f;
const MATCH_VFRDIV_VF: u32 = 0x84005057;
const MASK_VFRDIV_VF: u32 = 0xfc00707f;
const MATCH_VFREC7_V: u32 = 0x4c029057;
const MASK_VFREC7_V: u32 = 0xfc0ff07f;
const MATCH_VFREDMAX_VS: u32 = 0x1c001057;
const MASK_VFREDMAX_VS: u32 = 0xfc00707f;
const MATCH_VFREDMIN_VS: u32 = 0x14001057;
const MASK_VFREDMIN_VS: u32 = 0xfc00707f;
const MATCH_VFREDOSUM_VS: u32 = 0xc001057;
const MASK_VFREDOSUM_VS: u32 = 0xfc00707f;
const MATCH_VFREDUSUM_VS: u32 = 0x4001057;
const MASK_VFREDUSUM_VS: u32 = 0xfc00707f;
const MATCH_VFRSQRT7_V: u32 = 0x4c021057;
const MASK_VFRSQRT7_V: u32 = 0xfc0ff07f;
const MATCH_VFRSUB_VF: u32 = 0x9c005057;
const MASK_VFRSUB_VF: u32 = 0xfc00707f;
const MATCH_VFSGNJ_VF: u32 = 0x20005057;
const MASK_VFSGNJ_VF: u32 = 0xfc00707f;
const MATCH_VFSGNJ_VV: u32 = 0x20001057;
const MASK_VFSGNJ_VV: u32 = 0xfc00707f;
const MATCH_VFSGNJN_VF: u32 = 0x24005057;
const MASK_VFSGNJN_VF: u32 = 0xfc00707f;
const MATCH_VFSGNJN_VV: u32 = 0x24001057;
const MASK_VFSGNJN_VV: u32 = 0xfc00707f;
const MATCH_VFSGNJX_VF: u32 = 0x28005057;
const MASK_VFSGNJX_VF: u32 = 0xfc00707f;
const MATCH_VFSGNJX_VV: u32 = 0x28001057;
const MASK_VFSGNJX_VV: u32 = 0xfc00707f;
const MATCH_VFSLIDE1DOWN_VF: u32 = 0x3c005057;
const MASK_VFSLIDE1DOWN_VF: u32 = 0xfc00707f;
const MATCH_VFSLIDE1UP_VF: u32 = 0x38005057;
const MASK_VFSLIDE1UP_VF: u32 = 0xfc00707f;
const MATCH_VFSQRT_V: u32 = 0x4c001057;
const MASK_VFSQRT_V: u32 = 0xfc0ff07f;
const MATCH_VFSUB_VF: u32 = 0x8005057;
const MASK_VFSUB_VF: u32 = 0xfc00707f;
const MATCH_VFSUB_VV: u32 = 0x8001057;
const MASK_VFSUB_VV: u32 = 0xfc00707f;
const MATCH_VFWADD_VF: u32 = 0xc0005057;
const MASK_VFWADD_VF: u32 = 0xfc00707f;
const MATCH_VFWADD_VV: u32 = 0xc0001057;
const MASK_VFWADD_VV: u32 = 0xfc00707f;
const MATCH_VFWADD_WF: u32 = 0xd0005057;
const MASK_VFWADD_WF: u32 = 0xfc00707f;
const MATCH_VFWADD_WV: u32 = 0xd0001057;
const MASK_VFWADD_WV: u32 = 0xfc00707f;
const MATCH_VFWCVT_F_F_V: u32 = 0x48061057;
const MASK_VFWCVT_F_F_V: u32 = 0xfc0ff07f;
const MATCH_VFWCVT_F_X_V: u32 = 0x48059057;
const MASK_VFWCVT_F_X_V: u32 = 0xfc0ff07f;
const MATCH_VFWCVT_F_XU_V: u32 = 0x48051057;
const MASK_VFWCVT_F_XU_V: u32 = 0xfc0ff07f;
const MATCH_VFWCVT_RTZ_X_F_V: u32 = 0x48079057;
const MASK_VFWCVT_RTZ_X_F_V: u32 = 0xfc0ff07f;
const MATCH_VFWCVT_RTZ_XU_F_V: u32 = 0x48071057;
const MASK_VFWCVT_RTZ_XU_F_V: u32 = 0xfc0ff07f;
const MATCH_VFWCVT_X_F_V: u32 = 0x48049057;
const MASK_VFWCVT_X_F_V: u32 = 0xfc0ff07f;
const MATCH_VFWCVT_XU_F_V: u32 = 0x48041057;
const MASK_VFWCVT_XU_F_V: u32 = 0xfc0ff07f;
const MATCH_VFWMACC_VF: u32 = 0xf0005057;
const MASK_VFWMACC_VF: u32 = 0xfc00707f;
const MATCH_VFWMACC_VV: u32 = 0xf0001057;
const MASK_VFWMACC_VV: u32 = 0xfc00707f;
const MATCH_VFWMSAC_VF: u32 = 0xf8005057;
const MASK_VFWMSAC_VF: u32 = 0xfc00707f;
const MATCH_VFWMSAC_VV: u32 = 0xf8001057;
const MASK_VFWMSAC_VV: u32 = 0xfc00707f;
const MATCH_VFWMUL_VF: u32 = 0xe0005057;
const MASK_VFWMUL_VF: u32 = 0xfc00707f;
const MATCH_VFWMUL_VV: u32 = 0xe0001057;
const MASK_VFWMUL_VV: u32 = 0xfc00707f;
const MATCH_VFWNMACC_VF: u32 = 0xf4005057;
const MASK_VFWNMACC_VF: u32 = 0xfc00707f;
const MATCH_VFWNMACC_VV: u32 = 0xf4001057;
const MASK_VFWNMACC_VV: u32 = 0xfc00707f;
const MATCH_VFWNMSAC_VF: u32 = 0xfc005057;
const MASK_VFWNMSAC_VF: u32 = 0xfc00707f;
const MATCH_VFWNMSAC_VV: u32 = 0xfc001057;
const MASK_VFWNMSAC_VV: u32 = 0xfc00707f;
const MATCH_VFWREDOSUM_VS: u32 = 0xcc001057;
const MASK_VFWREDOSUM_VS: u32 = 0xfc00707f;
const MATCH_VFWREDUSUM_VS: u32 = 0xc4001057;
const MASK_VFWREDUSUM_VS: u32 = 0xfc00707f;
const MATCH_VFWSUB_VF: u32 = 0xc8005057;
const MASK_VFWSUB_VF: u32 = 0xfc00707f;
const MATCH_VFWSUB_VV: u32 = 0xc8001057;
const MASK_VFWSUB_VV: u32 = 0xfc00707f;
const MATCH_VFWSUB_WF: u32 = 0xd8005057;
const MASK_VFWSUB_WF: u32 = 0xfc00707f;
const MATCH_VFWSUB_WV: u32 = 0xd8001057;
const MASK_VFWSUB_WV: u32 = 0xfc00707f;
const MATCH_VID_V: u32 = 0x5008a057;
const MASK_VID_V: u32 = 0xfdfff07f;
const MATCH_VIOTA_M: u32 = 0x50082057;
const MASK_VIOTA_M: u32 = 0xfc0ff07f;
const MATCH_VL1RE16_V: u32 = 0x2805007;
const MASK_VL1RE16_V: u32 = 0xfff0707f;
const MATCH_VL1RE32_V: u32 = 0x2806007;
const MASK_VL1RE32_V: u32 = 0xfff0707f;
const MATCH_VL1RE64_V: u32 = 0x2807007;
const MASK_VL1RE64_V: u32 = 0xfff0707f;
const MATCH_VL1RE8_V: u32 = 0x2800007;
const MASK_VL1RE8_V: u32 = 0xfff0707f;
const MATCH_VL2RE16_V: u32 = 0x22805007;
const MASK_VL2RE16_V: u32 = 0xfff0707f;
const MATCH_VL2RE32_V: u32 = 0x22806007;
const MASK_VL2RE32_V: u32 = 0xfff0707f;
const MATCH_VL2RE64_V: u32 = 0x22807007;
const MASK_VL2RE64_V: u32 = 0xfff0707f;
const MATCH_VL2RE8_V: u32 = 0x22800007;
const MASK_VL2RE8_V: u32 = 0xfff0707f;
const MATCH_VL4RE16_V: u32 = 0x62805007;
const MASK_VL4RE16_V: u32 = 0xfff0707f;
const MATCH_VL4RE32_V: u32 = 0x62806007;
const MASK_VL4RE32_V: u32 = 0xfff0707f;
const MATCH_VL4RE64_V: u32 = 0x62807007;
const MASK_VL4RE64_V: u32 = 0xfff0707f;
const MATCH_VL4RE8_V: u32 = 0x62800007;
const MASK_VL4RE8_V: u32 = 0xfff0707f;
const MATCH_VL8RE16_V: u32 = 0xe2805007;
const MASK_VL8RE16_V: u32 = 0xfff0707f;
const MATCH_VL8RE32_V: u32 = 0xe2806007;
const MASK_VL8RE32_V: u32 = 0xfff0707f;
const MATCH_VL8RE64_V: u32 = 0xe2807007;
const MASK_VL8RE64_V: u32 = 0xfff0707f;
const MATCH_VL8RE8_V: u32 = 0xe2800007;
const MASK_VL8RE8_V: u32 = 0xfff0707f;
const MATCH_VLE1024_V: u32 = 0x10007007;
const MASK_VLE1024_V: u32 = 0x1df0707f;
const MATCH_VLE1024FF_V: u32 = 0x11007007;
const MASK_VLE1024FF_V: u32 = 0x1df0707f;
const MATCH_VLE128_V: u32 = 0x10000007;
const MASK_VLE128_V: u32 = 0x1df0707f;
const MATCH_VLE128FF_V: u32 = 0x11000007;
const MASK_VLE128FF_V: u32 = 0x1df0707f;
const MATCH_VLE16_V: u32 = 0x5007;
const MASK_VLE16_V: u32 = 0x1df0707f;
const MATCH_VLE16FF_V: u32 = 0x1005007;
const MASK_VLE16FF_V: u32 = 0x1df0707f;
const MATCH_VLE256_V: u32 = 0x10005007;
const MASK_VLE256_V: u32 = 0x1df0707f;
const MATCH_VLE256FF_V: u32 = 0x11005007;
const MASK_VLE256FF_V: u32 = 0x1df0707f;
const MATCH_VLE32_V: u32 = 0x6007;
const MASK_VLE32_V: u32 = 0x1df0707f;
const MATCH_VLE32FF_V: u32 = 0x1006007;
const MASK_VLE32FF_V: u32 = 0x1df0707f;
const MATCH_VLE512_V: u32 = 0x10006007;
const MASK_VLE512_V: u32 = 0x1df0707f;
const MATCH_VLE512FF_V: u32 = 0x11006007;
const MASK_VLE512FF_V: u32 = 0x1df0707f;
const MATCH_VLE64_V: u32 = 0x7007;
const MASK_VLE64_V: u32 = 0x1df0707f;
const MATCH_VLE64FF_V: u32 = 0x1007007;
const MASK_VLE64FF_V: u32 = 0x1df0707f;
const MATCH_VLE8_V: u32 = 0x7;
const MASK_VLE8_V: u32 = 0x1df0707f;
const MATCH_VLE8FF_V: u32 = 0x1000007;
const MASK_VLE8FF_V: u32 = 0x1df0707f;
const MATCH_VLM_V: u32 = 0x2b00007;
const MASK_VLM_V: u32 = 0xfff0707f;
const MATCH_VLOXEI1024_V: u32 = 0x1c007007;
const MASK_VLOXEI1024_V: u32 = 0x1c00707f;
const MATCH_VLOXEI128_V: u32 = 0x1c000007;
const MASK_VLOXEI128_V: u32 = 0x1c00707f;
const MATCH_VLOXEI16_V: u32 = 0xc005007;
const MASK_VLOXEI16_V: u32 = 0x1c00707f;
const MATCH_VLOXEI256_V: u32 = 0x1c005007;
const MASK_VLOXEI256_V: u32 = 0x1c00707f;
const MATCH_VLOXEI32_V: u32 = 0xc006007;
const MASK_VLOXEI32_V: u32 = 0x1c00707f;
const MATCH_VLOXEI512_V: u32 = 0x1c006007;
const MASK_VLOXEI512_V: u32 = 0x1c00707f;
const MATCH_VLOXEI64_V: u32 = 0xc007007;
const MASK_VLOXEI64_V: u32 = 0x1c00707f;
const MATCH_VLOXEI8_V: u32 = 0xc000007;
const MASK_VLOXEI8_V: u32 = 0x1c00707f;
const MATCH_VLSE1024_V: u32 = 0x18007007;
const MASK_VLSE1024_V: u32 = 0x1c00707f;
const MATCH_VLSE128_V: u32 = 0x18000007;
const MASK_VLSE128_V: u32 = 0x1c00707f;
const MATCH_VLSE16_V: u32 = 0x8005007;
const MASK_VLSE16_V: u32 = 0x1c00707f;
const MATCH_VLSE256_V: u32 = 0x18005007;
const MASK_VLSE256_V: u32 = 0x1c00707f;
const MATCH_VLSE32_V: u32 = 0x8006007;
const MASK_VLSE32_V: u32 = 0x1c00707f;
const MATCH_VLSE512_V: u32 = 0x18006007;
const MASK_VLSE512_V: u32 = 0x1c00707f;
const MATCH_VLSE64_V: u32 = 0x8007007;
const MASK_VLSE64_V: u32 = 0x1c00707f;
const MATCH_VLSE8_V: u32 = 0x8000007;
const MASK_VLSE8_V: u32 = 0x1c00707f;
const MATCH_VLUXEI1024_V: u32 = 0x14007007;
const MASK_VLUXEI1024_V: u32 = 0x1c00707f;
const MATCH_VLUXEI128_V: u32 = 0x14000007;
const MASK_VLUXEI128_V: u32 = 0x1c00707f;
const MATCH_VLUXEI16_V: u32 = 0x4005007;
const MASK_VLUXEI16_V: u32 = 0x1c00707f;
const MATCH_VLUXEI256_V: u32 = 0x14005007;
const MASK_VLUXEI256_V: u32 = 0x1c00707f;
const MATCH_VLUXEI32_V: u32 = 0x4006007;
const MASK_VLUXEI32_V: u32 = 0x1c00707f;
const MATCH_VLUXEI512_V: u32 = 0x14006007;
const MASK_VLUXEI512_V: u32 = 0x1c00707f;
const MATCH_VLUXEI64_V: u32 = 0x4007007;
const MASK_VLUXEI64_V: u32 = 0x1c00707f;
const MATCH_VLUXEI8_V: u32 = 0x4000007;
const MASK_VLUXEI8_V: u32 = 0x1c00707f;
const MATCH_VMACC_VV: u32 = 0xb4002057;
const MASK_VMACC_VV: u32 = 0xfc00707f;
const MATCH_VMACC_VX: u32 = 0xb4006057;
const MASK_VMACC_VX: u32 = 0xfc00707f;
const MATCH_VMADC_VI: u32 = 0x46003057;
const MASK_VMADC_VI: u32 = 0xfe00707f;
const MATCH_VMADC_VIM: u32 = 0x44003057;
const MASK_VMADC_VIM: u32 = 0xfe00707f;
const MATCH_VMADC_VV: u32 = 0x46000057;
const MASK_VMADC_VV: u32 = 0xfe00707f;
const MATCH_VMADC_VVM: u32 = 0x44000057;
const MASK_VMADC_VVM: u32 = 0xfe00707f;
const MATCH_VMADC_VX: u32 = 0x46004057;
const MASK_VMADC_VX: u32 = 0xfe00707f;
const MATCH_VMADC_VXM: u32 = 0x44004057;
const MASK_VMADC_VXM: u32 = 0xfe00707f;
const MATCH_VMADD_VV: u32 = 0xa4002057;
const MASK_VMADD_VV: u32 = 0xfc00707f;
const MATCH_VMADD_VX: u32 = 0xa4006057;
const MASK_VMADD_VX: u32 = 0xfc00707f;
const MATCH_VMAND_MM: u32 = 0x64002057;
const MASK_VMAND_MM: u32 = 0xfc00707f;
const MATCH_VMANDN_MM: u32 = 0x60002057;
const MASK_VMANDN_MM: u32 = 0xfc00707f;
const MATCH_VMAX_VV: u32 = 0x1c000057;
const MASK_VMAX_VV: u32 = 0xfc00707f;
const MATCH_VMAX_VX: u32 = 0x1c004057;
const MASK_VMAX_VX: u32 = 0xfc00707f;
const MATCH_VMAXU_VV: u32 = 0x18000057;
const MASK_VMAXU_VV: u32 = 0xfc00707f;
const MATCH_VMAXU_VX: u32 = 0x18004057;
const MASK_VMAXU_VX: u32 = 0xfc00707f;
const MATCH_VMERGE_VIM: u32 = 0x5c003057;
const MASK_VMERGE_VIM: u32 = 0xfe00707f;
const MATCH_VMERGE_VVM: u32 = 0x5c000057;
const MASK_VMERGE_VVM: u32 = 0xfe00707f;
const MATCH_VMERGE_VXM: u32 = 0x5c004057;
const MASK_VMERGE_VXM: u32 = 0xfe00707f;
const MATCH_VMFEQ_VF: u32 = 0x60005057;
const MASK_VMFEQ_VF: u32 = 0xfc00707f;
const MATCH_VMFEQ_VV: u32 = 0x60001057;
const MASK_VMFEQ_VV: u32 = 0xfc00707f;
const MATCH_VMFGE_VF: u32 = 0x7c005057;
const MASK_VMFGE_VF: u32 = 0xfc00707f;
const MATCH_VMFGT_VF: u32 = 0x74005057;
const MASK_VMFGT_VF: u32 = 0xfc00707f;
const MATCH_VMFLE_VF: u32 = 0x64005057;
const MASK_VMFLE_VF: u32 = 0xfc00707f;
const MATCH_VMFLE_VV: u32 = 0x64001057;
const MASK_VMFLE_VV: u32 = 0xfc00707f;
const MATCH_VMFLT_VF: u32 = 0x6c005057;
const MASK_VMFLT_VF: u32 = 0xfc00707f;
const MATCH_VMFLT_VV: u32 = 0x6c001057;
const MASK_VMFLT_VV: u32 = 0xfc00707f;
const MATCH_VMFNE_VF: u32 = 0x70005057;
const MASK_VMFNE_VF: u32 = 0xfc00707f;
const MATCH_VMFNE_VV: u32 = 0x70001057;
const MASK_VMFNE_VV: u32 = 0xfc00707f;
const MATCH_VMIN_VV: u32 = 0x14000057;
const MASK_VMIN_VV: u32 = 0xfc00707f;
const MATCH_VMIN_VX: u32 = 0x14004057;
const MASK_VMIN_VX: u32 = 0xfc00707f;
const MATCH_VMINU_VV: u32 = 0x10000057;
const MASK_VMINU_VV: u32 = 0xfc00707f;
const MATCH_VMINU_VX: u32 = 0x10004057;
const MASK_VMINU_VX: u32 = 0xfc00707f;
const MATCH_VMNAND_MM: u32 = 0x74002057;
const MASK_VMNAND_MM: u32 = 0xfc00707f;
const MATCH_VMNOR_MM: u32 = 0x78002057;
const MASK_VMNOR_MM: u32 = 0xfc00707f;
const MATCH_VMOR_MM: u32 = 0x68002057;
const MASK_VMOR_MM: u32 = 0xfc00707f;
const MATCH_VMORN_MM: u32 = 0x70002057;
const MASK_VMORN_MM: u32 = 0xfc00707f;
const MATCH_VMSBC_VV: u32 = 0x4e000057;
const MASK_VMSBC_VV: u32 = 0xfe00707f;
const MATCH_VMSBC_VVM: u32 = 0x4c000057;
const MASK_VMSBC_VVM: u32 = 0xfe00707f;
const MATCH_VMSBC_VX: u32 = 0x4e004057;
const MASK_VMSBC_VX: u32 = 0xfe00707f;
const MATCH_VMSBC_VXM: u32 = 0x4c004057;
const MASK_VMSBC_VXM: u32 = 0xfe00707f;
const MATCH_VMSBF_M: u32 = 0x5000a057;
const MASK_VMSBF_M: u32 = 0xfc0ff07f;
const MATCH_VMSEQ_VI: u32 = 0x60003057;
const MASK_VMSEQ_VI: u32 = 0xfc00707f;
const MATCH_VMSEQ_VV: u32 = 0x60000057;
const MASK_VMSEQ_VV: u32 = 0xfc00707f;
const MATCH_VMSEQ_VX: u32 = 0x60004057;
const MASK_VMSEQ_VX: u32 = 0xfc00707f;
const MATCH_VMSGT_VI: u32 = 0x7c003057;
const MASK_VMSGT_VI: u32 = 0xfc00707f;
const MATCH_VMSGT_VX: u32 = 0x7c004057;
const MASK_VMSGT_VX: u32 = 0xfc00707f;
const MATCH_VMSGTU_VI: u32 = 0x78003057;
const MASK_VMSGTU_VI: u32 = 0xfc00707f;
const MATCH_VMSGTU_VX: u32 = 0x78004057;
const MASK_VMSGTU_VX: u32 = 0xfc00707f;
const MATCH_VMSIF_M: u32 = 0x5001a057;
const MASK_VMSIF_M: u32 = 0xfc0ff07f;
const MATCH_VMSLE_VI: u32 = 0x74003057;
const MASK_VMSLE_VI: u32 = 0xfc00707f;
const MATCH_VMSLE_VV: u32 = 0x74000057;
const MASK_VMSLE_VV: u32 = 0xfc00707f;
const MATCH_VMSLE_VX: u32 = 0x74004057;
const MASK_VMSLE_VX: u32 = 0xfc00707f;
const MATCH_VMSLEU_VI: u32 = 0x70003057;
const MASK_VMSLEU_VI: u32 = 0xfc00707f;
const MATCH_VMSLEU_VV: u32 = 0x70000057;
const MASK_VMSLEU_VV: u32 = 0xfc00707f;
const MATCH_VMSLEU_VX: u32 = 0x70004057;
const MASK_VMSLEU_VX: u32 = 0xfc00707f;
const MATCH_VMSLT_VV: u32 = 0x6c000057;
const MASK_VMSLT_VV: u32 = 0xfc00707f;
const MATCH_VMSLT_VX: u32 = 0x6c004057;
const MASK_VMSLT_VX: u32 = 0xfc00707f;
const MATCH_VMSLTU_VV: u32 = 0x68000057;
const MASK_VMSLTU_VV: u32 = 0xfc00707f;
const MATCH_VMSLTU_VX: u32 = 0x68004057;
const MASK_VMSLTU_VX: u32 = 0xfc00707f;
const MATCH_VMSNE_VI: u32 = 0x64003057;
const MASK_VMSNE_VI: u32 = 0xfc00707f;
const MATCH_VMSNE_VV: u32 = 0x64000057;
const MASK_VMSNE_VV: u32 = 0xfc00707f;
const MATCH_VMSNE_VX: u32 = 0x64004057;
const MASK_VMSNE_VX: u32 = 0xfc00707f;
const MATCH_VMSOF_M: u32 = 0x50012057;
const MASK_VMSOF_M: u32 = 0xfc0ff07f;
const MATCH_VMUL_VV: u32 = 0x94002057;
const MASK_VMUL_VV: u32 = 0xfc00707f;
const MATCH_VMUL_VX: u32 = 0x94006057;
const MASK_VMUL_VX: u32 = 0xfc00707f;
const MATCH_VMULH_VV: u32 = 0x9c002057;
const MASK_VMULH_VV: u32 = 0xfc00707f;
const MATCH_VMULH_VX: u32 = 0x9c006057;
const MASK_VMULH_VX: u32 = 0xfc00707f;
const MATCH_VMULHSU_VV: u32 = 0x98002057;
const MASK_VMULHSU_VV: u32 = 0xfc00707f;
const MATCH_VMULHSU_VX: u32 = 0x98006057;
const MASK_VMULHSU_VX: u32 = 0xfc00707f;
const MATCH_VMULHU_VV: u32 = 0x90002057;
const MASK_VMULHU_VV: u32 = 0xfc00707f;
const MATCH_VMULHU_VX: u32 = 0x90006057;
const MASK_VMULHU_VX: u32 = 0xfc00707f;
const MATCH_VMV1R_V: u32 = 0x9e003057;
const MASK_VMV1R_V: u32 = 0xfe0ff07f;
const MATCH_VMV2R_V: u32 = 0x9e00b057;
const MASK_VMV2R_V: u32 = 0xfe0ff07f;
const MATCH_VMV4R_V: u32 = 0x9e01b057;
const MASK_VMV4R_V: u32 = 0xfe0ff07f;
const MATCH_VMV8R_V: u32 = 0x9e03b057;
const MASK_VMV8R_V: u32 = 0xfe0ff07f;
const MATCH_VMV_S_X: u32 = 0x42006057;
const MASK_VMV_S_X: u32 = 0xfff0707f;
const MATCH_VMV_V_I: u32 = 0x5e003057;
const MASK_VMV_V_I: u32 = 0xfff0707f;
const MATCH_VMV_V_V: u32 = 0x5e000057;
const MASK_VMV_V_V: u32 = 0xfff0707f;
const MATCH_VMV_V_X: u32 = 0x5e004057;
const MASK_VMV_V_X: u32 = 0xfff0707f;
const MATCH_VMV_X_S: u32 = 0x42002057;
const MASK_VMV_X_S: u32 = 0xfe0ff07f;
const MATCH_VMXNOR_MM: u32 = 0x7c002057;
const MASK_VMXNOR_MM: u32 = 0xfc00707f;
const MATCH_VMXOR_MM: u32 = 0x6c002057;
const MASK_VMXOR_MM: u32 = 0xfc00707f;
const MATCH_VNCLIP_WI: u32 = 0xbc003057;
const MASK_VNCLIP_WI: u32 = 0xfc00707f;
const MATCH_VNCLIP_WV: u32 = 0xbc000057;
const MASK_VNCLIP_WV: u32 = 0xfc00707f;
const MATCH_VNCLIP_WX: u32 = 0xbc004057;
const MASK_VNCLIP_WX: u32 = 0xfc00707f;
const MATCH_VNCLIPU_WI: u32 = 0xb8003057;
const MASK_VNCLIPU_WI: u32 = 0xfc00707f;
const MATCH_VNCLIPU_WV: u32 = 0xb8000057;
const MASK_VNCLIPU_WV: u32 = 0xfc00707f;
const MATCH_VNCLIPU_WX: u32 = 0xb8004057;
const MASK_VNCLIPU_WX: u32 = 0xfc00707f;
const MATCH_VNMSAC_VV: u32 = 0xbc002057;
const MASK_VNMSAC_VV: u32 = 0xfc00707f;
const MATCH_VNMSAC_VX: u32 = 0xbc006057;
const MASK_VNMSAC_VX: u32 = 0xfc00707f;
const MATCH_VNMSUB_VV: u32 = 0xac002057;
const MASK_VNMSUB_VV: u32 = 0xfc00707f;
const MATCH_VNMSUB_VX: u32 = 0xac006057;
const MASK_VNMSUB_VX: u32 = 0xfc00707f;
const MATCH_VNSRA_WI: u32 = 0xb4003057;
const MASK_VNSRA_WI: u32 = 0xfc00707f;
const MATCH_VNSRA_WV: u32 = 0xb4000057;
const MASK_VNSRA_WV: u32 = 0xfc00707f;
const MATCH_VNSRA_WX: u32 = 0xb4004057;
const MASK_VNSRA_WX: u32 = 0xfc00707f;
const MATCH_VNSRL_WI: u32 = 0xb0003057;
const MASK_VNSRL_WI: u32 = 0xfc00707f;
const MATCH_VNSRL_WV: u32 = 0xb0000057;
const MASK_VNSRL_WV: u32 = 0xfc00707f;
const MATCH_VNSRL_WX: u32 = 0xb0004057;
const MASK_VNSRL_WX: u32 = 0xfc00707f;
const MATCH_VOR_VI: u32 = 0x28003057;
const MASK_VOR_VI: u32 = 0xfc00707f;
const MATCH_VOR_VV: u32 = 0x28000057;
const MASK_VOR_VV: u32 = 0xfc00707f;
const MATCH_VOR_VX: u32 = 0x28004057;
const MASK_VOR_VX: u32 = 0xfc00707f;
const MATCH_VREDAND_VS: u32 = 0x4002057;
const MASK_VREDAND_VS: u32 = 0xfc00707f;
const MATCH_VREDMAX_VS: u32 = 0x1c002057;
const MASK_VREDMAX_VS: u32 = 0xfc00707f;
const MATCH_VREDMAXU_VS: u32 = 0x18002057;
const MASK_VREDMAXU_VS: u32 = 0xfc00707f;
const MATCH_VREDMIN_VS: u32 = 0x14002057;
const MASK_VREDMIN_VS: u32 = 0xfc00707f;
const MATCH_VREDMINU_VS: u32 = 0x10002057;
const MASK_VREDMINU_VS: u32 = 0xfc00707f;
const MATCH_VREDOR_VS: u32 = 0x8002057;
const MASK_VREDOR_VS: u32 = 0xfc00707f;
const MATCH_VREDSUM_VS: u32 = 0x2057;
const MASK_VREDSUM_VS: u32 = 0xfc00707f;
const MATCH_VREDXOR_VS: u32 = 0xc002057;
const MASK_VREDXOR_VS: u32 = 0xfc00707f;
const MATCH_VREM_VV: u32 = 0x8c002057;
const MASK_VREM_VV: u32 = 0xfc00707f;
const MATCH_VREM_VX: u32 = 0x8c006057;
const MASK_VREM_VX: u32 = 0xfc00707f;
const MATCH_VREMU_VV: u32 = 0x88002057;
const MASK_VREMU_VV: u32 = 0xfc00707f;
const MATCH_VREMU_VX: u32 = 0x88006057;
const MASK_VREMU_VX: u32 = 0xfc00707f;
const MATCH_VRGATHER_VI: u32 = 0x30003057;
const MASK_VRGATHER_VI: u32 = 0xfc00707f;
const MATCH_VRGATHER_VV: u32 = 0x30000057;
const MASK_VRGATHER_VV: u32 = 0xfc00707f;
const MATCH_VRGATHER_VX: u32 = 0x30004057;
const MASK_VRGATHER_VX: u32 = 0xfc00707f;
const MATCH_VRGATHEREI16_VV: u32 = 0x38000057;
const MASK_VRGATHEREI16_VV: u32 = 0xfc00707f;
const MATCH_VRSUB_VI: u32 = 0xc003057;
const MASK_VRSUB_VI: u32 = 0xfc00707f;
const MATCH_VRSUB_VX: u32 = 0xc004057;
const MASK_VRSUB_VX: u32 = 0xfc00707f;
const MATCH_VS1R_V: u32 = 0x2800027;
const MASK_VS1R_V: u32 = 0xfff0707f;
const MATCH_VS2R_V: u32 = 0x22800027;
const MASK_VS2R_V: u32 = 0xfff0707f;
const MATCH_VS4R_V: u32 = 0x62800027;
const MASK_VS4R_V: u32 = 0xfff0707f;
const MATCH_VS8R_V: u32 = 0xe2800027;
const MASK_VS8R_V: u32 = 0xfff0707f;
const MATCH_VSADD_VI: u32 = 0x84003057;
const MASK_VSADD_VI: u32 = 0xfc00707f;
const MATCH_VSADD_VV: u32 = 0x84000057;
const MASK_VSADD_VV: u32 = 0xfc00707f;
const MATCH_VSADD_VX: u32 = 0x84004057;
const MASK_VSADD_VX: u32 = 0xfc00707f;
const MATCH_VSADDU_VI: u32 = 0x80003057;
const MASK_VSADDU_VI: u32 = 0xfc00707f;
const MATCH_VSADDU_VV: u32 = 0x80000057;
const MASK_VSADDU_VV: u32 = 0xfc00707f;
const MATCH_VSADDU_VX: u32 = 0x80004057;
const MASK_VSADDU_VX: u32 = 0xfc00707f;
const MATCH_VSBC_VVM: u32 = 0x48000057;
const MASK_VSBC_VVM: u32 = 0xfe00707f;
const MATCH_VSBC_VXM: u32 = 0x48004057;
const MASK_VSBC_VXM: u32 = 0xfe00707f;
const MATCH_VSE1024_V: u32 = 0x10007027;
const MASK_VSE1024_V: u32 = 0x1df0707f;
const MATCH_VSE128_V: u32 = 0x10000027;
const MASK_VSE128_V: u32 = 0x1df0707f;
const MATCH_VSE16_V: u32 = 0x5027;
const MASK_VSE16_V: u32 = 0x1df0707f;
const MATCH_VSE256_V: u32 = 0x10005027;
const MASK_VSE256_V: u32 = 0x1df0707f;
const MATCH_VSE32_V: u32 = 0x6027;
const MASK_VSE32_V: u32 = 0x1df0707f;
const MATCH_VSE512_V: u32 = 0x10006027;
const MASK_VSE512_V: u32 = 0x1df0707f;
const MATCH_VSE64_V: u32 = 0x7027;
const MASK_VSE64_V: u32 = 0x1df0707f;
const MATCH_VSE8_V: u32 = 0x27;
const MASK_VSE8_V: u32 = 0x1df0707f;
const MATCH_VSETIVLI: u32 = 0xc0007057;
const MASK_VSETIVLI: u32 = 0xc000707f;
const MATCH_VSETVL: u32 = 0x80007057;
const MASK_VSETVL: u32 = 0xfe00707f;
const MATCH_VSETVLI: u32 = 0x7057;
const MASK_VSETVLI: u32 = 0x8000707f;
const MATCH_VSEXT_VF2: u32 = 0x4803a057;
const MASK_VSEXT_VF2: u32 = 0xfc0ff07f;
const MATCH_VSEXT_VF4: u32 = 0x4802a057;
const MASK_VSEXT_VF4: u32 = 0xfc0ff07f;
const MATCH_VSEXT_VF8: u32 = 0x4801a057;
const MASK_VSEXT_VF8: u32 = 0xfc0ff07f;
const MATCH_VSLIDE1DOWN_VX: u32 = 0x3c006057;
const MASK_VSLIDE1DOWN_VX: u32 = 0xfc00707f;
const MATCH_VSLIDE1UP_VX: u32 = 0x38006057;
const MASK_VSLIDE1UP_VX: u32 = 0xfc00707f;
const MATCH_VSLIDEDOWN_VI: u32 = 0x3c003057;
const MASK_VSLIDEDOWN_VI: u32 = 0xfc00707f;
const MATCH_VSLIDEDOWN_VX: u32 = 0x3c004057;
const MASK_VSLIDEDOWN_VX: u32 = 0xfc00707f;
const MATCH_VSLIDEUP_VI: u32 = 0x38003057;
const MASK_VSLIDEUP_VI: u32 = 0xfc00707f;
const MATCH_VSLIDEUP_VX: u32 = 0x38004057;
const MASK_VSLIDEUP_VX: u32 = 0xfc00707f;
const MATCH_VSLL_VI: u32 = 0x94003057;
const MASK_VSLL_VI: u32 = 0xfc00707f;
const MATCH_VSLL_VV: u32 = 0x94000057;
const MASK_VSLL_VV: u32 = 0xfc00707f;
const MATCH_VSLL_VX: u32 = 0x94004057;
const MASK_VSLL_VX: u32 = 0xfc00707f;
const MATCH_VSM_V: u32 = 0x2b00027;
const MASK_VSM_V: u32 = 0xfff0707f;
const MATCH_VSMUL_VV: u32 = 0x9c000057;
const MASK_VSMUL_VV: u32 = 0xfc00707f;
const MATCH_VSMUL_VX: u32 = 0x9c004057;
const MASK_VSMUL_VX: u32 = 0xfc00707f;
const MATCH_VSOXEI1024_V: u32 = 0x1c007027;
const MASK_VSOXEI1024_V: u32 = 0x1c00707f;
const MATCH_VSOXEI128_V: u32 = 0x1c000027;
const MASK_VSOXEI128_V: u32 = 0x1c00707f;
const MATCH_VSOXEI16_V: u32 = 0xc005027;
const MASK_VSOXEI16_V: u32 = 0x1c00707f;
const MATCH_VSOXEI256_V: u32 = 0x1c005027;
const MASK_VSOXEI256_V: u32 = 0x1c00707f;
const MATCH_VSOXEI32_V: u32 = 0xc006027;
const MASK_VSOXEI32_V: u32 = 0x1c00707f;
const MATCH_VSOXEI512_V: u32 = 0x1c006027;
const MASK_VSOXEI512_V: u32 = 0x1c00707f;
const MATCH_VSOXEI64_V: u32 = 0xc007027;
const MASK_VSOXEI64_V: u32 = 0x1c00707f;
const MATCH_VSOXEI8_V: u32 = 0xc000027;
const MASK_VSOXEI8_V: u32 = 0x1c00707f;
const MATCH_VSRA_VI: u32 = 0xa4003057;
const MASK_VSRA_VI: u32 = 0xfc00707f;
const MATCH_VSRA_VV: u32 = 0xa4000057;
const MASK_VSRA_VV: u32 = 0xfc00707f;
const MATCH_VSRA_VX: u32 = 0xa4004057;
const MASK_VSRA_VX: u32 = 0xfc00707f;
const MATCH_VSRL_VI: u32 = 0xa0003057;
const MASK_VSRL_VI: u32 = 0xfc00707f;
const MATCH_VSRL_VV: u32 = 0xa0000057;
const MASK_VSRL_VV: u32 = 0xfc00707f;
const MATCH_VSRL_VX: u32 = 0xa0004057;
const MASK_VSRL_VX: u32 = 0xfc00707f;
const MATCH_VSSE1024_V: u32 = 0x18007027;
const MASK_VSSE1024_V: u32 = 0x1c00707f;
const MATCH_VSSE128_V: u32 = 0x18000027;
const MASK_VSSE128_V: u32 = 0x1c00707f;
const MATCH_VSSE16_V: u32 = 0x8005027;
const MASK_VSSE16_V: u32 = 0x1c00707f;
const MATCH_VSSE256_V: u32 = 0x18005027;
const MASK_VSSE256_V: u32 = 0x1c00707f;
const MATCH_VSSE32_V: u32 = 0x8006027;
const MASK_VSSE32_V: u32 = 0x1c00707f;
const MATCH_VSSE512_V: u32 = 0x18006027;
const MASK_VSSE512_V: u32 = 0x1c00707f;
const MATCH_VSSE64_V: u32 = 0x8007027;
const MASK_VSSE64_V: u32 = 0x1c00707f;
const MATCH_VSSE8_V: u32 = 0x8000027;
const MASK_VSSE8_V: u32 = 0x1c00707f;
const MATCH_VSSRA_VI: u32 = 0xac003057;
const MASK_VSSRA_VI: u32 = 0xfc00707f;
const MATCH_VSSRA_VV: u32 = 0xac000057;
const MASK_VSSRA_VV: u32 = 0xfc00707f;
const MATCH_VSSRA_VX: u32 = 0xac004057;
const MASK_VSSRA_VX: u32 = 0xfc00707f;
const MATCH_VSSRL_VI: u32 = 0xa8003057;
const MASK_VSSRL_VI: u32 = 0xfc00707f;
const MATCH_VSSRL_VV: u32 = 0xa8000057;
const MASK_VSSRL_VV: u32 = 0xfc00707f;
const MATCH_VSSRL_VX: u32 = 0xa8004057;
const MASK_VSSRL_VX: u32 = 0xfc00707f;
const MATCH_VSSUB_VV: u32 = 0x8c000057;
const MASK_VSSUB_VV: u32 = 0xfc00707f;
const MATCH_VSSUB_VX: u32 = 0x8c004057;
const MASK_VSSUB_VX: u32 = 0xfc00707f;
const MATCH_VSSUBU_VV: u32 = 0x88000057;
const MASK_VSSUBU_VV: u32 = 0xfc00707f;
const MATCH_VSSUBU_VX: u32 = 0x88004057;
const MASK_VSSUBU_VX: u32 = 0xfc00707f;
const MATCH_VSUB_VV: u32 = 0x8000057;
const MASK_VSUB_VV: u32 = 0xfc00707f;
const MATCH_VSUB_VX: u32 = 0x8004057;
const MASK_VSUB_VX: u32 = 0xfc00707f;
const MATCH_VSUXEI1024_V: u32 = 0x14007027;
const MASK_VSUXEI1024_V: u32 = 0x1c00707f;
const MATCH_VSUXEI128_V: u32 = 0x14000027;
const MASK_VSUXEI128_V: u32 = 0x1c00707f;
const MATCH_VSUXEI16_V: u32 = 0x4005027;
const MASK_VSUXEI16_V: u32 = 0x1c00707f;
const MATCH_VSUXEI256_V: u32 = 0x14005027;
const MASK_VSUXEI256_V: u32 = 0x1c00707f;
const MATCH_VSUXEI32_V: u32 = 0x4006027;
const MASK_VSUXEI32_V: u32 = 0x1c00707f;
const MATCH_VSUXEI512_V: u32 = 0x14006027;
const MASK_VSUXEI512_V: u32 = 0x1c00707f;
const MATCH_VSUXEI64_V: u32 = 0x4007027;
const MASK_VSUXEI64_V: u32 = 0x1c00707f;
const MATCH_VSUXEI8_V: u32 = 0x4000027;
const MASK_VSUXEI8_V: u32 = 0x1c00707f;
const MATCH_VWADD_VV: u32 = 0xc4002057;
const MASK_VWADD_VV: u32 = 0xfc00707f;
const MATCH_VWADD_VX: u32 = 0xc4006057;
const MASK_VWADD_VX: u32 = 0xfc00707f;
const MATCH_VWADD_WV: u32 = 0xd4002057;
const MASK_VWADD_WV: u32 = 0xfc00707f;
const MATCH_VWADD_WX: u32 = 0xd4006057;
const MASK_VWADD_WX: u32 = 0xfc00707f;
const MATCH_VWADDU_VV: u32 = 0xc0002057;
const MASK_VWADDU_VV: u32 = 0xfc00707f;
const MATCH_VWADDU_VX: u32 = 0xc0006057;
const MASK_VWADDU_VX: u32 = 0xfc00707f;
const MATCH_VWADDU_WV: u32 = 0xd0002057;
const MASK_VWADDU_WV: u32 = 0xfc00707f;
const MATCH_VWADDU_WX: u32 = 0xd0006057;
const MASK_VWADDU_WX: u32 = 0xfc00707f;
const MATCH_VWMACC_VV: u32 = 0xf4002057;
const MASK_VWMACC_VV: u32 = 0xfc00707f;
const MATCH_VWMACC_VX: u32 = 0xf4006057;
const MASK_VWMACC_VX: u32 = 0xfc00707f;
const MATCH_VWMACCSU_VV: u32 = 0xfc002057;
const MASK_VWMACCSU_VV: u32 = 0xfc00707f;
const MATCH_VWMACCSU_VX: u32 = 0xfc006057;
const MASK_VWMACCSU_VX: u32 = 0xfc00707f;
const MATCH_VWMACCU_VV: u32 = 0xf0002057;
const MASK_VWMACCU_VV: u32 = 0xfc00707f;
const MATCH_VWMACCU_VX: u32 = 0xf0006057;
const MASK_VWMACCU_VX: u32 = 0xfc00707f;
const MATCH_VWMACCUS_VX: u32 = 0xf8006057;
const MASK_VWMACCUS_VX: u32 = 0xfc00707f;
const MATCH_VWMUL_VV: u32 = 0xec002057;
const MASK_VWMUL_VV: u32 = 0xfc00707f;
const MATCH_VWMUL_VX: u32 = 0xec006057;
const MASK_VWMUL_VX: u32 = 0xfc00707f;
const MATCH_VWMULSU_VV: u32 = 0xe8002057;
const MASK_VWMULSU_VV: u32 = 0xfc00707f;
const MATCH_VWMULSU_VX: u32 = 0xe8006057;
const MASK_VWMULSU_VX: u32 = 0xfc00707f;
const MATCH_VWMULU_VV: u32 = 0xe0002057;
const MASK_VWMULU_VV: u32 = 0xfc00707f;
const MATCH_VWMULU_VX: u32 = 0xe0006057;
const MASK_VWMULU_VX: u32 = 0xfc00707f;
const MATCH_VWREDSUM_VS: u32 = 0xc4000057;
const MASK_VWREDSUM_VS: u32 = 0xfc00707f;
const MATCH_VWREDSUMU_VS: u32 = 0xc0000057;
const MASK_VWREDSUMU_VS: u32 = 0xfc00707f;
const MATCH_VWSUB_VV: u32 = 0xcc002057;
const MASK_VWSUB_VV: u32 = 0xfc00707f;
const MATCH_VWSUB_VX: u32 = 0xcc006057;
const MASK_VWSUB_VX: u32 = 0xfc00707f;
const MATCH_VWSUB_WV: u32 = 0xdc002057;
const MASK_VWSUB_WV: u32 = 0xfc00707f;
const MATCH_VWSUB_WX: u32 = 0xdc006057;
const MASK_VWSUB_WX: u32 = 0xfc00707f;
const MATCH_VWSUBU_VV: u32 = 0xc8002057;
const MASK_VWSUBU_VV: u32 = 0xfc00707f;
const MATCH_VWSUBU_VX: u32 = 0xc8006057;
const MASK_VWSUBU_VX: u32 = 0xfc00707f;
const MATCH_VWSUBU_WV: u32 = 0xd8002057;
const MASK_VWSUBU_WV: u32 = 0xfc00707f;
const MATCH_VWSUBU_WX: u32 = 0xd8006057;
const MASK_VWSUBU_WX: u32 = 0xfc00707f;
const MATCH_VXOR_VI: u32 = 0x2c003057;
const MASK_VXOR_VI: u32 = 0xfc00707f;
const MATCH_VXOR_VV: u32 = 0x2c000057;
const MASK_VXOR_VV: u32 = 0xfc00707f;
const MATCH_VXOR_VX: u32 = 0x2c004057;
const MASK_VXOR_VX: u32 = 0xfc00707f;
const MATCH_VZEXT_VF2: u32 = 0x48032057;
const MASK_VZEXT_VF2: u32 = 0xfc0ff07f;
const MATCH_VZEXT_VF4: u32 = 0x48022057;
const MASK_VZEXT_VF4: u32 = 0xfc0ff07f;
const MATCH_VZEXT_VF8: u32 = 0x48012057;
const MASK_VZEXT_VF8: u32 = 0xfc0ff07f;
const CSR_FFLAGS: u16 = 0x1;
const CSR_FRM: u16 = 0x2;
const CSR_FCSR: u16 = 0x3;
const CSR_VSTART: u16 = 0x8;
const CSR_VXSAT: u16 = 0x9;
const CSR_VXRM: u16 = 0xa;
const CSR_VCSR: u16 = 0xf;
const CSR_SEED: u16 = 0x15;
const CSR_CYCLE: u16 = 0xc00;
const CSR_TIME: u16 = 0xc01;
const CSR_INSTRET: u16 = 0xc02;
const CSR_HPMCOUNTER3: u16 = 0xc03;
const CSR_HPMCOUNTER4: u16 = 0xc04;
const CSR_HPMCOUNTER5: u16 = 0xc05;
const CSR_HPMCOUNTER6: u16 = 0xc06;
const CSR_HPMCOUNTER7: u16 = 0xc07;
const CSR_HPMCOUNTER8: u16 = 0xc08;
const CSR_HPMCOUNTER9: u16 = 0xc09;
const CSR_HPMCOUNTER10: u16 = 0xc0a;
const CSR_HPMCOUNTER11: u16 = 0xc0b;
const CSR_HPMCOUNTER12: u16 = 0xc0c;
const CSR_HPMCOUNTER13: u16 = 0xc0d;
const CSR_HPMCOUNTER14: u16 = 0xc0e;
const CSR_HPMCOUNTER15: u16 = 0xc0f;
const CSR_HPMCOUNTER16: u16 = 0xc10;
const CSR_HPMCOUNTER17: u16 = 0xc11;
const CSR_HPMCOUNTER18: u16 = 0xc12;
const CSR_HPMCOUNTER19: u16 = 0xc13;
const CSR_HPMCOUNTER20: u16 = 0xc14;
const CSR_HPMCOUNTER21: u16 = 0xc15;
const CSR_HPMCOUNTER22: u16 = 0xc16;
const CSR_HPMCOUNTER23: u16 = 0xc17;
const CSR_HPMCOUNTER24: u16 = 0xc18;
const CSR_HPMCOUNTER25: u16 = 0xc19;
const CSR_HPMCOUNTER26: u16 = 0xc1a;
const CSR_HPMCOUNTER27: u16 = 0xc1b;
const CSR_HPMCOUNTER28: u16 = 0xc1c;
const CSR_HPMCOUNTER29: u16 = 0xc1d;
const CSR_HPMCOUNTER30: u16 = 0xc1e;
const CSR_HPMCOUNTER31: u16 = 0xc1f;
const CSR_VL: u16 = 0xc20;
const CSR_VTYPE: u16 = 0xc21;
const CSR_VLENB: u16 = 0xc22;
const CSR_SSTATUS: u16 = 0x100;
const CSR_SEDELEG: u16 = 0x102;
const CSR_SIDELEG: u16 = 0x103;
const CSR_SIE: u16 = 0x104;
const CSR_STVEC: u16 = 0x105;
const CSR_SCOUNTEREN: u16 = 0x106;
const CSR_SENVCFG: u16 = 0x10a;
const CSR_SSTATEEN0: u16 = 0x10c;
const CSR_SSTATEEN1: u16 = 0x10d;
const CSR_SSTATEEN2: u16 = 0x10e;
const CSR_SSTATEEN3: u16 = 0x10f;
const CSR_SSCRATCH: u16 = 0x140;
const CSR_SEPC: u16 = 0x141;
const CSR_SCAUSE: u16 = 0x142;
const CSR_STVAL: u16 = 0x143;
const CSR_SIP: u16 = 0x144;
const CSR_STIMECMP: u16 = 0x14d;
const CSR_SATP: u16 = 0x180;
const CSR_SCONTEXT: u16 = 0x5a8;
const CSR_VSSTATUS: u16 = 0x200;
const CSR_VSIE: u16 = 0x204;
const CSR_VSTVEC: u16 = 0x205;
const CSR_VSSCRATCH: u16 = 0x240;
const CSR_VSEPC: u16 = 0x241;
const CSR_VSCAUSE: u16 = 0x242;
const CSR_VSTVAL: u16 = 0x243;
const CSR_VSIP: u16 = 0x244;
const CSR_VSTIMECMP: u16 = 0x24d;
const CSR_VSATP: u16 = 0x280;
const CSR_HSTATUS: u16 = 0x600;
const CSR_HEDELEG: u16 = 0x602;
const CSR_HIDELEG: u16 = 0x603;
const CSR_HIE: u16 = 0x604;
const CSR_HTIMEDELTA: u16 = 0x605;
const CSR_HCOUNTEREN: u16 = 0x606;
const CSR_HGEIE: u16 = 0x607;
const CSR_HENVCFG: u16 = 0x60a;
const CSR_HSTATEEN0: u16 = 0x60c;
const CSR_HSTATEEN1: u16 = 0x60d;
const CSR_HSTATEEN2: u16 = 0x60e;
const CSR_HSTATEEN3: u16 = 0x60f;
const CSR_HTVAL: u16 = 0x643;
const CSR_HIP: u16 = 0x644;
const CSR_HVIP: u16 = 0x645;
const CSR_HTINST: u16 = 0x64a;
const CSR_HGATP: u16 = 0x680;
const CSR_HCONTEXT: u16 = 0x6a8;
const CSR_HGEIP: u16 = 0xe12;
const CSR_SCOUNTOVF: u16 = 0xda0;
const CSR_UTVT: u16 = 0x7;
const CSR_UNXTI: u16 = 0x45;
const CSR_UINTSTATUS: u16 = 0x46;
const CSR_USCRATCHCSW: u16 = 0x48;
const CSR_USCRATCHCSWL: u16 = 0x49;
const CSR_STVT: u16 = 0x107;
const CSR_SNXTI: u16 = 0x145;
const CSR_SINTSTATUS: u16 = 0x146;
const CSR_SSCRATCHCSW: u16 = 0x148;
const CSR_SSCRATCHCSWL: u16 = 0x149;
const CSR_MTVT: u16 = 0x307;
const CSR_MNXTI: u16 = 0x345;
const CSR_MINTSTATUS: u16 = 0x346;
const CSR_MSCRATCHCSW: u16 = 0x348;
const CSR_MSCRATCHCSWL: u16 = 0x349;
const CSR_MSTATUS: u16 = 0x300;
const CSR_MISA: u16 = 0x301;
const CSR_MEDELEG: u16 = 0x302;
const CSR_MIDELEG: u16 = 0x303;
const CSR_MIE: u16 = 0x304;
const CSR_MTVEC: u16 = 0x305;
const CSR_MCOUNTEREN: u16 = 0x306;
const CSR_MENVCFG: u16 = 0x30a;
const CSR_MSTATEEN0: u16 = 0x30c;
const CSR_MSTATEEN1: u16 = 0x30d;
const CSR_MSTATEEN2: u16 = 0x30e;
const CSR_MSTATEEN3: u16 = 0x30f;
const CSR_MCOUNTINHIBIT: u16 = 0x320;
const CSR_MSCRATCH: u16 = 0x340;
const CSR_MEPC: u16 = 0x341;
const CSR_MCAUSE: u16 = 0x342;
const CSR_MTVAL: u16 = 0x343;
const CSR_MIP: u16 = 0x344;
const CSR_MTINST: u16 = 0x34a;
const CSR_MTVAL2: u16 = 0x34b;
const CSR_PMPCFG0: u16 = 0x3a0;
const CSR_PMPCFG1: u16 = 0x3a1;
const CSR_PMPCFG2: u16 = 0x3a2;
const CSR_PMPCFG3: u16 = 0x3a3;
const CSR_PMPCFG4: u16 = 0x3a4;
const CSR_PMPCFG5: u16 = 0x3a5;
const CSR_PMPCFG6: u16 = 0x3a6;
const CSR_PMPCFG7: u16 = 0x3a7;
const CSR_PMPCFG8: u16 = 0x3a8;
const CSR_PMPCFG9: u16 = 0x3a9;
const CSR_PMPCFG10: u16 = 0x3aa;
const CSR_PMPCFG11: u16 = 0x3ab;
const CSR_PMPCFG12: u16 = 0x3ac;
const CSR_PMPCFG13: u16 = 0x3ad;
const CSR_PMPCFG14: u16 = 0x3ae;
const CSR_PMPCFG15: u16 = 0x3af;
const CSR_PMPADDR0: u16 = 0x3b0;
const CSR_PMPADDR1: u16 = 0x3b1;
const CSR_PMPADDR2: u16 = 0x3b2;
const CSR_PMPADDR3: u16 = 0x3b3;
const CSR_PMPADDR4: u16 = 0x3b4;
const CSR_PMPADDR5: u16 = 0x3b5;
const CSR_PMPADDR6: u16 = 0x3b6;
const CSR_PMPADDR7: u16 = 0x3b7;
const CSR_PMPADDR8: u16 = 0x3b8;
const CSR_PMPADDR9: u16 = 0x3b9;
const CSR_PMPADDR10: u16 = 0x3ba;
const CSR_PMPADDR11: u16 = 0x3bb;
const CSR_PMPADDR12: u16 = 0x3bc;
const CSR_PMPADDR13: u16 = 0x3bd;
const CSR_PMPADDR14: u16 = 0x3be;
const CSR_PMPADDR15: u16 = 0x3bf;
const CSR_PMPADDR16: u16 = 0x3c0;
const CSR_PMPADDR17: u16 = 0x3c1;
const CSR_PMPADDR18: u16 = 0x3c2;
const CSR_PMPADDR19: u16 = 0x3c3;
const CSR_PMPADDR20: u16 = 0x3c4;
const CSR_PMPADDR21: u16 = 0x3c5;
const CSR_PMPADDR22: u16 = 0x3c6;
const CSR_PMPADDR23: u16 = 0x3c7;
const CSR_PMPADDR24: u16 = 0x3c8;
const CSR_PMPADDR25: u16 = 0x3c9;
const CSR_PMPADDR26: u16 = 0x3ca;
const CSR_PMPADDR27: u16 = 0x3cb;
const CSR_PMPADDR28: u16 = 0x3cc;
const CSR_PMPADDR29: u16 = 0x3cd;
const CSR_PMPADDR30: u16 = 0x3ce;
const CSR_PMPADDR31: u16 = 0x3cf;
const CSR_PMPADDR32: u16 = 0x3d0;
const CSR_PMPADDR33: u16 = 0x3d1;
const CSR_PMPADDR34: u16 = 0x3d2;
const CSR_PMPADDR35: u16 = 0x3d3;
const CSR_PMPADDR36: u16 = 0x3d4;
const CSR_PMPADDR37: u16 = 0x3d5;
const CSR_PMPADDR38: u16 = 0x3d6;
const CSR_PMPADDR39: u16 = 0x3d7;
const CSR_PMPADDR40: u16 = 0x3d8;
const CSR_PMPADDR41: u16 = 0x3d9;
const CSR_PMPADDR42: u16 = 0x3da;
const CSR_PMPADDR43: u16 = 0x3db;
const CSR_PMPADDR44: u16 = 0x3dc;
const CSR_PMPADDR45: u16 = 0x3dd;
const CSR_PMPADDR46: u16 = 0x3de;
const CSR_PMPADDR47: u16 = 0x3df;
const CSR_PMPADDR48: u16 = 0x3e0;
const CSR_PMPADDR49: u16 = 0x3e1;
const CSR_PMPADDR50: u16 = 0x3e2;
const CSR_PMPADDR51: u16 = 0x3e3;
const CSR_PMPADDR52: u16 = 0x3e4;
const CSR_PMPADDR53: u16 = 0x3e5;
const CSR_PMPADDR54: u16 = 0x3e6;
const CSR_PMPADDR55: u16 = 0x3e7;
const CSR_PMPADDR56: u16 = 0x3e8;
const CSR_PMPADDR57: u16 = 0x3e9;
const CSR_PMPADDR58: u16 = 0x3ea;
const CSR_PMPADDR59: u16 = 0x3eb;
const CSR_PMPADDR60: u16 = 0x3ec;
const CSR_PMPADDR61: u16 = 0x3ed;
const CSR_PMPADDR62: u16 = 0x3ee;
const CSR_PMPADDR63: u16 = 0x3ef;
const CSR_MSECCFG: u16 = 0x747;
const CSR_TSELECT: u16 = 0x7a0;
const CSR_TDATA1: u16 = 0x7a1;
const CSR_TDATA2: u16 = 0x7a2;
const CSR_TDATA3: u16 = 0x7a3;
const CSR_TINFO: u16 = 0x7a4;
const CSR_TCONTROL: u16 = 0x7a5;
const CSR_MCONTEXT: u16 = 0x7a8;
const CSR_MSCONTEXT: u16 = 0x7aa;
const CSR_DCSR: u16 = 0x7b0;
const CSR_DPC: u16 = 0x7b1;
const CSR_DSCRATCH0: u16 = 0x7b2;
const CSR_DSCRATCH1: u16 = 0x7b3;
const CSR_MCYCLE: u16 = 0xb00;
const CSR_MINSTRET: u16 = 0xb02;
const CSR_MHPMCOUNTER3: u16 = 0xb03;
const CSR_MHPMCOUNTER4: u16 = 0xb04;
const CSR_MHPMCOUNTER5: u16 = 0xb05;
const CSR_MHPMCOUNTER6: u16 = 0xb06;
const CSR_MHPMCOUNTER7: u16 = 0xb07;
const CSR_MHPMCOUNTER8: u16 = 0xb08;
const CSR_MHPMCOUNTER9: u16 = 0xb09;
const CSR_MHPMCOUNTER10: u16 = 0xb0a;
const CSR_MHPMCOUNTER11: u16 = 0xb0b;
const CSR_MHPMCOUNTER12: u16 = 0xb0c;
const CSR_MHPMCOUNTER13: u16 = 0xb0d;
const CSR_MHPMCOUNTER14: u16 = 0xb0e;
const CSR_MHPMCOUNTER15: u16 = 0xb0f;
const CSR_MHPMCOUNTER16: u16 = 0xb10;
const CSR_MHPMCOUNTER17: u16 = 0xb11;
const CSR_MHPMCOUNTER18: u16 = 0xb12;
const CSR_MHPMCOUNTER19: u16 = 0xb13;
const CSR_MHPMCOUNTER20: u16 = 0xb14;
const CSR_MHPMCOUNTER21: u16 = 0xb15;
const CSR_MHPMCOUNTER22: u16 = 0xb16;
const CSR_MHPMCOUNTER23: u16 = 0xb17;
const CSR_MHPMCOUNTER24: u16 = 0xb18;
const CSR_MHPMCOUNTER25: u16 = 0xb19;
const CSR_MHPMCOUNTER26: u16 = 0xb1a;
const CSR_MHPMCOUNTER27: u16 = 0xb1b;
const CSR_MHPMCOUNTER28: u16 = 0xb1c;
const CSR_MHPMCOUNTER29: u16 = 0xb1d;
const CSR_MHPMCOUNTER30: u16 = 0xb1e;
const CSR_MHPMCOUNTER31: u16 = 0xb1f;
const CSR_MHPMEVENT3: u16 = 0x323;
const CSR_MHPMEVENT4: u16 = 0x324;
const CSR_MHPMEVENT5: u16 = 0x325;
const CSR_MHPMEVENT6: u16 = 0x326;
const CSR_MHPMEVENT7: u16 = 0x327;
const CSR_MHPMEVENT8: u16 = 0x328;
const CSR_MHPMEVENT9: u16 = 0x329;
const CSR_MHPMEVENT10: u16 = 0x32a;
const CSR_MHPMEVENT11: u16 = 0x32b;
const CSR_MHPMEVENT12: u16 = 0x32c;
const CSR_MHPMEVENT13: u16 = 0x32d;
const CSR_MHPMEVENT14: u16 = 0x32e;
const CSR_MHPMEVENT15: u16 = 0x32f;
const CSR_MHPMEVENT16: u16 = 0x330;
const CSR_MHPMEVENT17: u16 = 0x331;
const CSR_MHPMEVENT18: u16 = 0x332;
const CSR_MHPMEVENT19: u16 = 0x333;
const CSR_MHPMEVENT20: u16 = 0x334;
const CSR_MHPMEVENT21: u16 = 0x335;
const CSR_MHPMEVENT22: u16 = 0x336;
const CSR_MHPMEVENT23: u16 = 0x337;
const CSR_MHPMEVENT24: u16 = 0x338;
const CSR_MHPMEVENT25: u16 = 0x339;
const CSR_MHPMEVENT26: u16 = 0x33a;
const CSR_MHPMEVENT27: u16 = 0x33b;
const CSR_MHPMEVENT28: u16 = 0x33c;
const CSR_MHPMEVENT29: u16 = 0x33d;
const CSR_MHPMEVENT30: u16 = 0x33e;
const CSR_MHPMEVENT31: u16 = 0x33f;
const CSR_MVENDORID: u16 = 0xf11;
const CSR_MARCHID: u16 = 0xf12;
const CSR_MIMPID: u16 = 0xf13;
const CSR_MHARTID: u16 = 0xf14;
const CSR_MCONFIGPTR: u16 = 0xf15;
const CSR_STIMECMPH: u16 = 0x15d;
const CSR_VSTIMECMPH: u16 = 0x25d;
const CSR_HTIMEDELTAH: u16 = 0x615;
const CSR_HENVCFGH: u16 = 0x61a;
const CSR_HSTATEEN0H: u16 = 0x61c;
const CSR_HSTATEEN1H: u16 = 0x61d;
const CSR_HSTATEEN2H: u16 = 0x61e;
const CSR_HSTATEEN3H: u16 = 0x61f;
const CSR_CYCLEH: u16 = 0xc80;
const CSR_TIMEH: u16 = 0xc81;
const CSR_INSTRETH: u16 = 0xc82;
const CSR_HPMCOUNTER3H: u16 = 0xc83;
const CSR_HPMCOUNTER4H: u16 = 0xc84;
const CSR_HPMCOUNTER5H: u16 = 0xc85;
const CSR_HPMCOUNTER6H: u16 = 0xc86;
const CSR_HPMCOUNTER7H: u16 = 0xc87;
const CSR_HPMCOUNTER8H: u16 = 0xc88;
const CSR_HPMCOUNTER9H: u16 = 0xc89;
const CSR_HPMCOUNTER10H: u16 = 0xc8a;
const CSR_HPMCOUNTER11H: u16 = 0xc8b;
const CSR_HPMCOUNTER12H: u16 = 0xc8c;
const CSR_HPMCOUNTER13H: u16 = 0xc8d;
const CSR_HPMCOUNTER14H: u16 = 0xc8e;
const CSR_HPMCOUNTER15H: u16 = 0xc8f;
const CSR_HPMCOUNTER16H: u16 = 0xc90;
const CSR_HPMCOUNTER17H: u16 = 0xc91;
const CSR_HPMCOUNTER18H: u16 = 0xc92;
const CSR_HPMCOUNTER19H: u16 = 0xc93;
const CSR_HPMCOUNTER20H: u16 = 0xc94;
const CSR_HPMCOUNTER21H: u16 = 0xc95;
const CSR_HPMCOUNTER22H: u16 = 0xc96;
const CSR_HPMCOUNTER23H: u16 = 0xc97;
const CSR_HPMCOUNTER24H: u16 = 0xc98;
const CSR_HPMCOUNTER25H: u16 = 0xc99;
const CSR_HPMCOUNTER26H: u16 = 0xc9a;
const CSR_HPMCOUNTER27H: u16 = 0xc9b;
const CSR_HPMCOUNTER28H: u16 = 0xc9c;
const CSR_HPMCOUNTER29H: u16 = 0xc9d;
const CSR_HPMCOUNTER30H: u16 = 0xc9e;
const CSR_HPMCOUNTER31H: u16 = 0xc9f;
const CSR_MSTATUSH: u16 = 0x310;
const CSR_MENVCFGH: u16 = 0x31a;
const CSR_MSTATEEN0H: u16 = 0x31c;
const CSR_MSTATEEN1H: u16 = 0x31d;
const CSR_MSTATEEN2H: u16 = 0x31e;
const CSR_MSTATEEN3H: u16 = 0x31f;
const CSR_MHPMEVENT3H: u16 = 0x723;
const CSR_MHPMEVENT4H: u16 = 0x724;
const CSR_MHPMEVENT5H: u16 = 0x725;
const CSR_MHPMEVENT6H: u16 = 0x726;
const CSR_MHPMEVENT7H: u16 = 0x727;
const CSR_MHPMEVENT8H: u16 = 0x728;
const CSR_MHPMEVENT9H: u16 = 0x729;
const CSR_MHPMEVENT10H: u16 = 0x72a;
const CSR_MHPMEVENT11H: u16 = 0x72b;
const CSR_MHPMEVENT12H: u16 = 0x72c;
const CSR_MHPMEVENT13H: u16 = 0x72d;
const CSR_MHPMEVENT14H: u16 = 0x72e;
const CSR_MHPMEVENT15H: u16 = 0x72f;
const CSR_MHPMEVENT16H: u16 = 0x730;
const CSR_MHPMEVENT17H: u16 = 0x731;
const CSR_MHPMEVENT18H: u16 = 0x732;
const CSR_MHPMEVENT19H: u16 = 0x733;
const CSR_MHPMEVENT20H: u16 = 0x734;
const CSR_MHPMEVENT21H: u16 = 0x735;
const CSR_MHPMEVENT22H: u16 = 0x736;
const CSR_MHPMEVENT23H: u16 = 0x737;
const CSR_MHPMEVENT24H: u16 = 0x738;
const CSR_MHPMEVENT25H: u16 = 0x739;
const CSR_MHPMEVENT26H: u16 = 0x73a;
const CSR_MHPMEVENT27H: u16 = 0x73b;
const CSR_MHPMEVENT28H: u16 = 0x73c;
const CSR_MHPMEVENT29H: u16 = 0x73d;
const CSR_MHPMEVENT30H: u16 = 0x73e;
const CSR_MHPMEVENT31H: u16 = 0x73f;
const CSR_MSECCFGH: u16 = 0x757;
const CSR_MCYCLEH: u16 = 0xb80;
const CSR_MINSTRETH: u16 = 0xb82;
const CSR_MHPMCOUNTER3H: u16 = 0xb83;
const CSR_MHPMCOUNTER4H: u16 = 0xb84;
const CSR_MHPMCOUNTER5H: u16 = 0xb85;
const CSR_MHPMCOUNTER6H: u16 = 0xb86;
const CSR_MHPMCOUNTER7H: u16 = 0xb87;
const CSR_MHPMCOUNTER8H: u16 = 0xb88;
const CSR_MHPMCOUNTER9H: u16 = 0xb89;
const CSR_MHPMCOUNTER10H: u16 = 0xb8a;
const CSR_MHPMCOUNTER11H: u16 = 0xb8b;
const CSR_MHPMCOUNTER12H: u16 = 0xb8c;
const CSR_MHPMCOUNTER13H: u16 = 0xb8d;
const CSR_MHPMCOUNTER14H: u16 = 0xb8e;
const CSR_MHPMCOUNTER15H: u16 = 0xb8f;
const CSR_MHPMCOUNTER16H: u16 = 0xb90;
const CSR_MHPMCOUNTER17H: u16 = 0xb91;
const CSR_MHPMCOUNTER18H: u16 = 0xb92;
const CSR_MHPMCOUNTER19H: u16 = 0xb93;
const CSR_MHPMCOUNTER20H: u16 = 0xb94;
const CSR_MHPMCOUNTER21H: u16 = 0xb95;
const CSR_MHPMCOUNTER22H: u16 = 0xb96;
const CSR_MHPMCOUNTER23H: u16 = 0xb97;
const CSR_MHPMCOUNTER24H: u16 = 0xb98;
const CSR_MHPMCOUNTER25H: u16 = 0xb99;
const CSR_MHPMCOUNTER26H: u16 = 0xb9a;
const CSR_MHPMCOUNTER27H: u16 = 0xb9b;
const CSR_MHPMCOUNTER28H: u16 = 0xb9c;
const CSR_MHPMCOUNTER29H: u16 = 0xb9d;
const CSR_MHPMCOUNTER30H: u16 = 0xb9e;
const CSR_MHPMCOUNTER31H: u16 = 0xb9f;
const CAUSE_MISALIGNED_FETCH: u8 = 0x0;
const CAUSE_FETCH_ACCESS: u8 = 0x1;
const CAUSE_ILLEGAL_INSTRUCTION: u8 = 0x2;
const CAUSE_BREAKPOINT: u8 = 0x3;
const CAUSE_MISALIGNED_LOAD: u8 = 0x4;
const CAUSE_LOAD_ACCESS: u8 = 0x5;
const CAUSE_MISALIGNED_STORE: u8 = 0x6;
const CAUSE_STORE_ACCESS: u8 = 0x7;
const CAUSE_USER_ECALL: u8 = 0x8;
const CAUSE_SUPERVISOR_ECALL: u8 = 0x9;
const CAUSE_VIRTUAL_SUPERVISOR_ECALL: u8 = 0xa;
const CAUSE_MACHINE_ECALL: u8 = 0xb;
const CAUSE_FETCH_PAGE_FAULT: u8 = 0xc;
const CAUSE_LOAD_PAGE_FAULT: u8 = 0xd;
const CAUSE_STORE_PAGE_FAULT: u8 = 0xf;
const CAUSE_FETCH_GUEST_PAGE_FAULT: u8 = 0x14;
const CAUSE_LOAD_GUEST_PAGE_FAULT: u8 = 0x15;
const CAUSE_VIRTUAL_INSTRUCTION: u8 = 0x16;
const CAUSE_STORE_GUEST_PAGE_FAULT: u8 = 0x17;
const ARGS_VAADD_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VAADD_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAADDU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VAADDU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VADC_VIM: &[(&str, usize); 3] = &[("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VADC_VVM: &[(&str, usize); 3] = &[("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VADC_VXM: &[(&str, usize); 3] = &[("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VADD_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VADD_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VADD_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOADDEI16_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOADDEI32_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOADDEI64_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOADDEI8_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOANDEI16_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOANDEI32_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOANDEI64_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOANDEI8_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMAXEI16_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMAXEI32_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMAXEI64_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMAXEI8_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMAXUEI16_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMAXUEI32_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMAXUEI64_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMAXUEI8_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMINEI16_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMINEI32_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMINEI64_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMINEI8_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMINUEI16_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMINUEI32_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMINUEI64_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOMINUEI8_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOOREI16_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOOREI32_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOOREI64_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOOREI8_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOSWAPEI16_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOSWAPEI32_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOSWAPEI64_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOSWAPEI8_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOXOREI16_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOXOREI32_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOXOREI64_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAMOXOREI8_V: &[(&str, usize); 5] =
    &[("wd", 26), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VAND_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VAND_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VAND_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VASUB_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VASUB_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VASUBU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VASUBU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VCOMPRESS_VM: &[(&str, usize); 3] = &[("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VCPOP_M: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("rd", 7)];
const ARGS_VDIV_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VDIV_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VDIVU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VDIVU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFADD_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFADD_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFCLASS_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFCVT_F_X_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFCVT_F_XU_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFCVT_RTZ_X_F_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFCVT_RTZ_XU_F_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFCVT_X_F_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFCVT_XU_F_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFDIV_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFDIV_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFIRST_M: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("rd", 7)];
const ARGS_VFMACC_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFMACC_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFMADD_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFMADD_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFMAX_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFMAX_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFMERGE_VFM: &[(&str, usize); 3] = &[("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFMIN_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFMIN_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFMSAC_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFMSAC_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFMSUB_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFMSUB_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFMUL_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFMUL_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFMV_F_S: &[(&str, usize); 2] = &[("vs2", 20), ("rd", 7)];
const ARGS_VFMV_S_F: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VFMV_V_F: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VFNCVT_F_F_W: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFNCVT_F_X_W: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFNCVT_F_XU_W: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFNCVT_ROD_F_F_W: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFNCVT_RTZ_X_F_W: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFNCVT_RTZ_XU_F_W: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFNCVT_X_F_W: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFNCVT_XU_F_W: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFNMACC_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFNMACC_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFNMADD_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFNMADD_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFNMSAC_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFNMSAC_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFNMSUB_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFNMSUB_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFRDIV_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFREC7_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFREDMAX_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFREDMIN_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFREDOSUM_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFREDUSUM_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFRSQRT7_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFRSUB_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFSGNJ_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFSGNJ_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFSGNJN_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFSGNJN_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFSGNJX_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFSGNJX_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFSLIDE1DOWN_VF: &[(&str, usize); 4] =
    &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFSLIDE1UP_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFSQRT_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFSUB_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFSUB_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFWADD_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFWADD_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFWADD_WF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFWADD_WV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFWCVT_F_F_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFWCVT_F_X_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFWCVT_F_XU_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFWCVT_RTZ_X_F_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFWCVT_RTZ_XU_F_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFWCVT_X_F_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFWCVT_XU_F_V: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VFWMACC_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFWMACC_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFWMSAC_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFWMSAC_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFWMUL_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFWMUL_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFWNMACC_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFWNMACC_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFWNMSAC_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFWNMSAC_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFWREDOSUM_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFWREDUSUM_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFWSUB_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFWSUB_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VFWSUB_WF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VFWSUB_WV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VID_V: &[(&str, usize); 2] = &[("vm", 25), ("vd", 7)];
const ARGS_VIOTA_M: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VL1RE16_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL1RE32_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL1RE64_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL1RE8_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL2RE16_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL2RE32_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL2RE64_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL2RE8_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL4RE16_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL4RE32_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL4RE64_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL4RE8_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL8RE16_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL8RE32_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL8RE64_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VL8RE8_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VLE1024_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE1024FF_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE128_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE128FF_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE16_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE16FF_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE256_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE256FF_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE32_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE32FF_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE512_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE512FF_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE64_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE64FF_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE8_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLE8FF_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vd", 7)];
const ARGS_VLM_V: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VLOXEI1024_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLOXEI128_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLOXEI16_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLOXEI256_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLOXEI32_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLOXEI512_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLOXEI64_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLOXEI8_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLSE1024_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLSE128_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLSE16_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLSE256_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLSE32_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLSE512_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLSE64_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLSE8_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLUXEI1024_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLUXEI128_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLUXEI16_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLUXEI256_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLUXEI32_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLUXEI512_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLUXEI64_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VLUXEI8_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMACC_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMACC_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMADC_VI: &[(&str, usize); 3] = &[("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VMADC_VIM: &[(&str, usize); 3] = &[("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VMADC_VV: &[(&str, usize); 3] = &[("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMADC_VVM: &[(&str, usize); 3] = &[("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMADC_VX: &[(&str, usize); 3] = &[("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMADC_VXM: &[(&str, usize); 3] = &[("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMADD_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMADD_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMAND_MM: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMANDN_MM: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMAX_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMAX_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMAXU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMAXU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMERGE_VIM: &[(&str, usize); 3] = &[("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VMERGE_VVM: &[(&str, usize); 3] = &[("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMERGE_VXM: &[(&str, usize); 3] = &[("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMFEQ_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMFEQ_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMFGE_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMFGT_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMFLE_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMFLE_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMFLT_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMFLT_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMFNE_VF: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMFNE_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMIN_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMIN_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMINU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMINU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMNAND_MM: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMNOR_MM: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMOR_MM: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMORN_MM: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMSBC_VV: &[(&str, usize); 3] = &[("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMSBC_VVM: &[(&str, usize); 3] = &[("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMSBC_VX: &[(&str, usize); 3] = &[("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMSBC_VXM: &[(&str, usize); 3] = &[("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMSBF_M: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VMSEQ_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VMSEQ_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMSEQ_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMSGT_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VMSGT_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMSGTU_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VMSGTU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMSIF_M: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VMSLE_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VMSLE_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMSLE_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMSLEU_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VMSLEU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMSLEU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMSLT_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMSLT_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMSLTU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMSLTU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMSNE_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VMSNE_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMSNE_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMSOF_M: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VMUL_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMUL_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMULH_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMULH_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMULHSU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMULHSU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMULHU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMULHU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VMV1R_V: &[(&str, usize); 2] = &[("vs2", 20), ("vd", 7)];
const ARGS_VMV2R_V: &[(&str, usize); 2] = &[("vs2", 20), ("vd", 7)];
const ARGS_VMV4R_V: &[(&str, usize); 2] = &[("vs2", 20), ("vd", 7)];
const ARGS_VMV8R_V: &[(&str, usize); 2] = &[("vs2", 20), ("vd", 7)];
const ARGS_VMV_S_X: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VMV_V_I: &[(&str, usize); 2] = &[("simm5", 15), ("vd", 7)];
const ARGS_VMV_V_V: &[(&str, usize); 2] = &[("vs1", 15), ("vd", 7)];
const ARGS_VMV_V_X: &[(&str, usize); 2] = &[("rs1", 15), ("vd", 7)];
const ARGS_VMV_X_S: &[(&str, usize); 2] = &[("vs2", 20), ("rd", 7)];
const ARGS_VMXNOR_MM: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VMXOR_MM: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VNCLIP_WI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VNCLIP_WV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VNCLIP_WX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VNCLIPU_WI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VNCLIPU_WV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VNCLIPU_WX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VNMSAC_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VNMSAC_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VNMSUB_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VNMSUB_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VNSRA_WI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VNSRA_WV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VNSRA_WX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VNSRL_WI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VNSRL_WV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VNSRL_WX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VOR_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VOR_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VOR_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VREDAND_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VREDMAX_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VREDMAXU_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VREDMIN_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VREDMINU_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VREDOR_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VREDSUM_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VREDXOR_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VREM_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VREM_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VREMU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VREMU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VRGATHER_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VRGATHER_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VRGATHER_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VRGATHEREI16_VV: &[(&str, usize); 4] =
    &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VRSUB_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VRSUB_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VS1R_V: &[(&str, usize); 2] = &[("rs1", 15), ("vs3", 7)];
const ARGS_VS2R_V: &[(&str, usize); 2] = &[("rs1", 15), ("vs3", 7)];
const ARGS_VS4R_V: &[(&str, usize); 2] = &[("rs1", 15), ("vs3", 7)];
const ARGS_VS8R_V: &[(&str, usize); 2] = &[("rs1", 15), ("vs3", 7)];
const ARGS_VSADD_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VSADD_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VSADD_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSADDU_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VSADDU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VSADDU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSBC_VVM: &[(&str, usize); 3] = &[("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VSBC_VXM: &[(&str, usize); 3] = &[("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSE1024_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vs3", 7)];
const ARGS_VSE128_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vs3", 7)];
const ARGS_VSE16_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vs3", 7)];
const ARGS_VSE256_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vs3", 7)];
const ARGS_VSE32_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vs3", 7)];
const ARGS_VSE512_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vs3", 7)];
const ARGS_VSE64_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vs3", 7)];
const ARGS_VSE8_V: &[(&str, usize); 4] = &[("nf", 29), ("vm", 25), ("rs1", 15), ("vs3", 7)];
const ARGS_VSETIVLI: &[(&str, usize); 3] = &[("zimm10", 20), ("zimm", 15), ("rd", 7)];
const ARGS_VSETVL: &[(&str, usize); 3] = &[("rs2", 20), ("rs1", 15), ("rd", 7)];
const ARGS_VSETVLI: &[(&str, usize); 3] = &[("zimm11", 20), ("rs1", 15), ("rd", 7)];
const ARGS_VSEXT_VF2: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VSEXT_VF4: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VSEXT_VF8: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VSLIDE1DOWN_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSLIDE1UP_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSLIDEDOWN_VI: &[(&str, usize); 4] =
    &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VSLIDEDOWN_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSLIDEUP_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VSLIDEUP_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSLL_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VSLL_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VSLL_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSM_V: &[(&str, usize); 2] = &[("rs1", 15), ("vs3", 7)];
const ARGS_VSMUL_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VSMUL_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSOXEI1024_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSOXEI128_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSOXEI16_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSOXEI256_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSOXEI32_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSOXEI512_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSOXEI64_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSOXEI8_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSRA_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VSRA_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VSRA_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSRL_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VSRL_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VSRL_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSSE1024_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSSE128_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSSE16_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSSE256_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSSE32_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSSE512_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSSE64_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSSE8_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("rs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSSRA_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VSSRA_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VSSRA_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSSRL_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VSSRL_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VSSRL_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSSUB_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VSSUB_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSSUBU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VSSUBU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSUB_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VSUB_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VSUXEI1024_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSUXEI128_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSUXEI16_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSUXEI256_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSUXEI32_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSUXEI512_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSUXEI64_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VSUXEI8_V: &[(&str, usize); 5] =
    &[("nf", 29), ("vm", 25), ("vs2", 20), ("rs1", 15), ("vs3", 7)];
const ARGS_VWADD_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWADD_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VWADD_WV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWADD_WX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VWADDU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWADDU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VWADDU_WV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWADDU_WX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VWMACC_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWMACC_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VWMACCSU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWMACCSU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VWMACCU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWMACCU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VWMACCUS_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VWMUL_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWMUL_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VWMULSU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWMULSU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VWMULU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWMULU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VWREDSUM_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWREDSUMU_VS: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWSUB_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWSUB_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VWSUB_WV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWSUB_WX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VWSUBU_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWSUBU_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VWSUBU_WV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VWSUBU_WX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VXOR_VI: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("simm5", 15), ("vd", 7)];
const ARGS_VXOR_VV: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("vs1", 15), ("vd", 7)];
const ARGS_VXOR_VX: &[(&str, usize); 4] = &[("vm", 25), ("vs2", 20), ("rs1", 15), ("vd", 7)];
const ARGS_VZEXT_VF2: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VZEXT_VF4: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
const ARGS_VZEXT_VF8: &[(&str, usize); 3] = &[("vm", 25), ("vs2", 20), ("vd", 7)];
pub const INSTRUCTIONS: [(&str, u32, &[(&str, usize)]); 447] = [
    ("vaadd.vv", MATCH_VAADD_VV, ARGS_VAADD_VV),
    ("vaadd.vx", MATCH_VAADD_VX, ARGS_VAADD_VX),
    ("vaaddu.vv", MATCH_VAADDU_VV, ARGS_VAADDU_VV),
    ("vaaddu.vx", MATCH_VAADDU_VX, ARGS_VAADDU_VX),
    ("vadc.vim", MATCH_VADC_VIM, ARGS_VADC_VIM),
    ("vadc.vvm", MATCH_VADC_VVM, ARGS_VADC_VVM),
    ("vadc.vxm", MATCH_VADC_VXM, ARGS_VADC_VXM),
    ("vadd.vi", MATCH_VADD_VI, ARGS_VADD_VI),
    ("vadd.vv", MATCH_VADD_VV, ARGS_VADD_VV),
    ("vadd.vx", MATCH_VADD_VX, ARGS_VADD_VX),
    ("vamoaddei16.v", MATCH_VAMOADDEI16_V, ARGS_VAMOADDEI16_V),
    ("vamoaddei32.v", MATCH_VAMOADDEI32_V, ARGS_VAMOADDEI32_V),
    ("vamoaddei64.v", MATCH_VAMOADDEI64_V, ARGS_VAMOADDEI64_V),
    ("vamoaddei8.v", MATCH_VAMOADDEI8_V, ARGS_VAMOADDEI8_V),
    ("vamoandei16.v", MATCH_VAMOANDEI16_V, ARGS_VAMOANDEI16_V),
    ("vamoandei32.v", MATCH_VAMOANDEI32_V, ARGS_VAMOANDEI32_V),
    ("vamoandei64.v", MATCH_VAMOANDEI64_V, ARGS_VAMOANDEI64_V),
    ("vamoandei8.v", MATCH_VAMOANDEI8_V, ARGS_VAMOANDEI8_V),
    ("vamomaxei16.v", MATCH_VAMOMAXEI16_V, ARGS_VAMOMAXEI16_V),
    ("vamomaxei32.v", MATCH_VAMOMAXEI32_V, ARGS_VAMOMAXEI32_V),
    ("vamomaxei64.v", MATCH_VAMOMAXEI64_V, ARGS_VAMOMAXEI64_V),
    ("vamomaxei8.v", MATCH_VAMOMAXEI8_V, ARGS_VAMOMAXEI8_V),
    ("vamomaxuei16.v", MATCH_VAMOMAXUEI16_V, ARGS_VAMOMAXUEI16_V),
    ("vamomaxuei32.v", MATCH_VAMOMAXUEI32_V, ARGS_VAMOMAXUEI32_V),
    ("vamomaxuei64.v", MATCH_VAMOMAXUEI64_V, ARGS_VAMOMAXUEI64_V),
    ("vamomaxuei8.v", MATCH_VAMOMAXUEI8_V, ARGS_VAMOMAXUEI8_V),
    ("vamominei16.v", MATCH_VAMOMINEI16_V, ARGS_VAMOMINEI16_V),
    ("vamominei32.v", MATCH_VAMOMINEI32_V, ARGS_VAMOMINEI32_V),
    ("vamominei64.v", MATCH_VAMOMINEI64_V, ARGS_VAMOMINEI64_V),
    ("vamominei8.v", MATCH_VAMOMINEI8_V, ARGS_VAMOMINEI8_V),
    ("vamominuei16.v", MATCH_VAMOMINUEI16_V, ARGS_VAMOMINUEI16_V),
    ("vamominuei32.v", MATCH_VAMOMINUEI32_V, ARGS_VAMOMINUEI32_V),
    ("vamominuei64.v", MATCH_VAMOMINUEI64_V, ARGS_VAMOMINUEI64_V),
    ("vamominuei8.v", MATCH_VAMOMINUEI8_V, ARGS_VAMOMINUEI8_V),
    ("vamoorei16.v", MATCH_VAMOOREI16_V, ARGS_VAMOOREI16_V),
    ("vamoorei32.v", MATCH_VAMOOREI32_V, ARGS_VAMOOREI32_V),
    ("vamoorei64.v", MATCH_VAMOOREI64_V, ARGS_VAMOOREI64_V),
    ("vamoorei8.v", MATCH_VAMOOREI8_V, ARGS_VAMOOREI8_V),
    ("vamoswapei16.v", MATCH_VAMOSWAPEI16_V, ARGS_VAMOSWAPEI16_V),
    ("vamoswapei32.v", MATCH_VAMOSWAPEI32_V, ARGS_VAMOSWAPEI32_V),
    ("vamoswapei64.v", MATCH_VAMOSWAPEI64_V, ARGS_VAMOSWAPEI64_V),
    ("vamoswapei8.v", MATCH_VAMOSWAPEI8_V, ARGS_VAMOSWAPEI8_V),
    ("vamoxorei16.v", MATCH_VAMOXOREI16_V, ARGS_VAMOXOREI16_V),
    ("vamoxorei32.v", MATCH_VAMOXOREI32_V, ARGS_VAMOXOREI32_V),
    ("vamoxorei64.v", MATCH_VAMOXOREI64_V, ARGS_VAMOXOREI64_V),
    ("vamoxorei8.v", MATCH_VAMOXOREI8_V, ARGS_VAMOXOREI8_V),
    ("vand.vi", MATCH_VAND_VI, ARGS_VAND_VI),
    ("vand.vv", MATCH_VAND_VV, ARGS_VAND_VV),
    ("vand.vx", MATCH_VAND_VX, ARGS_VAND_VX),
    ("vasub.vv", MATCH_VASUB_VV, ARGS_VASUB_VV),
    ("vasub.vx", MATCH_VASUB_VX, ARGS_VASUB_VX),
    ("vasubu.vv", MATCH_VASUBU_VV, ARGS_VASUBU_VV),
    ("vasubu.vx", MATCH_VASUBU_VX, ARGS_VASUBU_VX),
    ("vcompress.vm", MATCH_VCOMPRESS_VM, ARGS_VCOMPRESS_VM),
    ("vcpop.m", MATCH_VCPOP_M, ARGS_VCPOP_M),
    ("vdiv.vv", MATCH_VDIV_VV, ARGS_VDIV_VV),
    ("vdiv.vx", MATCH_VDIV_VX, ARGS_VDIV_VX),
    ("vdivu.vv", MATCH_VDIVU_VV, ARGS_VDIVU_VV),
    ("vdivu.vx", MATCH_VDIVU_VX, ARGS_VDIVU_VX),
    ("vfadd.vf", MATCH_VFADD_VF, ARGS_VFADD_VF),
    ("vfadd.vv", MATCH_VFADD_VV, ARGS_VFADD_VV),
    ("vfclass.v", MATCH_VFCLASS_V, ARGS_VFCLASS_V),
    ("vfcvt.f.x.v", MATCH_VFCVT_F_X_V, ARGS_VFCVT_F_X_V),
    ("vfcvt.f.xu.v", MATCH_VFCVT_F_XU_V, ARGS_VFCVT_F_XU_V),
    (
        "vfcvt.rtz.x.f.v",
        MATCH_VFCVT_RTZ_X_F_V,
        ARGS_VFCVT_RTZ_X_F_V,
    ),
    (
        "vfcvt.rtz.xu.f.v",
        MATCH_VFCVT_RTZ_XU_F_V,
        ARGS_VFCVT_RTZ_XU_F_V,
    ),
    ("vfcvt.x.f.v", MATCH_VFCVT_X_F_V, ARGS_VFCVT_X_F_V),
    ("vfcvt.xu.f.v", MATCH_VFCVT_XU_F_V, ARGS_VFCVT_XU_F_V),
    ("vfdiv.vf", MATCH_VFDIV_VF, ARGS_VFDIV_VF),
    ("vfdiv.vv", MATCH_VFDIV_VV, ARGS_VFDIV_VV),
    ("vfirst.m", MATCH_VFIRST_M, ARGS_VFIRST_M),
    ("vfmacc.vf", MATCH_VFMACC_VF, ARGS_VFMACC_VF),
    ("vfmacc.vv", MATCH_VFMACC_VV, ARGS_VFMACC_VV),
    ("vfmadd.vf", MATCH_VFMADD_VF, ARGS_VFMADD_VF),
    ("vfmadd.vv", MATCH_VFMADD_VV, ARGS_VFMADD_VV),
    ("vfmax.vf", MATCH_VFMAX_VF, ARGS_VFMAX_VF),
    ("vfmax.vv", MATCH_VFMAX_VV, ARGS_VFMAX_VV),
    ("vfmerge.vfm", MATCH_VFMERGE_VFM, ARGS_VFMERGE_VFM),
    ("vfmin.vf", MATCH_VFMIN_VF, ARGS_VFMIN_VF),
    ("vfmin.vv", MATCH_VFMIN_VV, ARGS_VFMIN_VV),
    ("vfmsac.vf", MATCH_VFMSAC_VF, ARGS_VFMSAC_VF),
    ("vfmsac.vv", MATCH_VFMSAC_VV, ARGS_VFMSAC_VV),
    ("vfmsub.vf", MATCH_VFMSUB_VF, ARGS_VFMSUB_VF),
    ("vfmsub.vv", MATCH_VFMSUB_VV, ARGS_VFMSUB_VV),
    ("vfmul.vf", MATCH_VFMUL_VF, ARGS_VFMUL_VF),
    ("vfmul.vv", MATCH_VFMUL_VV, ARGS_VFMUL_VV),
    ("vfmv.f.s", MATCH_VFMV_F_S, ARGS_VFMV_F_S),
    ("vfmv.s.f", MATCH_VFMV_S_F, ARGS_VFMV_S_F),
    ("vfmv.v.f", MATCH_VFMV_V_F, ARGS_VFMV_V_F),
    ("vfncvt.f.f.w", MATCH_VFNCVT_F_F_W, ARGS_VFNCVT_F_F_W),
    ("vfncvt.f.x.w", MATCH_VFNCVT_F_X_W, ARGS_VFNCVT_F_X_W),
    ("vfncvt.f.xu.w", MATCH_VFNCVT_F_XU_W, ARGS_VFNCVT_F_XU_W),
    (
        "vfncvt.rod.f.f.w",
        MATCH_VFNCVT_ROD_F_F_W,
        ARGS_VFNCVT_ROD_F_F_W,
    ),
    (
        "vfncvt.rtz.x.f.w",
        MATCH_VFNCVT_RTZ_X_F_W,
        ARGS_VFNCVT_RTZ_X_F_W,
    ),
    (
        "vfncvt.rtz.xu.f.w",
        MATCH_VFNCVT_RTZ_XU_F_W,
        ARGS_VFNCVT_RTZ_XU_F_W,
    ),
    ("vfncvt.x.f.w", MATCH_VFNCVT_X_F_W, ARGS_VFNCVT_X_F_W),
    ("vfncvt.xu.f.w", MATCH_VFNCVT_XU_F_W, ARGS_VFNCVT_XU_F_W),
    ("vfnmacc.vf", MATCH_VFNMACC_VF, ARGS_VFNMACC_VF),
    ("vfnmacc.vv", MATCH_VFNMACC_VV, ARGS_VFNMACC_VV),
    ("vfnmadd.vf", MATCH_VFNMADD_VF, ARGS_VFNMADD_VF),
    ("vfnmadd.vv", MATCH_VFNMADD_VV, ARGS_VFNMADD_VV),
    ("vfnmsac.vf", MATCH_VFNMSAC_VF, ARGS_VFNMSAC_VF),
    ("vfnmsac.vv", MATCH_VFNMSAC_VV, ARGS_VFNMSAC_VV),
    ("vfnmsub.vf", MATCH_VFNMSUB_VF, ARGS_VFNMSUB_VF),
    ("vfnmsub.vv", MATCH_VFNMSUB_VV, ARGS_VFNMSUB_VV),
    ("vfrdiv.vf", MATCH_VFRDIV_VF, ARGS_VFRDIV_VF),
    ("vfrec7.v", MATCH_VFREC7_V, ARGS_VFREC7_V),
    ("vfredmax.vs", MATCH_VFREDMAX_VS, ARGS_VFREDMAX_VS),
    ("vfredmin.vs", MATCH_VFREDMIN_VS, ARGS_VFREDMIN_VS),
    ("vfredosum.vs", MATCH_VFREDOSUM_VS, ARGS_VFREDOSUM_VS),
    ("vfredusum.vs", MATCH_VFREDUSUM_VS, ARGS_VFREDUSUM_VS),
    ("vfrsqrt7.v", MATCH_VFRSQRT7_V, ARGS_VFRSQRT7_V),
    ("vfrsub.vf", MATCH_VFRSUB_VF, ARGS_VFRSUB_VF),
    ("vfsgnj.vf", MATCH_VFSGNJ_VF, ARGS_VFSGNJ_VF),
    ("vfsgnj.vv", MATCH_VFSGNJ_VV, ARGS_VFSGNJ_VV),
    ("vfsgnjn.vf", MATCH_VFSGNJN_VF, ARGS_VFSGNJN_VF),
    ("vfsgnjn.vv", MATCH_VFSGNJN_VV, ARGS_VFSGNJN_VV),
    ("vfsgnjx.vf", MATCH_VFSGNJX_VF, ARGS_VFSGNJX_VF),
    ("vfsgnjx.vv", MATCH_VFSGNJX_VV, ARGS_VFSGNJX_VV),
    (
        "vfslide1down.vf",
        MATCH_VFSLIDE1DOWN_VF,
        ARGS_VFSLIDE1DOWN_VF,
    ),
    ("vfslide1up.vf", MATCH_VFSLIDE1UP_VF, ARGS_VFSLIDE1UP_VF),
    ("vfsqrt.v", MATCH_VFSQRT_V, ARGS_VFSQRT_V),
    ("vfsub.vf", MATCH_VFSUB_VF, ARGS_VFSUB_VF),
    ("vfsub.vv", MATCH_VFSUB_VV, ARGS_VFSUB_VV),
    ("vfwadd.vf", MATCH_VFWADD_VF, ARGS_VFWADD_VF),
    ("vfwadd.vv", MATCH_VFWADD_VV, ARGS_VFWADD_VV),
    ("vfwadd.wf", MATCH_VFWADD_WF, ARGS_VFWADD_WF),
    ("vfwadd.wv", MATCH_VFWADD_WV, ARGS_VFWADD_WV),
    ("vfwcvt.f.f.v", MATCH_VFWCVT_F_F_V, ARGS_VFWCVT_F_F_V),
    ("vfwcvt.f.x.v", MATCH_VFWCVT_F_X_V, ARGS_VFWCVT_F_X_V),
    ("vfwcvt.f.xu.v", MATCH_VFWCVT_F_XU_V, ARGS_VFWCVT_F_XU_V),
    (
        "vfwcvt.rtz.x.f.v",
        MATCH_VFWCVT_RTZ_X_F_V,
        ARGS_VFWCVT_RTZ_X_F_V,
    ),
    (
        "vfwcvt.rtz.xu.f.v",
        MATCH_VFWCVT_RTZ_XU_F_V,
        ARGS_VFWCVT_RTZ_XU_F_V,
    ),
    ("vfwcvt.x.f.v", MATCH_VFWCVT_X_F_V, ARGS_VFWCVT_X_F_V),
    ("vfwcvt.xu.f.v", MATCH_VFWCVT_XU_F_V, ARGS_VFWCVT_XU_F_V),
    ("vfwmacc.vf", MATCH_VFWMACC_VF, ARGS_VFWMACC_VF),
    ("vfwmacc.vv", MATCH_VFWMACC_VV, ARGS_VFWMACC_VV),
    ("vfwmsac.vf", MATCH_VFWMSAC_VF, ARGS_VFWMSAC_VF),
    ("vfwmsac.vv", MATCH_VFWMSAC_VV, ARGS_VFWMSAC_VV),
    ("vfwmul.vf", MATCH_VFWMUL_VF, ARGS_VFWMUL_VF),
    ("vfwmul.vv", MATCH_VFWMUL_VV, ARGS_VFWMUL_VV),
    ("vfwnmacc.vf", MATCH_VFWNMACC_VF, ARGS_VFWNMACC_VF),
    ("vfwnmacc.vv", MATCH_VFWNMACC_VV, ARGS_VFWNMACC_VV),
    ("vfwnmsac.vf", MATCH_VFWNMSAC_VF, ARGS_VFWNMSAC_VF),
    ("vfwnmsac.vv", MATCH_VFWNMSAC_VV, ARGS_VFWNMSAC_VV),
    ("vfwredosum.vs", MATCH_VFWREDOSUM_VS, ARGS_VFWREDOSUM_VS),
    ("vfwredusum.vs", MATCH_VFWREDUSUM_VS, ARGS_VFWREDUSUM_VS),
    ("vfwsub.vf", MATCH_VFWSUB_VF, ARGS_VFWSUB_VF),
    ("vfwsub.vv", MATCH_VFWSUB_VV, ARGS_VFWSUB_VV),
    ("vfwsub.wf", MATCH_VFWSUB_WF, ARGS_VFWSUB_WF),
    ("vfwsub.wv", MATCH_VFWSUB_WV, ARGS_VFWSUB_WV),
    ("vid.v", MATCH_VID_V, ARGS_VID_V),
    ("viota.m", MATCH_VIOTA_M, ARGS_VIOTA_M),
    ("vl1re16.v", MATCH_VL1RE16_V, ARGS_VL1RE16_V),
    ("vl1re32.v", MATCH_VL1RE32_V, ARGS_VL1RE32_V),
    ("vl1re64.v", MATCH_VL1RE64_V, ARGS_VL1RE64_V),
    ("vl1re8.v", MATCH_VL1RE8_V, ARGS_VL1RE8_V),
    ("vl2re16.v", MATCH_VL2RE16_V, ARGS_VL2RE16_V),
    ("vl2re32.v", MATCH_VL2RE32_V, ARGS_VL2RE32_V),
    ("vl2re64.v", MATCH_VL2RE64_V, ARGS_VL2RE64_V),
    ("vl2re8.v", MATCH_VL2RE8_V, ARGS_VL2RE8_V),
    ("vl4re16.v", MATCH_VL4RE16_V, ARGS_VL4RE16_V),
    ("vl4re32.v", MATCH_VL4RE32_V, ARGS_VL4RE32_V),
    ("vl4re64.v", MATCH_VL4RE64_V, ARGS_VL4RE64_V),
    ("vl4re8.v", MATCH_VL4RE8_V, ARGS_VL4RE8_V),
    ("vl8re16.v", MATCH_VL8RE16_V, ARGS_VL8RE16_V),
    ("vl8re32.v", MATCH_VL8RE32_V, ARGS_VL8RE32_V),
    ("vl8re64.v", MATCH_VL8RE64_V, ARGS_VL8RE64_V),
    ("vl8re8.v", MATCH_VL8RE8_V, ARGS_VL8RE8_V),
    ("vle1024.v", MATCH_VLE1024_V, ARGS_VLE1024_V),
    ("vle1024ff.v", MATCH_VLE1024FF_V, ARGS_VLE1024FF_V),
    ("vle128.v", MATCH_VLE128_V, ARGS_VLE128_V),
    ("vle128ff.v", MATCH_VLE128FF_V, ARGS_VLE128FF_V),
    ("vle16.v", MATCH_VLE16_V, ARGS_VLE16_V),
    ("vle16ff.v", MATCH_VLE16FF_V, ARGS_VLE16FF_V),
    ("vle256.v", MATCH_VLE256_V, ARGS_VLE256_V),
    ("vle256ff.v", MATCH_VLE256FF_V, ARGS_VLE256FF_V),
    ("vle32.v", MATCH_VLE32_V, ARGS_VLE32_V),
    ("vle32ff.v", MATCH_VLE32FF_V, ARGS_VLE32FF_V),
    ("vle512.v", MATCH_VLE512_V, ARGS_VLE512_V),
    ("vle512ff.v", MATCH_VLE512FF_V, ARGS_VLE512FF_V),
    ("vle64.v", MATCH_VLE64_V, ARGS_VLE64_V),
    ("vle64ff.v", MATCH_VLE64FF_V, ARGS_VLE64FF_V),
    ("vle8.v", MATCH_VLE8_V, ARGS_VLE8_V),
    ("vle8ff.v", MATCH_VLE8FF_V, ARGS_VLE8FF_V),
    ("vlm.v", MATCH_VLM_V, ARGS_VLM_V),
    ("vloxei1024.v", MATCH_VLOXEI1024_V, ARGS_VLOXEI1024_V),
    ("vloxei128.v", MATCH_VLOXEI128_V, ARGS_VLOXEI128_V),
    ("vloxei16.v", MATCH_VLOXEI16_V, ARGS_VLOXEI16_V),
    ("vloxei256.v", MATCH_VLOXEI256_V, ARGS_VLOXEI256_V),
    ("vloxei32.v", MATCH_VLOXEI32_V, ARGS_VLOXEI32_V),
    ("vloxei512.v", MATCH_VLOXEI512_V, ARGS_VLOXEI512_V),
    ("vloxei64.v", MATCH_VLOXEI64_V, ARGS_VLOXEI64_V),
    ("vloxei8.v", MATCH_VLOXEI8_V, ARGS_VLOXEI8_V),
    ("vlse1024.v", MATCH_VLSE1024_V, ARGS_VLSE1024_V),
    ("vlse128.v", MATCH_VLSE128_V, ARGS_VLSE128_V),
    ("vlse16.v", MATCH_VLSE16_V, ARGS_VLSE16_V),
    ("vlse256.v", MATCH_VLSE256_V, ARGS_VLSE256_V),
    ("vlse32.v", MATCH_VLSE32_V, ARGS_VLSE32_V),
    ("vlse512.v", MATCH_VLSE512_V, ARGS_VLSE512_V),
    ("vlse64.v", MATCH_VLSE64_V, ARGS_VLSE64_V),
    ("vlse8.v", MATCH_VLSE8_V, ARGS_VLSE8_V),
    ("vluxei1024.v", MATCH_VLUXEI1024_V, ARGS_VLUXEI1024_V),
    ("vluxei128.v", MATCH_VLUXEI128_V, ARGS_VLUXEI128_V),
    ("vluxei16.v", MATCH_VLUXEI16_V, ARGS_VLUXEI16_V),
    ("vluxei256.v", MATCH_VLUXEI256_V, ARGS_VLUXEI256_V),
    ("vluxei32.v", MATCH_VLUXEI32_V, ARGS_VLUXEI32_V),
    ("vluxei512.v", MATCH_VLUXEI512_V, ARGS_VLUXEI512_V),
    ("vluxei64.v", MATCH_VLUXEI64_V, ARGS_VLUXEI64_V),
    ("vluxei8.v", MATCH_VLUXEI8_V, ARGS_VLUXEI8_V),
    ("vmacc.vv", MATCH_VMACC_VV, ARGS_VMACC_VV),
    ("vmacc.vx", MATCH_VMACC_VX, ARGS_VMACC_VX),
    ("vmadc.vi", MATCH_VMADC_VI, ARGS_VMADC_VI),
    ("vmadc.vim", MATCH_VMADC_VIM, ARGS_VMADC_VIM),
    ("vmadc.vv", MATCH_VMADC_VV, ARGS_VMADC_VV),
    ("vmadc.vvm", MATCH_VMADC_VVM, ARGS_VMADC_VVM),
    ("vmadc.vx", MATCH_VMADC_VX, ARGS_VMADC_VX),
    ("vmadc.vxm", MATCH_VMADC_VXM, ARGS_VMADC_VXM),
    ("vmadd.vv", MATCH_VMADD_VV, ARGS_VMADD_VV),
    ("vmadd.vx", MATCH_VMADD_VX, ARGS_VMADD_VX),
    ("vmand.mm", MATCH_VMAND_MM, ARGS_VMAND_MM),
    ("vmandn.mm", MATCH_VMANDN_MM, ARGS_VMANDN_MM),
    ("vmax.vv", MATCH_VMAX_VV, ARGS_VMAX_VV),
    ("vmax.vx", MATCH_VMAX_VX, ARGS_VMAX_VX),
    ("vmaxu.vv", MATCH_VMAXU_VV, ARGS_VMAXU_VV),
    ("vmaxu.vx", MATCH_VMAXU_VX, ARGS_VMAXU_VX),
    ("vmerge.vim", MATCH_VMERGE_VIM, ARGS_VMERGE_VIM),
    ("vmerge.vvm", MATCH_VMERGE_VVM, ARGS_VMERGE_VVM),
    ("vmerge.vxm", MATCH_VMERGE_VXM, ARGS_VMERGE_VXM),
    ("vmfeq.vf", MATCH_VMFEQ_VF, ARGS_VMFEQ_VF),
    ("vmfeq.vv", MATCH_VMFEQ_VV, ARGS_VMFEQ_VV),
    ("vmfge.vf", MATCH_VMFGE_VF, ARGS_VMFGE_VF),
    ("vmfgt.vf", MATCH_VMFGT_VF, ARGS_VMFGT_VF),
    ("vmfle.vf", MATCH_VMFLE_VF, ARGS_VMFLE_VF),
    ("vmfle.vv", MATCH_VMFLE_VV, ARGS_VMFLE_VV),
    ("vmflt.vf", MATCH_VMFLT_VF, ARGS_VMFLT_VF),
    ("vmflt.vv", MATCH_VMFLT_VV, ARGS_VMFLT_VV),
    ("vmfne.vf", MATCH_VMFNE_VF, ARGS_VMFNE_VF),
    ("vmfne.vv", MATCH_VMFNE_VV, ARGS_VMFNE_VV),
    ("vmin.vv", MATCH_VMIN_VV, ARGS_VMIN_VV),
    ("vmin.vx", MATCH_VMIN_VX, ARGS_VMIN_VX),
    ("vminu.vv", MATCH_VMINU_VV, ARGS_VMINU_VV),
    ("vminu.vx", MATCH_VMINU_VX, ARGS_VMINU_VX),
    ("vmnand.mm", MATCH_VMNAND_MM, ARGS_VMNAND_MM),
    ("vmnor.mm", MATCH_VMNOR_MM, ARGS_VMNOR_MM),
    ("vmor.mm", MATCH_VMOR_MM, ARGS_VMOR_MM),
    ("vmorn.mm", MATCH_VMORN_MM, ARGS_VMORN_MM),
    ("vmsbc.vv", MATCH_VMSBC_VV, ARGS_VMSBC_VV),
    ("vmsbc.vvm", MATCH_VMSBC_VVM, ARGS_VMSBC_VVM),
    ("vmsbc.vx", MATCH_VMSBC_VX, ARGS_VMSBC_VX),
    ("vmsbc.vxm", MATCH_VMSBC_VXM, ARGS_VMSBC_VXM),
    ("vmsbf.m", MATCH_VMSBF_M, ARGS_VMSBF_M),
    ("vmseq.vi", MATCH_VMSEQ_VI, ARGS_VMSEQ_VI),
    ("vmseq.vv", MATCH_VMSEQ_VV, ARGS_VMSEQ_VV),
    ("vmseq.vx", MATCH_VMSEQ_VX, ARGS_VMSEQ_VX),
    ("vmsgt.vi", MATCH_VMSGT_VI, ARGS_VMSGT_VI),
    ("vmsgt.vx", MATCH_VMSGT_VX, ARGS_VMSGT_VX),
    ("vmsgtu.vi", MATCH_VMSGTU_VI, ARGS_VMSGTU_VI),
    ("vmsgtu.vx", MATCH_VMSGTU_VX, ARGS_VMSGTU_VX),
    ("vmsif.m", MATCH_VMSIF_M, ARGS_VMSIF_M),
    ("vmsle.vi", MATCH_VMSLE_VI, ARGS_VMSLE_VI),
    ("vmsle.vv", MATCH_VMSLE_VV, ARGS_VMSLE_VV),
    ("vmsle.vx", MATCH_VMSLE_VX, ARGS_VMSLE_VX),
    ("vmsleu.vi", MATCH_VMSLEU_VI, ARGS_VMSLEU_VI),
    ("vmsleu.vv", MATCH_VMSLEU_VV, ARGS_VMSLEU_VV),
    ("vmsleu.vx", MATCH_VMSLEU_VX, ARGS_VMSLEU_VX),
    ("vmslt.vv", MATCH_VMSLT_VV, ARGS_VMSLT_VV),
    ("vmslt.vx", MATCH_VMSLT_VX, ARGS_VMSLT_VX),
    ("vmsltu.vv", MATCH_VMSLTU_VV, ARGS_VMSLTU_VV),
    ("vmsltu.vx", MATCH_VMSLTU_VX, ARGS_VMSLTU_VX),
    ("vmsne.vi", MATCH_VMSNE_VI, ARGS_VMSNE_VI),
    ("vmsne.vv", MATCH_VMSNE_VV, ARGS_VMSNE_VV),
    ("vmsne.vx", MATCH_VMSNE_VX, ARGS_VMSNE_VX),
    ("vmsof.m", MATCH_VMSOF_M, ARGS_VMSOF_M),
    ("vmul.vv", MATCH_VMUL_VV, ARGS_VMUL_VV),
    ("vmul.vx", MATCH_VMUL_VX, ARGS_VMUL_VX),
    ("vmulh.vv", MATCH_VMULH_VV, ARGS_VMULH_VV),
    ("vmulh.vx", MATCH_VMULH_VX, ARGS_VMULH_VX),
    ("vmulhsu.vv", MATCH_VMULHSU_VV, ARGS_VMULHSU_VV),
    ("vmulhsu.vx", MATCH_VMULHSU_VX, ARGS_VMULHSU_VX),
    ("vmulhu.vv", MATCH_VMULHU_VV, ARGS_VMULHU_VV),
    ("vmulhu.vx", MATCH_VMULHU_VX, ARGS_VMULHU_VX),
    ("vmv1r.v", MATCH_VMV1R_V, ARGS_VMV1R_V),
    ("vmv2r.v", MATCH_VMV2R_V, ARGS_VMV2R_V),
    ("vmv4r.v", MATCH_VMV4R_V, ARGS_VMV4R_V),
    ("vmv8r.v", MATCH_VMV8R_V, ARGS_VMV8R_V),
    ("vmv.s.x", MATCH_VMV_S_X, ARGS_VMV_S_X),
    ("vmv.v.i", MATCH_VMV_V_I, ARGS_VMV_V_I),
    ("vmv.v.v", MATCH_VMV_V_V, ARGS_VMV_V_V),
    ("vmv.v.x", MATCH_VMV_V_X, ARGS_VMV_V_X),
    ("vmv.x.s", MATCH_VMV_X_S, ARGS_VMV_X_S),
    ("vmxnor.mm", MATCH_VMXNOR_MM, ARGS_VMXNOR_MM),
    ("vmxor.mm", MATCH_VMXOR_MM, ARGS_VMXOR_MM),
    ("vnclip.wi", MATCH_VNCLIP_WI, ARGS_VNCLIP_WI),
    ("vnclip.wv", MATCH_VNCLIP_WV, ARGS_VNCLIP_WV),
    ("vnclip.wx", MATCH_VNCLIP_WX, ARGS_VNCLIP_WX),
    ("vnclipu.wi", MATCH_VNCLIPU_WI, ARGS_VNCLIPU_WI),
    ("vnclipu.wv", MATCH_VNCLIPU_WV, ARGS_VNCLIPU_WV),
    ("vnclipu.wx", MATCH_VNCLIPU_WX, ARGS_VNCLIPU_WX),
    ("vnmsac.vv", MATCH_VNMSAC_VV, ARGS_VNMSAC_VV),
    ("vnmsac.vx", MATCH_VNMSAC_VX, ARGS_VNMSAC_VX),
    ("vnmsub.vv", MATCH_VNMSUB_VV, ARGS_VNMSUB_VV),
    ("vnmsub.vx", MATCH_VNMSUB_VX, ARGS_VNMSUB_VX),
    ("vnsra.wi", MATCH_VNSRA_WI, ARGS_VNSRA_WI),
    ("vnsra.wv", MATCH_VNSRA_WV, ARGS_VNSRA_WV),
    ("vnsra.wx", MATCH_VNSRA_WX, ARGS_VNSRA_WX),
    ("vnsrl.wi", MATCH_VNSRL_WI, ARGS_VNSRL_WI),
    ("vnsrl.wv", MATCH_VNSRL_WV, ARGS_VNSRL_WV),
    ("vnsrl.wx", MATCH_VNSRL_WX, ARGS_VNSRL_WX),
    ("vor.vi", MATCH_VOR_VI, ARGS_VOR_VI),
    ("vor.vv", MATCH_VOR_VV, ARGS_VOR_VV),
    ("vor.vx", MATCH_VOR_VX, ARGS_VOR_VX),
    ("vredand.vs", MATCH_VREDAND_VS, ARGS_VREDAND_VS),
    ("vredmax.vs", MATCH_VREDMAX_VS, ARGS_VREDMAX_VS),
    ("vredmaxu.vs", MATCH_VREDMAXU_VS, ARGS_VREDMAXU_VS),
    ("vredmin.vs", MATCH_VREDMIN_VS, ARGS_VREDMIN_VS),
    ("vredminu.vs", MATCH_VREDMINU_VS, ARGS_VREDMINU_VS),
    ("vredor.vs", MATCH_VREDOR_VS, ARGS_VREDOR_VS),
    ("vredsum.vs", MATCH_VREDSUM_VS, ARGS_VREDSUM_VS),
    ("vredxor.vs", MATCH_VREDXOR_VS, ARGS_VREDXOR_VS),
    ("vrem.vv", MATCH_VREM_VV, ARGS_VREM_VV),
    ("vrem.vx", MATCH_VREM_VX, ARGS_VREM_VX),
    ("vremu.vv", MATCH_VREMU_VV, ARGS_VREMU_VV),
    ("vremu.vx", MATCH_VREMU_VX, ARGS_VREMU_VX),
    ("vrgather.vi", MATCH_VRGATHER_VI, ARGS_VRGATHER_VI),
    ("vrgather.vv", MATCH_VRGATHER_VV, ARGS_VRGATHER_VV),
    ("vrgather.vx", MATCH_VRGATHER_VX, ARGS_VRGATHER_VX),
    (
        "vrgatherei16.vv",
        MATCH_VRGATHEREI16_VV,
        ARGS_VRGATHEREI16_VV,
    ),
    ("vrsub.vi", MATCH_VRSUB_VI, ARGS_VRSUB_VI),
    ("vrsub.vx", MATCH_VRSUB_VX, ARGS_VRSUB_VX),
    ("vs1r.v", MATCH_VS1R_V, ARGS_VS1R_V),
    ("vs2r.v", MATCH_VS2R_V, ARGS_VS2R_V),
    ("vs4r.v", MATCH_VS4R_V, ARGS_VS4R_V),
    ("vs8r.v", MATCH_VS8R_V, ARGS_VS8R_V),
    ("vsadd.vi", MATCH_VSADD_VI, ARGS_VSADD_VI),
    ("vsadd.vv", MATCH_VSADD_VV, ARGS_VSADD_VV),
    ("vsadd.vx", MATCH_VSADD_VX, ARGS_VSADD_VX),
    ("vsaddu.vi", MATCH_VSADDU_VI, ARGS_VSADDU_VI),
    ("vsaddu.vv", MATCH_VSADDU_VV, ARGS_VSADDU_VV),
    ("vsaddu.vx", MATCH_VSADDU_VX, ARGS_VSADDU_VX),
    ("vsbc.vvm", MATCH_VSBC_VVM, ARGS_VSBC_VVM),
    ("vsbc.vxm", MATCH_VSBC_VXM, ARGS_VSBC_VXM),
    ("vse1024.v", MATCH_VSE1024_V, ARGS_VSE1024_V),
    ("vse128.v", MATCH_VSE128_V, ARGS_VSE128_V),
    ("vse16.v", MATCH_VSE16_V, ARGS_VSE16_V),
    ("vse256.v", MATCH_VSE256_V, ARGS_VSE256_V),
    ("vse32.v", MATCH_VSE32_V, ARGS_VSE32_V),
    ("vse512.v", MATCH_VSE512_V, ARGS_VSE512_V),
    ("vse64.v", MATCH_VSE64_V, ARGS_VSE64_V),
    ("vse8.v", MATCH_VSE8_V, ARGS_VSE8_V),
    ("vsetivli", MATCH_VSETIVLI, ARGS_VSETIVLI),
    ("vsetvl", MATCH_VSETVL, ARGS_VSETVL),
    ("vsetvli", MATCH_VSETVLI, ARGS_VSETVLI),
    ("vsext.vf2", MATCH_VSEXT_VF2, ARGS_VSEXT_VF2),
    ("vsext.vf4", MATCH_VSEXT_VF4, ARGS_VSEXT_VF4),
    ("vsext.vf8", MATCH_VSEXT_VF8, ARGS_VSEXT_VF8),
    ("vslide1down.vx", MATCH_VSLIDE1DOWN_VX, ARGS_VSLIDE1DOWN_VX),
    ("vslide1up.vx", MATCH_VSLIDE1UP_VX, ARGS_VSLIDE1UP_VX),
    ("vslidedown.vi", MATCH_VSLIDEDOWN_VI, ARGS_VSLIDEDOWN_VI),
    ("vslidedown.vx", MATCH_VSLIDEDOWN_VX, ARGS_VSLIDEDOWN_VX),
    ("vslideup.vi", MATCH_VSLIDEUP_VI, ARGS_VSLIDEUP_VI),
    ("vslideup.vx", MATCH_VSLIDEUP_VX, ARGS_VSLIDEUP_VX),
    ("vsll.vi", MATCH_VSLL_VI, ARGS_VSLL_VI),
    ("vsll.vv", MATCH_VSLL_VV, ARGS_VSLL_VV),
    ("vsll.vx", MATCH_VSLL_VX, ARGS_VSLL_VX),
    ("vsm.v", MATCH_VSM_V, ARGS_VSM_V),
    ("vsmul.vv", MATCH_VSMUL_VV, ARGS_VSMUL_VV),
    ("vsmul.vx", MATCH_VSMUL_VX, ARGS_VSMUL_VX),
    ("vsoxei1024.v", MATCH_VSOXEI1024_V, ARGS_VSOXEI1024_V),
    ("vsoxei128.v", MATCH_VSOXEI128_V, ARGS_VSOXEI128_V),
    ("vsoxei16.v", MATCH_VSOXEI16_V, ARGS_VSOXEI16_V),
    ("vsoxei256.v", MATCH_VSOXEI256_V, ARGS_VSOXEI256_V),
    ("vsoxei32.v", MATCH_VSOXEI32_V, ARGS_VSOXEI32_V),
    ("vsoxei512.v", MATCH_VSOXEI512_V, ARGS_VSOXEI512_V),
    ("vsoxei64.v", MATCH_VSOXEI64_V, ARGS_VSOXEI64_V),
    ("vsoxei8.v", MATCH_VSOXEI8_V, ARGS_VSOXEI8_V),
    ("vsra.vi", MATCH_VSRA_VI, ARGS_VSRA_VI),
    ("vsra.vv", MATCH_VSRA_VV, ARGS_VSRA_VV),
    ("vsra.vx", MATCH_VSRA_VX, ARGS_VSRA_VX),
    ("vsrl.vi", MATCH_VSRL_VI, ARGS_VSRL_VI),
    ("vsrl.vv", MATCH_VSRL_VV, ARGS_VSRL_VV),
    ("vsrl.vx", MATCH_VSRL_VX, ARGS_VSRL_VX),
    ("vsse1024.v", MATCH_VSSE1024_V, ARGS_VSSE1024_V),
    ("vsse128.v", MATCH_VSSE128_V, ARGS_VSSE128_V),
    ("vsse16.v", MATCH_VSSE16_V, ARGS_VSSE16_V),
    ("vsse256.v", MATCH_VSSE256_V, ARGS_VSSE256_V),
    ("vsse32.v", MATCH_VSSE32_V, ARGS_VSSE32_V),
    ("vsse512.v", MATCH_VSSE512_V, ARGS_VSSE512_V),
    ("vsse64.v", MATCH_VSSE64_V, ARGS_VSSE64_V),
    ("vsse8.v", MATCH_VSSE8_V, ARGS_VSSE8_V),
    ("vssra.vi", MATCH_VSSRA_VI, ARGS_VSSRA_VI),
    ("vssra.vv", MATCH_VSSRA_VV, ARGS_VSSRA_VV),
    ("vssra.vx", MATCH_VSSRA_VX, ARGS_VSSRA_VX),
    ("vssrl.vi", MATCH_VSSRL_VI, ARGS_VSSRL_VI),
    ("vssrl.vv", MATCH_VSSRL_VV, ARGS_VSSRL_VV),
    ("vssrl.vx", MATCH_VSSRL_VX, ARGS_VSSRL_VX),
    ("vssub.vv", MATCH_VSSUB_VV, ARGS_VSSUB_VV),
    ("vssub.vx", MATCH_VSSUB_VX, ARGS_VSSUB_VX),
    ("vssubu.vv", MATCH_VSSUBU_VV, ARGS_VSSUBU_VV),
    ("vssubu.vx", MATCH_VSSUBU_VX, ARGS_VSSUBU_VX),
    ("vsub.vv", MATCH_VSUB_VV, ARGS_VSUB_VV),
    ("vsub.vx", MATCH_VSUB_VX, ARGS_VSUB_VX),
    ("vsuxei1024.v", MATCH_VSUXEI1024_V, ARGS_VSUXEI1024_V),
    ("vsuxei128.v", MATCH_VSUXEI128_V, ARGS_VSUXEI128_V),
    ("vsuxei16.v", MATCH_VSUXEI16_V, ARGS_VSUXEI16_V),
    ("vsuxei256.v", MATCH_VSUXEI256_V, ARGS_VSUXEI256_V),
    ("vsuxei32.v", MATCH_VSUXEI32_V, ARGS_VSUXEI32_V),
    ("vsuxei512.v", MATCH_VSUXEI512_V, ARGS_VSUXEI512_V),
    ("vsuxei64.v", MATCH_VSUXEI64_V, ARGS_VSUXEI64_V),
    ("vsuxei8.v", MATCH_VSUXEI8_V, ARGS_VSUXEI8_V),
    ("vwadd.vv", MATCH_VWADD_VV, ARGS_VWADD_VV),
    ("vwadd.vx", MATCH_VWADD_VX, ARGS_VWADD_VX),
    ("vwadd.wv", MATCH_VWADD_WV, ARGS_VWADD_WV),
    ("vwadd.wx", MATCH_VWADD_WX, ARGS_VWADD_WX),
    ("vwaddu.vv", MATCH_VWADDU_VV, ARGS_VWADDU_VV),
    ("vwaddu.vx", MATCH_VWADDU_VX, ARGS_VWADDU_VX),
    ("vwaddu.wv", MATCH_VWADDU_WV, ARGS_VWADDU_WV),
    ("vwaddu.wx", MATCH_VWADDU_WX, ARGS_VWADDU_WX),
    ("vwmacc.vv", MATCH_VWMACC_VV, ARGS_VWMACC_VV),
    ("vwmacc.vx", MATCH_VWMACC_VX, ARGS_VWMACC_VX),
    ("vwmaccsu.vv", MATCH_VWMACCSU_VV, ARGS_VWMACCSU_VV),
    ("vwmaccsu.vx", MATCH_VWMACCSU_VX, ARGS_VWMACCSU_VX),
    ("vwmaccu.vv", MATCH_VWMACCU_VV, ARGS_VWMACCU_VV),
    ("vwmaccu.vx", MATCH_VWMACCU_VX, ARGS_VWMACCU_VX),
    ("vwmaccus.vx", MATCH_VWMACCUS_VX, ARGS_VWMACCUS_VX),
    ("vwmul.vv", MATCH_VWMUL_VV, ARGS_VWMUL_VV),
    ("vwmul.vx", MATCH_VWMUL_VX, ARGS_VWMUL_VX),
    ("vwmulsu.vv", MATCH_VWMULSU_VV, ARGS_VWMULSU_VV),
    ("vwmulsu.vx", MATCH_VWMULSU_VX, ARGS_VWMULSU_VX),
    ("vwmulu.vv", MATCH_VWMULU_VV, ARGS_VWMULU_VV),
    ("vwmulu.vx", MATCH_VWMULU_VX, ARGS_VWMULU_VX),
    ("vwredsum.vs", MATCH_VWREDSUM_VS, ARGS_VWREDSUM_VS),
    ("vwredsumu.vs", MATCH_VWREDSUMU_VS, ARGS_VWREDSUMU_VS),
    ("vwsub.vv", MATCH_VWSUB_VV, ARGS_VWSUB_VV),
    ("vwsub.vx", MATCH_VWSUB_VX, ARGS_VWSUB_VX),
    ("vwsub.wv", MATCH_VWSUB_WV, ARGS_VWSUB_WV),
    ("vwsub.wx", MATCH_VWSUB_WX, ARGS_VWSUB_WX),
    ("vwsubu.vv", MATCH_VWSUBU_VV, ARGS_VWSUBU_VV),
    ("vwsubu.vx", MATCH_VWSUBU_VX, ARGS_VWSUBU_VX),
    ("vwsubu.wv", MATCH_VWSUBU_WV, ARGS_VWSUBU_WV),
    ("vwsubu.wx", MATCH_VWSUBU_WX, ARGS_VWSUBU_WX),
    ("vxor.vi", MATCH_VXOR_VI, ARGS_VXOR_VI),
    ("vxor.vv", MATCH_VXOR_VV, ARGS_VXOR_VV),
    ("vxor.vx", MATCH_VXOR_VX, ARGS_VXOR_VX),
    ("vzext.vf2", MATCH_VZEXT_VF2, ARGS_VZEXT_VF2),
    ("vzext.vf4", MATCH_VZEXT_VF4, ARGS_VZEXT_VF4),
    ("vzext.vf8", MATCH_VZEXT_VF8, ARGS_VZEXT_VF8),
];