[−][src]Module ruspiro_register::system::aarch64
Aarch64 System Register
Aarch64 register definitions are only available when compiled for Aarch64 target architecture
Modules
| actlr_el2 | AArch64 ACTLR_EL2 - Auxiliry Control Register EL2 |
| actlr_el3 | AArch64 ACTLR_EL3 - Auxiliry Control Register EL3 |
| ccsidr_el1 | AArch64 CCSIDR_EL1 - Cache Size ID Register |
| clidr_el1 | AArch64 CLIDR_EL1 - Cache Level ID Register |
| cpacr_el1 | AArch64 CPACR_EL1 - Architectural Feature Access Control Register |
| currentel | AArch64 CurrentEL - Current Exception Level |
| esr_el1 | AArch64 ESR_EL1 - Exception Syndrom Register EL1 |
| esr_el2 | AArch64 ESR_EL2 - Exception Syndrom Register EL2 |
| esr_el3 | AArch64 ESR_EL3 - Exception Syndrom Register EL3 |
| hcr_el2 | AArch64 HCR_EL2 - Hypervisor Configuration Register |
| mair_el1 | AArch64 MAIR_EL1 - Memory Attribute Indirection Register EL1 |
| mair_el2 | AArch64 MAIR_EL2 - Memory Attribute Indirection Register EL2 |
| mpidr_el1 | AArch64 MPIDR_EL1 - Multiprocessor Affinity Register |
| sctlr_el1 | AArch64 SCTLR_EL1 - System Control Register EL1 |
| sctlr_el2 | AArch64 SCTLR_EL2 - System Control Register EL2 |
| tcr_el1 | AArch64 TCR_EL1 - Translation Control Register EL1 |
| tcr_el2 | AArch64 TCR_EL2 - Translation Control Register EL2 |
| ttbr0_el1 | AArch64 TTBR0_EL1 - Translation Table Base Register 0 EL1 |
| ttbr0_el2 | AArch64 TTBR0_EL2 - Translation Table Base Register 0 EL2 |
| ttbr1_el1 | AArch64 TTBR1_EL1 Translation Table Base Register 1 EL1 |
| vbar_el1 | AArch64 VBAR_EL1 - Vector Base Address Register EL1 |
| vbar_el2 | AArch64 VBAR_EL2 - Vector Base Address Register EL2 |