What output formats an encoder path can produce. AV1 here is 4:2:0 only;
10-bit output is the web-safe AV1 Main profile (4:2:0 10-bit), HDR-tagged at
the container level (colr/mdcv/clli), not the wide-gamut professional
profiles.
Whether an AV1 encoder can actually be constructed for this device — the
authoritative, build-aware capability check. It runs the sameselect_encoder dispatch a per-chunk worker uses, pinned to the device’s
vendor + index, so true means a worker leased to this GPU will encode
rather than hard-fail. Used to drop AV1-incapable cards (e.g. a pre-Ada
NVIDIA that decodes via NVDEC but has no AV1 encode silicon) from the
multi-GPU encode pool, so a mixed-vendor host encodes on the capable cards
instead of aborting when a chunk leases to an incapable one.
Output capabilities of a specific hardware backend. All three do 10-bit AV1,
so they can produce HDR without the ffmpeg feature: NVENC via
Yuv420_10bit, AMF via P010, and QSV via the in-repo oneVPL P010 path
([qsv_p010]).
Output capabilities of this build — the union over every compiled
encoder path. 10-bit + HDR comes from NVENC (nvidia), AMF (amd), QSV
(qsv, via the in-repo P010 path), or the ffmpeg software/hwaccel
encoders; a build with no encoder feature is 8-bit. Callers (e.g. rivet’s
OutputSpec::validate) use this to reject a format the build can’t produce.