Struct EncoderConfig 

pub struct EncoderConfig {

    pub width: u32,
    pub height: u32,
    pub frame_rate: f64,
    pub quality: u8,
    pub speed_preset: u8,
    pub keyframe_interval: u32,
    pub target: QualityTarget,
    pub tier: SpeedTier,
    pub threads: usize,
    pub pixel_format: PixelFormat,
    pub color_metadata: ColorMetadata,
    pub gpu_index: Option<u32>,
    pub gpu_vendor: Option<GpuVendor>,
    pub constant_qp: bool,
}

Encoder configuration.

Prefer target + tier — quality and speed_preset are the legacy per-encoder escape hatches and are kept so existing callers compile. When quality is set to its sentinel (u8::MAX) the adapter derives the quantizer from target instead. Same for speed_preset (u8::MAX sentinel → derive from tier).

Fields

width: u32

height: u32

frame_rate: f64

quality: u8

Legacy escape hatch. u8::MAX means “derive from target”. Otherwise: rav1e → used as quantizer 0-255; NVENC → scaled to its CQ range.

speed_preset: u8

Legacy escape hatch. u8::MAX means “derive from tier”.

keyframe_interval: u32

target: QualityTarget

Perceptual quality target. Defaults to Standard (VMAF ~90).

tier: SpeedTier

Speed tier (Draft / Standard / Archive). Defaults to Standard.

threads: usize

Thread budget for this encoder instance. 0 means “use all cores” (rav1e default). When the pipeline runs N variants in parallel it should set this to num_cpus / N to avoid oversubscribing rayon workers across concurrent rav1e encoders.

pixel_format: PixelFormat

Input pixel format. Drives the encoder’s bit-depth dispatch (Squad-19 rav1e CPU + Squad-22 NVENC/AMF/QSV, roadmap #5). Yuv420p → 8-bit AV1 Profile 0; Yuv420p10le → 10-bit AV1 Profile 0 (10-bit 4:2:0 is allowed in Profile 0 per AV1 §5.5.2 — seq_profile=0, seq_color_config emits high_bitdepth=1, twelve_bit=0). HW backends pick the matching surface fourcc: NVENC YUV420_10BIT, AMF P010, QSV P010 + BitDepthLuma=10. Set once at encoder construction; flipping mid-session requires reinitialising. The muxer’s pixi-equivalent + AV1 sequence header in av1C carry the bit depth so HDR-capable browsers see 10-bit signaling.

color_metadata: ColorMetadata

Source color metadata. Encoders write color_primaries / transfer_characteristics / matrix_coefficients / color_range into the AV1 sequence header so HDR-capable players see the correct PQ/HLG transfer

• BT.2020 primaries straight off the bitstream — not just the container colr atom (Squad-19 rav1e + Squad-22 HW; complements Squad-18’s container-side colr nclx writer). Without bitstream signalling, players that prefer the OBU header over the box (e.g. Chromium video framework) would silently fall back to BT.709. Defaults to SDR BT.709.

gpu_index: Option<u32>

Explicit GPU device index for HW encoders on multi-GPU hosts. When Some(idx), select_encoder binds NVENC / AMF / QSV / Vulkan AV1 / FFmpeg hwaccel encoders to the device with GpuDevice.index == idx. When None (default), the first GPU of each vendor is used — matches the original pre-multi-GPU behaviour.

Pipeline transcode::run assigns variant_idx % devices.len() per variant so a multi-variant job on a multi-GPU host spreads work across devices, matching the Python original’s ThreadPoolExecutor(max_workers=device_count) per-variant fan-out.

gpu_vendor: Option<GpuVendor>

Explicit vendor pin for HW encoder dispatch. When Some(v), select_encoder skips the NVIDIA → AMD → Intel preference chain and goes DIRECTLY to the encoder backend matching v (NVENC for Nvidia, AMF for Amd, QSV for Intel). Used by the CMAF orchestrator to honor the GpuPool’s lease — when the pool hands out an Intel slot (because the NVIDIA card is already encoding), this field tells the factory to dispatch to QSV instead of falling back to NVENC and pinning every variant to the NVIDIA card.

None (default) preserves the legacy NVIDIA-first chain so CPU-only paths + tests + non-pool callers behave unchanged.

constant_qp: bool

Prefer constant-QP rate control over the bitrate/quality default. Set by the multi-GPU single-file path under ChunkSeamMode::ParallelConstQp so independently-encoded chunks have a flat quality across the stitched seams. On NVENC this selects RateControlMode::ConstQp (the wrapper then uses the preset’s default QP — the target bitrate mapping is skipped). AMD/QSV already encode constant-quality, so this is a no-op for them.

Trait Implementations

impl Clone for EncoderConfig

fn clone(&self) -> EncoderConfig

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for EncoderConfig

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for EncoderConfig

fn default() -> Self

Returns the “default value” for a type.