#![allow(clippy::identity_op)]
#![allow(clippy::module_inception)]
#![allow(clippy::derivable_impls)]
#[allow(unused_imports)]
use crate::common::sealed;
#[allow(unused_imports)]
use crate::common::*;
#[doc = r"Miscellaneous Port Control Register"]
unsafe impl ::core::marker::Send for super::Pmisc {}
unsafe impl ::core::marker::Sync for super::Pmisc {}
impl super::Pmisc {
#[allow(unused)]
#[inline(always)]
pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
self.ptr
}
#[doc = "Ethernet Control Register"]
#[inline(always)]
pub const fn pfenet(
&self,
) -> &'static crate::common::Reg<self::Pfenet_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Pfenet_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0usize),
)
}
}
#[doc = "Write-Protect Register"]
#[inline(always)]
pub const fn pwpr(&self) -> &'static crate::common::Reg<self::Pwpr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Pwpr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(3usize),
)
}
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Pfenet_SPEC;
impl crate::sealed::RegSpec for Pfenet_SPEC {
type DataType = u8;
}
#[doc = "Ethernet Control Register"]
pub type Pfenet = crate::RegValueT<Pfenet_SPEC>;
impl Pfenet {
#[doc = "Ethernet Mode Setting ch0"]
#[inline(always)]
pub fn phymode0(
self,
) -> crate::common::RegisterField<
4,
0x1,
1,
0,
pfenet::Phymode0,
pfenet::Phymode0,
Pfenet_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
4,
0x1,
1,
0,
pfenet::Phymode0,
pfenet::Phymode0,
Pfenet_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Pfenet {
#[inline(always)]
fn default() -> Pfenet {
<crate::RegValueT<Pfenet_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod pfenet {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Phymode0_SPEC;
pub type Phymode0 = crate::EnumBitfieldStruct<u8, Phymode0_SPEC>;
impl Phymode0 {
#[doc = "RMII mode (ETHERC channel 0)"]
pub const _0: Self = Self::new(0);
#[doc = "MII mode (ETHERC channel 0)"]
pub const _1: Self = Self::new(1);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Pwpr_SPEC;
impl crate::sealed::RegSpec for Pwpr_SPEC {
type DataType = u8;
}
#[doc = "Write-Protect Register"]
pub type Pwpr = crate::RegValueT<Pwpr_SPEC>;
impl Pwpr {
#[doc = "PFSWE Bit Write Disable"]
#[inline(always)]
pub fn bowi(
self,
) -> crate::common::RegisterField<
7,
0x1,
1,
0,
pwpr::Bowi,
pwpr::Bowi,
Pwpr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
7,
0x1,
1,
0,
pwpr::Bowi,
pwpr::Bowi,
Pwpr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "PFS Register Write Enable"]
#[inline(always)]
pub fn pfswe(
self,
) -> crate::common::RegisterField<
6,
0x1,
1,
0,
pwpr::Pfswe,
pwpr::Pfswe,
Pwpr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
6,
0x1,
1,
0,
pwpr::Pfswe,
pwpr::Pfswe,
Pwpr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Pwpr {
#[inline(always)]
fn default() -> Pwpr {
<crate::RegValueT<Pwpr_SPEC> as RegisterValue<_>>::new(128)
}
}
pub mod pwpr {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Bowi_SPEC;
pub type Bowi = crate::EnumBitfieldStruct<u8, Bowi_SPEC>;
impl Bowi {
#[doc = "Writing to the PFSWE bit is enabled"]
pub const _0: Self = Self::new(0);
#[doc = "Writing to the PFSWE bit is disabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Pfswe_SPEC;
pub type Pfswe = crate::EnumBitfieldStruct<u8, Pfswe_SPEC>;
impl Pfswe {
#[doc = "Writing to the PFS register is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "Writing to the PFS register is enabled"]
pub const _1: Self = Self::new(1);
}
}