#![allow(clippy::identity_op)]
#![allow(clippy::module_inception)]
#![allow(clippy::derivable_impls)]
#[allow(unused_imports)]
use crate::common::sealed;
#[allow(unused_imports)]
use crate::common::*;
#[doc = r"Interrupt Controller"]
unsafe impl ::core::marker::Send for super::Icu {}
unsafe impl ::core::marker::Sync for super::Icu {}
impl super::Icu {
#[allow(unused)]
#[inline(always)]
pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
self.ptr
}
#[doc = "IRQ Control Register %s"]
#[inline(always)]
pub const fn irqcr(
&self,
) -> &'static crate::common::ClusterRegisterArray<
crate::common::Reg<self::Irqcr_SPEC, crate::common::RW>,
16,
0x1,
> {
unsafe {
crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x0usize))
}
}
#[inline(always)]
pub const fn irqcr0(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x0usize),
)
}
}
#[inline(always)]
pub const fn irqcr1(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x1usize),
)
}
}
#[inline(always)]
pub const fn irqcr2(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x2usize),
)
}
}
#[inline(always)]
pub const fn irqcr3(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x3usize),
)
}
}
#[inline(always)]
pub const fn irqcr4(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x4usize),
)
}
}
#[inline(always)]
pub const fn irqcr5(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x5usize),
)
}
}
#[inline(always)]
pub const fn irqcr6(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x6usize),
)
}
}
#[inline(always)]
pub const fn irqcr7(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x7usize),
)
}
}
#[inline(always)]
pub const fn irqcr8(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x8usize),
)
}
}
#[inline(always)]
pub const fn irqcr9(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x9usize),
)
}
}
#[inline(always)]
pub const fn irqcr10(
&self,
) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0xausize),
)
}
}
#[inline(always)]
pub const fn irqcr11(
&self,
) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0xbusize),
)
}
}
#[inline(always)]
pub const fn irqcr12(
&self,
) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0xcusize),
)
}
}
#[inline(always)]
pub const fn irqcr13(
&self,
) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0xdusize),
)
}
}
#[inline(always)]
pub const fn irqcr14(
&self,
) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0xeusize),
)
}
}
#[inline(always)]
pub const fn irqcr15(
&self,
) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0xfusize),
)
}
}
#[doc = "Non-Maskable Interrupt Status Register"]
#[inline(always)]
pub const fn nmisr(&self) -> &'static crate::common::Reg<self::Nmisr_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<self::Nmisr_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(320usize),
)
}
}
#[doc = "Non-Maskable Interrupt Enable Register"]
#[inline(always)]
pub const fn nmier(&self) -> &'static crate::common::Reg<self::Nmier_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Nmier_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(288usize),
)
}
}
#[doc = "Non-Maskable Interrupt Status Clear Register"]
#[inline(always)]
pub const fn nmiclr(
&self,
) -> &'static crate::common::Reg<self::Nmiclr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Nmiclr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(304usize),
)
}
}
#[doc = "NMI Pin Interrupt Control Register"]
#[inline(always)]
pub const fn nmicr(&self) -> &'static crate::common::Reg<self::Nmicr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Nmicr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(256usize),
)
}
}
#[doc = "ICU Event Link Setting Register %s"]
#[inline(always)]
pub const fn ielsr(
&self,
) -> &'static crate::common::ClusterRegisterArray<
crate::common::Reg<self::Ielsr_SPEC, crate::common::RW>,
32,
0x4,
> {
unsafe {
crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x300usize))
}
}
#[inline(always)]
pub const fn ielsr0(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x300usize),
)
}
}
#[inline(always)]
pub const fn ielsr1(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x304usize),
)
}
}
#[inline(always)]
pub const fn ielsr2(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x308usize),
)
}
}
#[inline(always)]
pub const fn ielsr3(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x30cusize),
)
}
}
#[inline(always)]
pub const fn ielsr4(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x310usize),
)
}
}
#[inline(always)]
pub const fn ielsr5(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x314usize),
)
}
}
#[inline(always)]
pub const fn ielsr6(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x318usize),
)
}
}
#[inline(always)]
pub const fn ielsr7(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x31cusize),
)
}
}
#[inline(always)]
pub const fn ielsr8(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x320usize),
)
}
}
#[inline(always)]
pub const fn ielsr9(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x324usize),
)
}
}
#[inline(always)]
pub const fn ielsr10(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x328usize),
)
}
}
#[inline(always)]
pub const fn ielsr11(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x32cusize),
)
}
}
#[inline(always)]
pub const fn ielsr12(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x330usize),
)
}
}
#[inline(always)]
pub const fn ielsr13(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x334usize),
)
}
}
#[inline(always)]
pub const fn ielsr14(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x338usize),
)
}
}
#[inline(always)]
pub const fn ielsr15(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x33cusize),
)
}
}
#[inline(always)]
pub const fn ielsr16(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x340usize),
)
}
}
#[inline(always)]
pub const fn ielsr17(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x344usize),
)
}
}
#[inline(always)]
pub const fn ielsr18(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x348usize),
)
}
}
#[inline(always)]
pub const fn ielsr19(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x34cusize),
)
}
}
#[inline(always)]
pub const fn ielsr20(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x350usize),
)
}
}
#[inline(always)]
pub const fn ielsr21(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x354usize),
)
}
}
#[inline(always)]
pub const fn ielsr22(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x358usize),
)
}
}
#[inline(always)]
pub const fn ielsr23(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x35cusize),
)
}
}
#[inline(always)]
pub const fn ielsr24(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x360usize),
)
}
}
#[inline(always)]
pub const fn ielsr25(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x364usize),
)
}
}
#[inline(always)]
pub const fn ielsr26(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x368usize),
)
}
}
#[inline(always)]
pub const fn ielsr27(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x36cusize),
)
}
}
#[inline(always)]
pub const fn ielsr28(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x370usize),
)
}
}
#[inline(always)]
pub const fn ielsr29(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x374usize),
)
}
}
#[inline(always)]
pub const fn ielsr30(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x378usize),
)
}
}
#[inline(always)]
pub const fn ielsr31(
&self,
) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x37cusize),
)
}
}
#[doc = "DMAC Event Link Setting Register %s"]
#[inline(always)]
pub const fn delsr(
&self,
) -> &'static crate::common::ClusterRegisterArray<
crate::common::Reg<self::Delsr_SPEC, crate::common::RW>,
4,
0x4,
> {
unsafe {
crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x280usize))
}
}
#[inline(always)]
pub const fn delsr0(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x280usize),
)
}
}
#[inline(always)]
pub const fn delsr1(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x284usize),
)
}
}
#[inline(always)]
pub const fn delsr2(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x288usize),
)
}
}
#[inline(always)]
pub const fn delsr3(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x28cusize),
)
}
}
#[doc = "Snooze Event Link Setting Register"]
#[inline(always)]
pub const fn selsr0(
&self,
) -> &'static crate::common::Reg<self::Selsr0_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Selsr0_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(512usize),
)
}
}
#[doc = "Wake Up Interrupt Enable Register"]
#[inline(always)]
pub const fn wupen(&self) -> &'static crate::common::Reg<self::Wupen_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Wupen_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(416usize),
)
}
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Irqcr_SPEC;
impl crate::sealed::RegSpec for Irqcr_SPEC {
type DataType = u8;
}
#[doc = "IRQ Control Register %s"]
pub type Irqcr = crate::RegValueT<Irqcr_SPEC>;
impl Irqcr {
#[doc = "IRQ Digital Filter Enable"]
#[inline(always)]
pub fn flten(
self,
) -> crate::common::RegisterField<
7,
0x1,
1,
0,
irqcr::Flten,
irqcr::Flten,
Irqcr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
7,
0x1,
1,
0,
irqcr::Flten,
irqcr::Flten,
Irqcr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ Digital Filter Sampling Clock Select"]
#[inline(always)]
pub fn fclksel(
self,
) -> crate::common::RegisterField<
4,
0x3,
1,
0,
irqcr::Fclksel,
irqcr::Fclksel,
Irqcr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
4,
0x3,
1,
0,
irqcr::Fclksel,
irqcr::Fclksel,
Irqcr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "These bits are read as 00. The write value should be 00."]
#[inline(always)]
pub fn reserved(
self,
) -> crate::common::RegisterField<2, 0x3, 1, 0, u8, u8, Irqcr_SPEC, crate::common::RW> {
crate::common::RegisterField::<2,0x3,1,0,u8,u8,Irqcr_SPEC,crate::common::RW>::from_register(self,0)
}
#[doc = "IRQ Detection Sense Select"]
#[inline(always)]
pub fn irqmd(
self,
) -> crate::common::RegisterField<
0,
0x3,
1,
0,
irqcr::Irqmd,
irqcr::Irqmd,
Irqcr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0x3,
1,
0,
irqcr::Irqmd,
irqcr::Irqmd,
Irqcr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Irqcr {
#[inline(always)]
fn default() -> Irqcr {
<crate::RegValueT<Irqcr_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod irqcr {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Flten_SPEC;
pub type Flten = crate::EnumBitfieldStruct<u8, Flten_SPEC>;
impl Flten {
#[doc = "Digital filter disabled."]
pub const _0: Self = Self::new(0);
#[doc = "Digital filter enabled."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Fclksel_SPEC;
pub type Fclksel = crate::EnumBitfieldStruct<u8, Fclksel_SPEC>;
impl Fclksel {
#[doc = "PCLKB"]
pub const _00: Self = Self::new(0);
#[doc = "PCLKB/8"]
pub const _01: Self = Self::new(1);
#[doc = "PCLKB/32"]
pub const _10: Self = Self::new(2);
#[doc = "PCLKB/64"]
pub const _11: Self = Self::new(3);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqmd_SPEC;
pub type Irqmd = crate::EnumBitfieldStruct<u8, Irqmd_SPEC>;
impl Irqmd {
#[doc = "Falling edge"]
pub const _00: Self = Self::new(0);
#[doc = "Rising edge"]
pub const _01: Self = Self::new(1);
#[doc = "Rising and falling edges"]
pub const _10: Self = Self::new(2);
#[doc = "Low level"]
pub const _11: Self = Self::new(3);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Nmisr_SPEC;
impl crate::sealed::RegSpec for Nmisr_SPEC {
type DataType = u16;
}
#[doc = "Non-Maskable Interrupt Status Register"]
pub type Nmisr = crate::RegValueT<Nmisr_SPEC>;
impl Nmisr {
#[doc = "CPU Stack pointer monitor Interrupt Status Flag"]
#[inline(always)]
pub fn spest(
self,
) -> crate::common::RegisterField<
12,
0x1,
1,
0,
nmisr::Spest,
nmisr::Spest,
Nmisr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
12,
0x1,
1,
0,
nmisr::Spest,
nmisr::Spest,
Nmisr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
#[doc = "MPU Bus Master Error Interrupt Status Flag"]
#[inline(always)]
pub fn busmst(
self,
) -> crate::common::RegisterField<
11,
0x1,
1,
0,
nmisr::Busmst,
nmisr::Busmst,
Nmisr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
11,
0x1,
1,
0,
nmisr::Busmst,
nmisr::Busmst,
Nmisr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
#[doc = "MPU Bus Slave Error Interrupt Status Flag"]
#[inline(always)]
pub fn bussst(
self,
) -> crate::common::RegisterField<
10,
0x1,
1,
0,
nmisr::Bussst,
nmisr::Bussst,
Nmisr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
10,
0x1,
1,
0,
nmisr::Bussst,
nmisr::Bussst,
Nmisr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
#[doc = "RAM ECC Error Interrupt Status Flag"]
#[inline(always)]
pub fn reccst(
self,
) -> crate::common::RegisterField<
9,
0x1,
1,
0,
nmisr::Reccst,
nmisr::Reccst,
Nmisr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
9,
0x1,
1,
0,
nmisr::Reccst,
nmisr::Reccst,
Nmisr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
#[doc = "RAM Parity Error Interrupt Status Flag"]
#[inline(always)]
pub fn rpest(
self,
) -> crate::common::RegisterField<
8,
0x1,
1,
0,
nmisr::Rpest,
nmisr::Rpest,
Nmisr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
8,
0x1,
1,
0,
nmisr::Rpest,
nmisr::Rpest,
Nmisr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
#[doc = "NMI Status Flag"]
#[inline(always)]
pub fn nmist(
self,
) -> crate::common::RegisterField<
7,
0x1,
1,
0,
nmisr::Nmist,
nmisr::Nmist,
Nmisr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
7,
0x1,
1,
0,
nmisr::Nmist,
nmisr::Nmist,
Nmisr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
#[doc = "Oscillation Stop Detection Interrupt Status Flag"]
#[inline(always)]
pub fn ostst(
self,
) -> crate::common::RegisterField<
6,
0x1,
1,
0,
nmisr::Ostst,
nmisr::Ostst,
Nmisr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
6,
0x1,
1,
0,
nmisr::Ostst,
nmisr::Ostst,
Nmisr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
#[doc = "This bit is read as 0."]
#[inline(always)]
pub fn reserved(
self,
) -> crate::common::RegisterFieldBool<5, 1, 0, Nmisr_SPEC, crate::common::R> {
crate::common::RegisterFieldBool::<5, 1, 0, Nmisr_SPEC, crate::common::R>::from_register(
self, 0,
)
}
#[doc = "VBATT monitor Interrupt Status Flag"]
#[inline(always)]
pub fn vbattst(
self,
) -> crate::common::RegisterField<
4,
0x1,
1,
0,
nmisr::Vbattst,
nmisr::Vbattst,
Nmisr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
4,
0x1,
1,
0,
nmisr::Vbattst,
nmisr::Vbattst,
Nmisr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
#[doc = "Voltage-Monitoring 2 Interrupt Status Flag"]
#[inline(always)]
pub fn lvd2st(
self,
) -> crate::common::RegisterField<
3,
0x1,
1,
0,
nmisr::Lvd2St,
nmisr::Lvd2St,
Nmisr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
3,
0x1,
1,
0,
nmisr::Lvd2St,
nmisr::Lvd2St,
Nmisr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
#[doc = "Voltage-Monitoring 1 Interrupt Status Flag"]
#[inline(always)]
pub fn lvd1st(
self,
) -> crate::common::RegisterField<
2,
0x1,
1,
0,
nmisr::Lvd1St,
nmisr::Lvd1St,
Nmisr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
2,
0x1,
1,
0,
nmisr::Lvd1St,
nmisr::Lvd1St,
Nmisr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
#[doc = "WDT Underflow/Refresh Error Status Flag"]
#[inline(always)]
pub fn wdtst(
self,
) -> crate::common::RegisterField<
1,
0x1,
1,
0,
nmisr::Wdtst,
nmisr::Wdtst,
Nmisr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
1,
0x1,
1,
0,
nmisr::Wdtst,
nmisr::Wdtst,
Nmisr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
#[doc = "IWDT Underflow/Refresh Error Status Flag"]
#[inline(always)]
pub fn iwdtst(
self,
) -> crate::common::RegisterField<
0,
0x1,
1,
0,
nmisr::Iwdtst,
nmisr::Iwdtst,
Nmisr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
0,
0x1,
1,
0,
nmisr::Iwdtst,
nmisr::Iwdtst,
Nmisr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Nmisr {
#[inline(always)]
fn default() -> Nmisr {
<crate::RegValueT<Nmisr_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod nmisr {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Spest_SPEC;
pub type Spest = crate::EnumBitfieldStruct<u8, Spest_SPEC>;
impl Spest {
#[doc = "Interrupt not requested"]
pub const _0: Self = Self::new(0);
#[doc = "Interrupt requested."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Busmst_SPEC;
pub type Busmst = crate::EnumBitfieldStruct<u8, Busmst_SPEC>;
impl Busmst {
#[doc = "Interrupt not requested"]
pub const _0: Self = Self::new(0);
#[doc = "Interrupt requested."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Bussst_SPEC;
pub type Bussst = crate::EnumBitfieldStruct<u8, Bussst_SPEC>;
impl Bussst {
#[doc = "Interrupt not requested"]
pub const _0: Self = Self::new(0);
#[doc = "Interrupt requested."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Reccst_SPEC;
pub type Reccst = crate::EnumBitfieldStruct<u8, Reccst_SPEC>;
impl Reccst {
#[doc = "Interrupt not requested"]
pub const _0: Self = Self::new(0);
#[doc = "Interrupt requested."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Rpest_SPEC;
pub type Rpest = crate::EnumBitfieldStruct<u8, Rpest_SPEC>;
impl Rpest {
#[doc = "Interrupt not requested"]
pub const _0: Self = Self::new(0);
#[doc = "Interrupt requested."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Nmist_SPEC;
pub type Nmist = crate::EnumBitfieldStruct<u8, Nmist_SPEC>;
impl Nmist {
#[doc = "Interrupt not requested"]
pub const _0: Self = Self::new(0);
#[doc = "Interrupt requested."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Ostst_SPEC;
pub type Ostst = crate::EnumBitfieldStruct<u8, Ostst_SPEC>;
impl Ostst {
#[doc = "Interrupt not requested for main oscillation stop"]
pub const _0: Self = Self::new(0);
#[doc = "Interrupt requested for main oscillation stop."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Vbattst_SPEC;
pub type Vbattst = crate::EnumBitfieldStruct<u8, Vbattst_SPEC>;
impl Vbattst {
#[doc = "Interrupt not requested"]
pub const _0: Self = Self::new(0);
#[doc = "Interrupt requested."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Lvd2St_SPEC;
pub type Lvd2St = crate::EnumBitfieldStruct<u8, Lvd2St_SPEC>;
impl Lvd2St {
#[doc = "Interrupt not requested"]
pub const _0: Self = Self::new(0);
#[doc = "Interrupt requested."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Lvd1St_SPEC;
pub type Lvd1St = crate::EnumBitfieldStruct<u8, Lvd1St_SPEC>;
impl Lvd1St {
#[doc = "Interrupt not requested"]
pub const _0: Self = Self::new(0);
#[doc = "Interrupt requested."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Wdtst_SPEC;
pub type Wdtst = crate::EnumBitfieldStruct<u8, Wdtst_SPEC>;
impl Wdtst {
#[doc = "Interrupt not requested"]
pub const _0: Self = Self::new(0);
#[doc = "Interrupt requested."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Iwdtst_SPEC;
pub type Iwdtst = crate::EnumBitfieldStruct<u8, Iwdtst_SPEC>;
impl Iwdtst {
#[doc = "Interrupt not requested"]
pub const _0: Self = Self::new(0);
#[doc = "Interrupt requested."]
pub const _1: Self = Self::new(1);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Nmier_SPEC;
impl crate::sealed::RegSpec for Nmier_SPEC {
type DataType = u16;
}
#[doc = "Non-Maskable Interrupt Enable Register"]
pub type Nmier = crate::RegValueT<Nmier_SPEC>;
impl Nmier {
#[doc = "CPU Stack pointer monitor Interrupt Enable"]
#[inline(always)]
pub fn speen(
self,
) -> crate::common::RegisterField<
12,
0x1,
1,
0,
nmier::Speen,
nmier::Speen,
Nmier_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
12,
0x1,
1,
0,
nmier::Speen,
nmier::Speen,
Nmier_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "MPU Bus Master Error Interrupt Enable"]
#[inline(always)]
pub fn busmen(
self,
) -> crate::common::RegisterField<
11,
0x1,
1,
0,
nmier::Busmen,
nmier::Busmen,
Nmier_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
11,
0x1,
1,
0,
nmier::Busmen,
nmier::Busmen,
Nmier_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "MPU Bus Slave Error Interrupt Enable"]
#[inline(always)]
pub fn bussen(
self,
) -> crate::common::RegisterField<
10,
0x1,
1,
0,
nmier::Bussen,
nmier::Bussen,
Nmier_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
10,
0x1,
1,
0,
nmier::Bussen,
nmier::Bussen,
Nmier_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "RAM ECC Error Interrupt Enable"]
#[inline(always)]
pub fn reccen(
self,
) -> crate::common::RegisterField<
9,
0x1,
1,
0,
nmier::Reccen,
nmier::Reccen,
Nmier_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
9,
0x1,
1,
0,
nmier::Reccen,
nmier::Reccen,
Nmier_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "RAM Parity Error Interrupt Enable"]
#[inline(always)]
pub fn rpeen(
self,
) -> crate::common::RegisterField<
8,
0x1,
1,
0,
nmier::Rpeen,
nmier::Rpeen,
Nmier_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
8,
0x1,
1,
0,
nmier::Rpeen,
nmier::Rpeen,
Nmier_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "NMI Pin Interrupt Enable"]
#[inline(always)]
pub fn nmien(
self,
) -> crate::common::RegisterField<
7,
0x1,
1,
0,
nmier::Nmien,
nmier::Nmien,
Nmier_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
7,
0x1,
1,
0,
nmier::Nmien,
nmier::Nmien,
Nmier_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "Oscillation Stop Detection Interrupt Enable"]
#[inline(always)]
pub fn osten(
self,
) -> crate::common::RegisterField<
6,
0x1,
1,
0,
nmier::Osten,
nmier::Osten,
Nmier_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
6,
0x1,
1,
0,
nmier::Osten,
nmier::Osten,
Nmier_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "This bit is read as 0. The write value should be 0."]
#[inline(always)]
pub fn reserved(
self,
) -> crate::common::RegisterFieldBool<5, 1, 0, Nmier_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<5, 1, 0, Nmier_SPEC, crate::common::RW>::from_register(
self, 0,
)
}
#[doc = "VBATT monitor Interrupt Enable"]
#[inline(always)]
pub fn vbatten(
self,
) -> crate::common::RegisterField<
4,
0x1,
1,
0,
nmier::Vbatten,
nmier::Vbatten,
Nmier_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
4,
0x1,
1,
0,
nmier::Vbatten,
nmier::Vbatten,
Nmier_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "Voltage-Monitoring 2 Interrupt Enable"]
#[inline(always)]
pub fn lvd2en(
self,
) -> crate::common::RegisterField<
3,
0x1,
1,
0,
nmier::Lvd2En,
nmier::Lvd2En,
Nmier_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
3,
0x1,
1,
0,
nmier::Lvd2En,
nmier::Lvd2En,
Nmier_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "Voltage-Monitoring 1 Interrupt Enable"]
#[inline(always)]
pub fn lvd1en(
self,
) -> crate::common::RegisterField<
2,
0x1,
1,
0,
nmier::Lvd1En,
nmier::Lvd1En,
Nmier_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
2,
0x1,
1,
0,
nmier::Lvd1En,
nmier::Lvd1En,
Nmier_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "WDT Underflow/Refresh Error Interrupt Enable"]
#[inline(always)]
pub fn wdten(
self,
) -> crate::common::RegisterField<
1,
0x1,
1,
0,
nmier::Wdten,
nmier::Wdten,
Nmier_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
1,
0x1,
1,
0,
nmier::Wdten,
nmier::Wdten,
Nmier_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IWDT Underflow/Refresh Error Interrupt Enable"]
#[inline(always)]
pub fn iwdten(
self,
) -> crate::common::RegisterField<
0,
0x1,
1,
0,
nmier::Iwdten,
nmier::Iwdten,
Nmier_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0x1,
1,
0,
nmier::Iwdten,
nmier::Iwdten,
Nmier_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Nmier {
#[inline(always)]
fn default() -> Nmier {
<crate::RegValueT<Nmier_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod nmier {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Speen_SPEC;
pub type Speen = crate::EnumBitfieldStruct<u8, Speen_SPEC>;
impl Speen {
#[doc = "Disabled"]
pub const _0: Self = Self::new(0);
#[doc = "Enabled."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Busmen_SPEC;
pub type Busmen = crate::EnumBitfieldStruct<u8, Busmen_SPEC>;
impl Busmen {
#[doc = "Disabled"]
pub const _0: Self = Self::new(0);
#[doc = "Enabled."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Bussen_SPEC;
pub type Bussen = crate::EnumBitfieldStruct<u8, Bussen_SPEC>;
impl Bussen {
#[doc = "Disabled"]
pub const _0: Self = Self::new(0);
#[doc = "Enabled."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Reccen_SPEC;
pub type Reccen = crate::EnumBitfieldStruct<u8, Reccen_SPEC>;
impl Reccen {
#[doc = "Disabled"]
pub const _0: Self = Self::new(0);
#[doc = "Enabled."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Rpeen_SPEC;
pub type Rpeen = crate::EnumBitfieldStruct<u8, Rpeen_SPEC>;
impl Rpeen {
#[doc = "Disabled"]
pub const _0: Self = Self::new(0);
#[doc = "Enabled."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Nmien_SPEC;
pub type Nmien = crate::EnumBitfieldStruct<u8, Nmien_SPEC>;
impl Nmien {
#[doc = "Disabled"]
pub const _0: Self = Self::new(0);
#[doc = "Enabled."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Osten_SPEC;
pub type Osten = crate::EnumBitfieldStruct<u8, Osten_SPEC>;
impl Osten {
#[doc = "Disabled"]
pub const _0: Self = Self::new(0);
#[doc = "Enabled."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Vbatten_SPEC;
pub type Vbatten = crate::EnumBitfieldStruct<u8, Vbatten_SPEC>;
impl Vbatten {
#[doc = "Disabled"]
pub const _0: Self = Self::new(0);
#[doc = "Enabled."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Lvd2En_SPEC;
pub type Lvd2En = crate::EnumBitfieldStruct<u8, Lvd2En_SPEC>;
impl Lvd2En {
#[doc = "Disabled"]
pub const _0: Self = Self::new(0);
#[doc = "Enabled."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Lvd1En_SPEC;
pub type Lvd1En = crate::EnumBitfieldStruct<u8, Lvd1En_SPEC>;
impl Lvd1En {
#[doc = "Disabled"]
pub const _0: Self = Self::new(0);
#[doc = "Enabled."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Wdten_SPEC;
pub type Wdten = crate::EnumBitfieldStruct<u8, Wdten_SPEC>;
impl Wdten {
#[doc = "Disabled"]
pub const _0: Self = Self::new(0);
#[doc = "Enabled."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Iwdten_SPEC;
pub type Iwdten = crate::EnumBitfieldStruct<u8, Iwdten_SPEC>;
impl Iwdten {
#[doc = "Disabled"]
pub const _0: Self = Self::new(0);
#[doc = "Enabled."]
pub const _1: Self = Self::new(1);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Nmiclr_SPEC;
impl crate::sealed::RegSpec for Nmiclr_SPEC {
type DataType = u16;
}
#[doc = "Non-Maskable Interrupt Status Clear Register"]
pub type Nmiclr = crate::RegValueT<Nmiclr_SPEC>;
impl Nmiclr {
#[doc = "CPU Stack Pointer Monitor Interrupt Clear"]
#[inline(always)]
pub fn speclr(
self,
) -> crate::common::RegisterField<
12,
0x1,
1,
0,
nmiclr::Speclr,
nmiclr::Speclr,
Nmiclr_SPEC,
crate::common::W,
> {
crate::common::RegisterField::<
12,
0x1,
1,
0,
nmiclr::Speclr,
nmiclr::Speclr,
Nmiclr_SPEC,
crate::common::W,
>::from_register(self, 0)
}
#[doc = "Bus Master Error Clear"]
#[inline(always)]
pub fn busmclr(
self,
) -> crate::common::RegisterField<
11,
0x1,
1,
0,
nmiclr::Busmclr,
nmiclr::Busmclr,
Nmiclr_SPEC,
crate::common::W,
> {
crate::common::RegisterField::<
11,
0x1,
1,
0,
nmiclr::Busmclr,
nmiclr::Busmclr,
Nmiclr_SPEC,
crate::common::W,
>::from_register(self, 0)
}
#[doc = "Bus Slave Error Clear"]
#[inline(always)]
pub fn bussclr(
self,
) -> crate::common::RegisterField<
10,
0x1,
1,
0,
nmiclr::Bussclr,
nmiclr::Bussclr,
Nmiclr_SPEC,
crate::common::W,
> {
crate::common::RegisterField::<
10,
0x1,
1,
0,
nmiclr::Bussclr,
nmiclr::Bussclr,
Nmiclr_SPEC,
crate::common::W,
>::from_register(self, 0)
}
#[doc = "SRAM ECC Error Clear"]
#[inline(always)]
pub fn reccclr(
self,
) -> crate::common::RegisterField<
9,
0x1,
1,
0,
nmiclr::Reccclr,
nmiclr::Reccclr,
Nmiclr_SPEC,
crate::common::W,
> {
crate::common::RegisterField::<
9,
0x1,
1,
0,
nmiclr::Reccclr,
nmiclr::Reccclr,
Nmiclr_SPEC,
crate::common::W,
>::from_register(self, 0)
}
#[doc = "SRAM Parity Error Clear"]
#[inline(always)]
pub fn rpeclr(
self,
) -> crate::common::RegisterField<
8,
0x1,
1,
0,
nmiclr::Rpeclr,
nmiclr::Rpeclr,
Nmiclr_SPEC,
crate::common::W,
> {
crate::common::RegisterField::<
8,
0x1,
1,
0,
nmiclr::Rpeclr,
nmiclr::Rpeclr,
Nmiclr_SPEC,
crate::common::W,
>::from_register(self, 0)
}
#[doc = "NMI Clear"]
#[inline(always)]
pub fn nmiclr(
self,
) -> crate::common::RegisterField<
7,
0x1,
1,
0,
nmiclr::Nmiclr,
nmiclr::Nmiclr,
Nmiclr_SPEC,
crate::common::W,
> {
crate::common::RegisterField::<
7,
0x1,
1,
0,
nmiclr::Nmiclr,
nmiclr::Nmiclr,
Nmiclr_SPEC,
crate::common::W,
>::from_register(self, 0)
}
#[doc = "OST Clear"]
#[inline(always)]
pub fn ostclr(
self,
) -> crate::common::RegisterField<
6,
0x1,
1,
0,
nmiclr::Ostclr,
nmiclr::Ostclr,
Nmiclr_SPEC,
crate::common::W,
> {
crate::common::RegisterField::<
6,
0x1,
1,
0,
nmiclr::Ostclr,
nmiclr::Ostclr,
Nmiclr_SPEC,
crate::common::W,
>::from_register(self, 0)
}
#[doc = "This bit is read as 0. The write value should be 0."]
#[inline(always)]
pub fn reserved(
self,
) -> crate::common::RegisterFieldBool<5, 1, 0, Nmiclr_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<5, 1, 0, Nmiclr_SPEC, crate::common::RW>::from_register(
self, 0,
)
}
#[doc = "VBATT Clear"]
#[inline(always)]
pub fn vbattclr(
self,
) -> crate::common::RegisterField<
4,
0x1,
1,
0,
nmiclr::Vbattclr,
nmiclr::Vbattclr,
Nmiclr_SPEC,
crate::common::W,
> {
crate::common::RegisterField::<
4,
0x1,
1,
0,
nmiclr::Vbattclr,
nmiclr::Vbattclr,
Nmiclr_SPEC,
crate::common::W,
>::from_register(self, 0)
}
#[doc = "LVD2 Clear"]
#[inline(always)]
pub fn lvd2clr(
self,
) -> crate::common::RegisterField<
3,
0x1,
1,
0,
nmiclr::Lvd2Clr,
nmiclr::Lvd2Clr,
Nmiclr_SPEC,
crate::common::W,
> {
crate::common::RegisterField::<
3,
0x1,
1,
0,
nmiclr::Lvd2Clr,
nmiclr::Lvd2Clr,
Nmiclr_SPEC,
crate::common::W,
>::from_register(self, 0)
}
#[doc = "LVD1 Clear"]
#[inline(always)]
pub fn lvd1clr(
self,
) -> crate::common::RegisterField<
2,
0x1,
1,
0,
nmiclr::Lvd1Clr,
nmiclr::Lvd1Clr,
Nmiclr_SPEC,
crate::common::W,
> {
crate::common::RegisterField::<
2,
0x1,
1,
0,
nmiclr::Lvd1Clr,
nmiclr::Lvd1Clr,
Nmiclr_SPEC,
crate::common::W,
>::from_register(self, 0)
}
#[doc = "WDT Clear"]
#[inline(always)]
pub fn wdtclr(
self,
) -> crate::common::RegisterField<
1,
0x1,
1,
0,
nmiclr::Wdtclr,
nmiclr::Wdtclr,
Nmiclr_SPEC,
crate::common::W,
> {
crate::common::RegisterField::<
1,
0x1,
1,
0,
nmiclr::Wdtclr,
nmiclr::Wdtclr,
Nmiclr_SPEC,
crate::common::W,
>::from_register(self, 0)
}
#[doc = "IWDT Clear"]
#[inline(always)]
pub fn iwdtclr(
self,
) -> crate::common::RegisterField<
0,
0x1,
1,
0,
nmiclr::Iwdtclr,
nmiclr::Iwdtclr,
Nmiclr_SPEC,
crate::common::W,
> {
crate::common::RegisterField::<
0,
0x1,
1,
0,
nmiclr::Iwdtclr,
nmiclr::Iwdtclr,
Nmiclr_SPEC,
crate::common::W,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Nmiclr {
#[inline(always)]
fn default() -> Nmiclr {
<crate::RegValueT<Nmiclr_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod nmiclr {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Speclr_SPEC;
pub type Speclr = crate::EnumBitfieldStruct<u8, Speclr_SPEC>;
impl Speclr {
#[doc = "No effect."]
pub const _0: Self = Self::new(0);
#[doc = "Clear the NMISR.SPEST flag."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Busmclr_SPEC;
pub type Busmclr = crate::EnumBitfieldStruct<u8, Busmclr_SPEC>;
impl Busmclr {
#[doc = "No effect."]
pub const _0: Self = Self::new(0);
#[doc = "Clear the NMISR.BUSMST flag."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Bussclr_SPEC;
pub type Bussclr = crate::EnumBitfieldStruct<u8, Bussclr_SPEC>;
impl Bussclr {
#[doc = "No effect."]
pub const _0: Self = Self::new(0);
#[doc = "Clear the NMISR.BUSSST flag."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Reccclr_SPEC;
pub type Reccclr = crate::EnumBitfieldStruct<u8, Reccclr_SPEC>;
impl Reccclr {
#[doc = "No effect."]
pub const _0: Self = Self::new(0);
#[doc = "Clear the NMISR.RECCST flag."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Rpeclr_SPEC;
pub type Rpeclr = crate::EnumBitfieldStruct<u8, Rpeclr_SPEC>;
impl Rpeclr {
#[doc = "No effect."]
pub const _0: Self = Self::new(0);
#[doc = "Clear the NMISR.RPEST flag."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Nmiclr_SPEC;
pub type Nmiclr = crate::EnumBitfieldStruct<u8, Nmiclr_SPEC>;
impl Nmiclr {
#[doc = "No effect."]
pub const _0: Self = Self::new(0);
#[doc = "Clear the NMISR.NMIST flag."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Ostclr_SPEC;
pub type Ostclr = crate::EnumBitfieldStruct<u8, Ostclr_SPEC>;
impl Ostclr {
#[doc = "No effect."]
pub const _0: Self = Self::new(0);
#[doc = "Clear the NMISR.OSTST flag."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Vbattclr_SPEC;
pub type Vbattclr = crate::EnumBitfieldStruct<u8, Vbattclr_SPEC>;
impl Vbattclr {
#[doc = "No effect."]
pub const _0: Self = Self::new(0);
#[doc = "Clear the NMISR.VBATTST flag."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Lvd2Clr_SPEC;
pub type Lvd2Clr = crate::EnumBitfieldStruct<u8, Lvd2Clr_SPEC>;
impl Lvd2Clr {
#[doc = "No effect."]
pub const _0: Self = Self::new(0);
#[doc = "Clear the NMISR.LVD2ST flag."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Lvd1Clr_SPEC;
pub type Lvd1Clr = crate::EnumBitfieldStruct<u8, Lvd1Clr_SPEC>;
impl Lvd1Clr {
#[doc = "No effect."]
pub const _0: Self = Self::new(0);
#[doc = "Clear the NMISR.LVD1ST flag."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Wdtclr_SPEC;
pub type Wdtclr = crate::EnumBitfieldStruct<u8, Wdtclr_SPEC>;
impl Wdtclr {
#[doc = "No effect."]
pub const _0: Self = Self::new(0);
#[doc = "Clear the NMISR.WDTST flag."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Iwdtclr_SPEC;
pub type Iwdtclr = crate::EnumBitfieldStruct<u8, Iwdtclr_SPEC>;
impl Iwdtclr {
#[doc = "No effect."]
pub const _0: Self = Self::new(0);
#[doc = "Clear the NMISR.IWDTST flag."]
pub const _1: Self = Self::new(1);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Nmicr_SPEC;
impl crate::sealed::RegSpec for Nmicr_SPEC {
type DataType = u8;
}
#[doc = "NMI Pin Interrupt Control Register"]
pub type Nmicr = crate::RegValueT<Nmicr_SPEC>;
impl Nmicr {
#[doc = "NMI Digital Filter Enable"]
#[inline(always)]
pub fn nflten(
self,
) -> crate::common::RegisterField<
7,
0x1,
1,
0,
nmicr::Nflten,
nmicr::Nflten,
Nmicr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
7,
0x1,
1,
0,
nmicr::Nflten,
nmicr::Nflten,
Nmicr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "NMI Digital Filter Sampling Clock Select"]
#[inline(always)]
pub fn nfclksel(
self,
) -> crate::common::RegisterField<
4,
0x3,
1,
0,
nmicr::Nfclksel,
nmicr::Nfclksel,
Nmicr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
4,
0x3,
1,
0,
nmicr::Nfclksel,
nmicr::Nfclksel,
Nmicr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "These bits are read as 000. The write value should be 000."]
#[inline(always)]
pub fn reserved(
self,
) -> crate::common::RegisterField<1, 0x7, 1, 0, u8, u8, Nmicr_SPEC, crate::common::RW> {
crate::common::RegisterField::<1,0x7,1,0,u8,u8,Nmicr_SPEC,crate::common::RW>::from_register(self,0)
}
#[doc = "NMI Detection Set"]
#[inline(always)]
pub fn nmimd(
self,
) -> crate::common::RegisterField<
0,
0x1,
1,
0,
nmicr::Nmimd,
nmicr::Nmimd,
Nmicr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0x1,
1,
0,
nmicr::Nmimd,
nmicr::Nmimd,
Nmicr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Nmicr {
#[inline(always)]
fn default() -> Nmicr {
<crate::RegValueT<Nmicr_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod nmicr {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Nflten_SPEC;
pub type Nflten = crate::EnumBitfieldStruct<u8, Nflten_SPEC>;
impl Nflten {
#[doc = "Digital filter is disabled."]
pub const _0: Self = Self::new(0);
#[doc = "Digital filter is enabled."]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Nfclksel_SPEC;
pub type Nfclksel = crate::EnumBitfieldStruct<u8, Nfclksel_SPEC>;
impl Nfclksel {
#[doc = "PCLKB"]
pub const _00: Self = Self::new(0);
#[doc = "PCLKB/8"]
pub const _01: Self = Self::new(1);
#[doc = "PCLKB/32"]
pub const _10: Self = Self::new(2);
#[doc = "PCLKB/64"]
pub const _11: Self = Self::new(3);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Nmimd_SPEC;
pub type Nmimd = crate::EnumBitfieldStruct<u8, Nmimd_SPEC>;
impl Nmimd {
#[doc = "Falling edge"]
pub const _0: Self = Self::new(0);
#[doc = "Rising edge"]
pub const _1: Self = Self::new(1);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Ielsr_SPEC;
impl crate::sealed::RegSpec for Ielsr_SPEC {
type DataType = u32;
}
#[doc = "ICU Event Link Setting Register %s"]
pub type Ielsr = crate::RegValueT<Ielsr_SPEC>;
impl Ielsr {
#[doc = "DTC Activation Enable"]
#[inline(always)]
pub fn dtce(
self,
) -> crate::common::RegisterField<
24,
0x1,
1,
0,
ielsr::Dtce,
ielsr::Dtce,
Ielsr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
24,
0x1,
1,
0,
ielsr::Dtce,
ielsr::Dtce,
Ielsr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "Interrupt Status Flag"]
#[inline(always)]
pub fn ir(
self,
) -> crate::common::RegisterField<
16,
0x1,
1,
0,
ielsr::Ir,
ielsr::Ir,
Ielsr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
16,
0x1,
1,
0,
ielsr::Ir,
ielsr::Ir,
Ielsr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "These bits are read as 00000000. The write value should be 00000000."]
#[inline(always)]
pub fn reserved(
self,
) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ielsr_SPEC, crate::common::RW> {
crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ielsr_SPEC,crate::common::RW>::from_register(self,0)
}
#[doc = "ICU Event selection to NVICSet the number for the event signal to be linked ."]
#[inline(always)]
pub fn iels(
self,
) -> crate::common::RegisterField<
0,
0xff,
1,
0,
ielsr::Iels,
ielsr::Iels,
Ielsr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0xff,
1,
0,
ielsr::Iels,
ielsr::Iels,
Ielsr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Ielsr {
#[inline(always)]
fn default() -> Ielsr {
<crate::RegValueT<Ielsr_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod ielsr {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Dtce_SPEC;
pub type Dtce = crate::EnumBitfieldStruct<u8, Dtce_SPEC>;
impl Dtce {
#[doc = "DTC activation is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "DTC activation is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Ir_SPEC;
pub type Ir = crate::EnumBitfieldStruct<u8, Ir_SPEC>;
impl Ir {
#[doc = "No interrupt request is generated"]
pub const _0: Self = Self::new(0);
#[doc = "An interrupt request is generated ( 1 write to the IR bit is prohibited. )"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Iels_SPEC;
pub type Iels = crate::EnumBitfieldStruct<u8, Iels_SPEC>;
impl Iels {
#[doc = "Nothing is selected"]
pub const _0_X_000: Self = Self::new(0);
#[doc = "See Event Table"]
pub const OTHERS: Self = Self::new(0);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Delsr_SPEC;
impl crate::sealed::RegSpec for Delsr_SPEC {
type DataType = u16;
}
#[doc = "DMAC Event Link Setting Register %s"]
pub type Delsr = crate::RegValueT<Delsr_SPEC>;
impl Delsr {
#[doc = "These bits are read as 00000000. The write value should be 00000000."]
#[inline(always)]
pub fn reserved(
self,
) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Delsr_SPEC, crate::common::RW> {
crate::common::RegisterField::<8,0xff,1,0,u8,u8,Delsr_SPEC,crate::common::RW>::from_register(self,0)
}
#[doc = "Event selection to DMAC Start request"]
#[inline(always)]
pub fn dels(
self,
) -> crate::common::RegisterField<
0,
0xff,
1,
0,
delsr::Dels,
delsr::Dels,
Delsr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0xff,
1,
0,
delsr::Dels,
delsr::Dels,
Delsr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Delsr {
#[inline(always)]
fn default() -> Delsr {
<crate::RegValueT<Delsr_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod delsr {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Dels_SPEC;
pub type Dels = crate::EnumBitfieldStruct<u8, Dels_SPEC>;
impl Dels {
#[doc = "Nothing is selected."]
pub const _0_X_000: Self = Self::new(0);
#[doc = "See Event Table"]
pub const OTHERS: Self = Self::new(0);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Selsr0_SPEC;
impl crate::sealed::RegSpec for Selsr0_SPEC {
type DataType = u16;
}
#[doc = "Snooze Event Link Setting Register"]
pub type Selsr0 = crate::RegValueT<Selsr0_SPEC>;
impl Selsr0 {
#[doc = "These bits are read as 00000000. The write value should be 00000000."]
#[inline(always)]
pub fn reserved(
self,
) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Selsr0_SPEC, crate::common::RW> {
crate::common::RegisterField::<8,0xff,1,0,u8,u8,Selsr0_SPEC,crate::common::RW>::from_register(self,0)
}
#[doc = "SYS Event Link Select"]
#[inline(always)]
pub fn sels(
self,
) -> crate::common::RegisterField<
0,
0xff,
1,
0,
selsr0::Sels,
selsr0::Sels,
Selsr0_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0xff,
1,
0,
selsr0::Sels,
selsr0::Sels,
Selsr0_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Selsr0 {
#[inline(always)]
fn default() -> Selsr0 {
<crate::RegValueT<Selsr0_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod selsr0 {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Sels_SPEC;
pub type Sels = crate::EnumBitfieldStruct<u8, Sels_SPEC>;
impl Sels {
#[doc = "Nothing is selected"]
pub const _0_X_000: Self = Self::new(0);
#[doc = "DTC_COMPLETE"]
pub const _0_X_015: Self = Self::new(21);
#[doc = "ADC140_WCMPM"]
pub const _0_X_02_D: Self = Self::new(45);
#[doc = "ADC140_WCMPUM"]
pub const _0_X_02_E: Self = Self::new(46);
#[doc = "CTSU_CTSUFN"]
pub const _0_X_048: Self = Self::new(72);
#[doc = "DOC_DOPCI"]
pub const _0_X_04_A: Self = Self::new(74);
#[doc = "SCI0_AM"]
pub const _0_X_0_B_0: Self = Self::new(176);
#[doc = "SCI0_RXI_OR_ERI"]
pub const _0_X_0_B_1: Self = Self::new(177);
#[doc = "Settings prohibited."]
pub const OTHERS: Self = Self::new(0);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Wupen_SPEC;
impl crate::sealed::RegSpec for Wupen_SPEC {
type DataType = u32;
}
#[doc = "Wake Up Interrupt Enable Register"]
pub type Wupen = crate::RegValueT<Wupen_SPEC>;
impl Wupen {
#[doc = "IIC0 address match interrupt S/W standby returns enable"]
#[inline(always)]
pub fn iic0wupen(
self,
) -> crate::common::RegisterField<
31,
0x1,
1,
0,
wupen::Iic0Wupen,
wupen::Iic0Wupen,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
31,
0x1,
1,
0,
wupen::Iic0Wupen,
wupen::Iic0Wupen,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "AGT1 compare match B interrupt S/W standby returns enable"]
#[inline(always)]
pub fn agt1cbwupen(
self,
) -> crate::common::RegisterField<
30,
0x1,
1,
0,
wupen::Agt1Cbwupen,
wupen::Agt1Cbwupen,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
30,
0x1,
1,
0,
wupen::Agt1Cbwupen,
wupen::Agt1Cbwupen,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "AGT1 compare match A interrupt S/W standby returns enable"]
#[inline(always)]
pub fn agt1cawupen(
self,
) -> crate::common::RegisterField<
29,
0x1,
1,
0,
wupen::Agt1Cawupen,
wupen::Agt1Cawupen,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
29,
0x1,
1,
0,
wupen::Agt1Cawupen,
wupen::Agt1Cawupen,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "AGT1 underflow interrupt S/W standby returns enable"]
#[inline(always)]
pub fn agt1udwupen(
self,
) -> crate::common::RegisterField<
28,
0x1,
1,
0,
wupen::Agt1Udwupen,
wupen::Agt1Udwupen,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
28,
0x1,
1,
0,
wupen::Agt1Udwupen,
wupen::Agt1Udwupen,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "USBFS interrupt S/W standby returns enable"]
#[inline(always)]
pub fn usbfswupen(
self,
) -> crate::common::RegisterField<
27,
0x1,
1,
0,
wupen::Usbfswupen,
wupen::Usbfswupen,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
27,
0x1,
1,
0,
wupen::Usbfswupen,
wupen::Usbfswupen,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "RCT period interrupt S/W standby returns enable"]
#[inline(always)]
pub fn rtcprdwupen(
self,
) -> crate::common::RegisterField<
25,
0x1,
1,
0,
wupen::Rtcprdwupen,
wupen::Rtcprdwupen,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
25,
0x1,
1,
0,
wupen::Rtcprdwupen,
wupen::Rtcprdwupen,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "RTC alarm interrupt S/W standby returns enable"]
#[inline(always)]
pub fn rtcalmwupen(
self,
) -> crate::common::RegisterField<
24,
0x1,
1,
0,
wupen::Rtcalmwupen,
wupen::Rtcalmwupen,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
24,
0x1,
1,
0,
wupen::Rtcalmwupen,
wupen::Rtcalmwupen,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "ACMPLP0 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn acmplp0wupen(
self,
) -> crate::common::RegisterField<
23,
0x1,
1,
0,
wupen::Acmplp0Wupen,
wupen::Acmplp0Wupen,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
23,
0x1,
1,
0,
wupen::Acmplp0Wupen,
wupen::Acmplp0Wupen,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "These bits are read as 00. The write value should be 00."]
#[inline(always)]
pub fn reserved(
self,
) -> crate::common::RegisterField<21, 0x3, 1, 0, u8, u8, Wupen_SPEC, crate::common::RW> {
crate::common::RegisterField::<21,0x3,1,0,u8,u8,Wupen_SPEC,crate::common::RW>::from_register(self,0)
}
#[doc = "VBATT monitor interrupt S/W standby returns enable"]
#[inline(always)]
pub fn vbattwupen(
self,
) -> crate::common::RegisterField<
20,
0x1,
1,
0,
wupen::Vbattwupen,
wupen::Vbattwupen,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
20,
0x1,
1,
0,
wupen::Vbattwupen,
wupen::Vbattwupen,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "LVD2 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn lvd2wupen(
self,
) -> crate::common::RegisterField<
19,
0x1,
1,
0,
wupen::Lvd2Wupen,
wupen::Lvd2Wupen,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
19,
0x1,
1,
0,
wupen::Lvd2Wupen,
wupen::Lvd2Wupen,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "LVD1 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn lvd1wupen(
self,
) -> crate::common::RegisterField<
18,
0x1,
1,
0,
wupen::Lvd1Wupen,
wupen::Lvd1Wupen,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
18,
0x1,
1,
0,
wupen::Lvd1Wupen,
wupen::Lvd1Wupen,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "Key interrupt S/W standby returns enable"]
#[inline(always)]
pub fn keywupen(
self,
) -> crate::common::RegisterField<
17,
0x1,
1,
0,
wupen::Keywupen,
wupen::Keywupen,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
17,
0x1,
1,
0,
wupen::Keywupen,
wupen::Keywupen,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IWDT interrupt S/W standby returns enable"]
#[inline(always)]
pub fn iwdtwupen(
self,
) -> crate::common::RegisterField<
16,
0x1,
1,
0,
wupen::Iwdtwupen,
wupen::Iwdtwupen,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
16,
0x1,
1,
0,
wupen::Iwdtwupen,
wupen::Iwdtwupen,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ15 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen15(
self,
) -> crate::common::RegisterField<
15,
0x1,
1,
0,
wupen::Irqwupen15,
wupen::Irqwupen15,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
15,
0x1,
1,
0,
wupen::Irqwupen15,
wupen::Irqwupen15,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ14 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen14(
self,
) -> crate::common::RegisterField<
14,
0x1,
1,
0,
wupen::Irqwupen14,
wupen::Irqwupen14,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
14,
0x1,
1,
0,
wupen::Irqwupen14,
wupen::Irqwupen14,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ13 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen13(
self,
) -> crate::common::RegisterField<
13,
0x1,
1,
0,
wupen::Irqwupen13,
wupen::Irqwupen13,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
13,
0x1,
1,
0,
wupen::Irqwupen13,
wupen::Irqwupen13,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ12 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen12(
self,
) -> crate::common::RegisterField<
12,
0x1,
1,
0,
wupen::Irqwupen12,
wupen::Irqwupen12,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
12,
0x1,
1,
0,
wupen::Irqwupen12,
wupen::Irqwupen12,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ11 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen11(
self,
) -> crate::common::RegisterField<
11,
0x1,
1,
0,
wupen::Irqwupen11,
wupen::Irqwupen11,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
11,
0x1,
1,
0,
wupen::Irqwupen11,
wupen::Irqwupen11,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ10 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen10(
self,
) -> crate::common::RegisterField<
10,
0x1,
1,
0,
wupen::Irqwupen10,
wupen::Irqwupen10,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
10,
0x1,
1,
0,
wupen::Irqwupen10,
wupen::Irqwupen10,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ9 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen9(
self,
) -> crate::common::RegisterField<
9,
0x1,
1,
0,
wupen::Irqwupen9,
wupen::Irqwupen9,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
9,
0x1,
1,
0,
wupen::Irqwupen9,
wupen::Irqwupen9,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ8 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen8(
self,
) -> crate::common::RegisterField<
8,
0x1,
1,
0,
wupen::Irqwupen8,
wupen::Irqwupen8,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
8,
0x1,
1,
0,
wupen::Irqwupen8,
wupen::Irqwupen8,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ7 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen7(
self,
) -> crate::common::RegisterField<
7,
0x1,
1,
0,
wupen::Irqwupen7,
wupen::Irqwupen7,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
7,
0x1,
1,
0,
wupen::Irqwupen7,
wupen::Irqwupen7,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ6 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen6(
self,
) -> crate::common::RegisterField<
6,
0x1,
1,
0,
wupen::Irqwupen6,
wupen::Irqwupen6,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
6,
0x1,
1,
0,
wupen::Irqwupen6,
wupen::Irqwupen6,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ5 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen5(
self,
) -> crate::common::RegisterField<
5,
0x1,
1,
0,
wupen::Irqwupen5,
wupen::Irqwupen5,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
5,
0x1,
1,
0,
wupen::Irqwupen5,
wupen::Irqwupen5,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ4 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen4(
self,
) -> crate::common::RegisterField<
4,
0x1,
1,
0,
wupen::Irqwupen4,
wupen::Irqwupen4,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
4,
0x1,
1,
0,
wupen::Irqwupen4,
wupen::Irqwupen4,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ3 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen3(
self,
) -> crate::common::RegisterField<
3,
0x1,
1,
0,
wupen::Irqwupen3,
wupen::Irqwupen3,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
3,
0x1,
1,
0,
wupen::Irqwupen3,
wupen::Irqwupen3,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ2 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen2(
self,
) -> crate::common::RegisterField<
2,
0x1,
1,
0,
wupen::Irqwupen2,
wupen::Irqwupen2,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
2,
0x1,
1,
0,
wupen::Irqwupen2,
wupen::Irqwupen2,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ1 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen1(
self,
) -> crate::common::RegisterField<
1,
0x1,
1,
0,
wupen::Irqwupen1,
wupen::Irqwupen1,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
1,
0x1,
1,
0,
wupen::Irqwupen1,
wupen::Irqwupen1,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "IRQ0 interrupt S/W standby returns enable"]
#[inline(always)]
pub fn irqwupen0(
self,
) -> crate::common::RegisterField<
0,
0x1,
1,
0,
wupen::Irqwupen0,
wupen::Irqwupen0,
Wupen_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0x1,
1,
0,
wupen::Irqwupen0,
wupen::Irqwupen0,
Wupen_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Wupen {
#[inline(always)]
fn default() -> Wupen {
<crate::RegValueT<Wupen_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod wupen {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Iic0Wupen_SPEC;
pub type Iic0Wupen = crate::EnumBitfieldStruct<u8, Iic0Wupen_SPEC>;
impl Iic0Wupen {
#[doc = "S/W standby returns by IIC0 address match interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IIC0 address match interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Agt1Cbwupen_SPEC;
pub type Agt1Cbwupen = crate::EnumBitfieldStruct<u8, Agt1Cbwupen_SPEC>;
impl Agt1Cbwupen {
#[doc = "S/W standby returns by AGT1 compare match B interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by AGT1 compare match B interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Agt1Cawupen_SPEC;
pub type Agt1Cawupen = crate::EnumBitfieldStruct<u8, Agt1Cawupen_SPEC>;
impl Agt1Cawupen {
#[doc = "S/W standby returns by AGT1 compare match A interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by AGT1 compare match A interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Agt1Udwupen_SPEC;
pub type Agt1Udwupen = crate::EnumBitfieldStruct<u8, Agt1Udwupen_SPEC>;
impl Agt1Udwupen {
#[doc = "S/W standby returns by AGT1 underflow interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by AGT1 underflow interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Usbfswupen_SPEC;
pub type Usbfswupen = crate::EnumBitfieldStruct<u8, Usbfswupen_SPEC>;
impl Usbfswupen {
#[doc = "S/W standby returns by USBFS interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by USBFS interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Rtcprdwupen_SPEC;
pub type Rtcprdwupen = crate::EnumBitfieldStruct<u8, Rtcprdwupen_SPEC>;
impl Rtcprdwupen {
#[doc = "S/W standby returns by RTC period interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by RTC period interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Rtcalmwupen_SPEC;
pub type Rtcalmwupen = crate::EnumBitfieldStruct<u8, Rtcalmwupen_SPEC>;
impl Rtcalmwupen {
#[doc = "S/W standby returns by RTC alarm interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by RTC alarm interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Acmplp0Wupen_SPEC;
pub type Acmplp0Wupen = crate::EnumBitfieldStruct<u8, Acmplp0Wupen_SPEC>;
impl Acmplp0Wupen {
#[doc = "S/W standby returns by ACMPLP0 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by ACMPLP0 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Vbattwupen_SPEC;
pub type Vbattwupen = crate::EnumBitfieldStruct<u8, Vbattwupen_SPEC>;
impl Vbattwupen {
#[doc = "S/W standby returns by VBATT monitor interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by VBATT monitor interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Lvd2Wupen_SPEC;
pub type Lvd2Wupen = crate::EnumBitfieldStruct<u8, Lvd2Wupen_SPEC>;
impl Lvd2Wupen {
#[doc = "S/W standby returns by LVD2 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by LVD2 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Lvd1Wupen_SPEC;
pub type Lvd1Wupen = crate::EnumBitfieldStruct<u8, Lvd1Wupen_SPEC>;
impl Lvd1Wupen {
#[doc = "S/W standby returns by LVD1 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by LVD1 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Keywupen_SPEC;
pub type Keywupen = crate::EnumBitfieldStruct<u8, Keywupen_SPEC>;
impl Keywupen {
#[doc = "S/W standby returns by KEY interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by KEY interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Iwdtwupen_SPEC;
pub type Iwdtwupen = crate::EnumBitfieldStruct<u8, Iwdtwupen_SPEC>;
impl Iwdtwupen {
#[doc = "S/W standby returns by IWDT interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IWDT interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen15_SPEC;
pub type Irqwupen15 = crate::EnumBitfieldStruct<u8, Irqwupen15_SPEC>;
impl Irqwupen15 {
#[doc = "S/W standby returns by IRQ15 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ15 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen14_SPEC;
pub type Irqwupen14 = crate::EnumBitfieldStruct<u8, Irqwupen14_SPEC>;
impl Irqwupen14 {
#[doc = "S/W standby returns by IRQ14 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ14 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen13_SPEC;
pub type Irqwupen13 = crate::EnumBitfieldStruct<u8, Irqwupen13_SPEC>;
impl Irqwupen13 {
#[doc = "S/W standby returns by IRQ13 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ13 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen12_SPEC;
pub type Irqwupen12 = crate::EnumBitfieldStruct<u8, Irqwupen12_SPEC>;
impl Irqwupen12 {
#[doc = "S/W standby returns by IRQ12 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ12 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen11_SPEC;
pub type Irqwupen11 = crate::EnumBitfieldStruct<u8, Irqwupen11_SPEC>;
impl Irqwupen11 {
#[doc = "S/W standby returns by IRQ11 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ11 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen10_SPEC;
pub type Irqwupen10 = crate::EnumBitfieldStruct<u8, Irqwupen10_SPEC>;
impl Irqwupen10 {
#[doc = "S/W standby returns by IRQ10 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ10 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen9_SPEC;
pub type Irqwupen9 = crate::EnumBitfieldStruct<u8, Irqwupen9_SPEC>;
impl Irqwupen9 {
#[doc = "S/W standby returns by IRQ9 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ9 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen8_SPEC;
pub type Irqwupen8 = crate::EnumBitfieldStruct<u8, Irqwupen8_SPEC>;
impl Irqwupen8 {
#[doc = "S/W standby returns by IRQ8 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ8 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen7_SPEC;
pub type Irqwupen7 = crate::EnumBitfieldStruct<u8, Irqwupen7_SPEC>;
impl Irqwupen7 {
#[doc = "S/W standby returns by IRQ7 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ7 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen6_SPEC;
pub type Irqwupen6 = crate::EnumBitfieldStruct<u8, Irqwupen6_SPEC>;
impl Irqwupen6 {
#[doc = "S/W standby returns by IRQ6 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ6 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen5_SPEC;
pub type Irqwupen5 = crate::EnumBitfieldStruct<u8, Irqwupen5_SPEC>;
impl Irqwupen5 {
#[doc = "S/W standby returns by IRQ5 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ5 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen4_SPEC;
pub type Irqwupen4 = crate::EnumBitfieldStruct<u8, Irqwupen4_SPEC>;
impl Irqwupen4 {
#[doc = "S/W standby returns by IRQ4 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ4 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen3_SPEC;
pub type Irqwupen3 = crate::EnumBitfieldStruct<u8, Irqwupen3_SPEC>;
impl Irqwupen3 {
#[doc = "S/W standby returns by IRQ3 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ3 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen2_SPEC;
pub type Irqwupen2 = crate::EnumBitfieldStruct<u8, Irqwupen2_SPEC>;
impl Irqwupen2 {
#[doc = "S/W standby returns by IRQ2 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ2 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen1_SPEC;
pub type Irqwupen1 = crate::EnumBitfieldStruct<u8, Irqwupen1_SPEC>;
impl Irqwupen1 {
#[doc = "S/W standby returns by IRQ1 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ1 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Irqwupen0_SPEC;
pub type Irqwupen0 = crate::EnumBitfieldStruct<u8, Irqwupen0_SPEC>;
impl Irqwupen0 {
#[doc = "S/W standby returns by IRQ0 interrupt is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "S/W standby returns by IRQ0 interrupt is enabled"]
pub const _1: Self = Self::new(1);
}
}