pytv 0.5.5

Python Templated Verilog
Documentation
[package]
name = "pytv"
description = "Python Templated Verilog"
repository = "https://github.com/autohdw/pytv"
authors = ["Teddy van Jerry <me@teddy-van-jerry.org>"]
version = "0.5.5"
readme = "README.md"
license = "GPL-3.0-or-later"
keywords = ["verilog", "python", "template", "generation"]
categories = ["template-engine", "compilers", "development-tools"]
exclude = [
    "examples/*",
    "target/*",
    "Cargo.lock",
    ".github/*",
    ".vscode/*",
    ".DS_Store",
    "private/*",
]
edition = "2021"

[features]
default = ["inst", "macro"]
inst = ["dep:serde", "dep:serde_yaml"]
macro = []

[dependencies]
clap = { version = "4.5.2", features = ["derive"] }
regex = "1.10.3"
utf8_slice = "1.0.0"
serde = { version = "1.0", optional = true }
serde_yaml = { version = "0.9", optional = true }