#[derive(Copy, Clone, Debug)]
pub enum AddressingMode {
ACC,
ABS,
ABSX,
ABSY,
IMM,
IMPL,
IND,
XIND,
INDY,
REL,
ZPG,
ZPGX,
ZPGY,
}
#[derive(Copy, Clone, Debug)]
pub enum Operation {
ADC,
AND,
ASL,
BCC,
BCS,
BEQ,
BIT,
BMI,
BNE,
BPL,
BRK,
BVC,
BVS,
CLC,
CLD,
CLI,
CLV,
CMP,
CPX,
CPY,
DEC,
DEX,
DEY,
EOR,
INC,
INX,
INY,
JMP,
JSR,
LDA,
LDX,
LDY,
LSR,
NOP,
ORA,
PHA,
PHP,
PLA,
PLP,
ROL,
ROR,
RTI,
RTS,
SBC,
SEC,
SED,
SEI,
STA,
STX,
STY,
TAX,
TAY,
TSX,
TXA,
TXS,
TYA,
}
pub struct Instruction {
pub opcode: u8,
pub operation: Operation,
pub mode: AddressingMode,
pub cycles: u8,
}
pub fn opcode_to_instruction(opcode: u8) -> Instruction {
match opcode {
0x00 => Instruction {
opcode: 0x00,
operation: Operation::BRK,
mode: AddressingMode::IMPL,
cycles: 7,
},
0x01 => Instruction {
opcode: 0x01,
operation: Operation::ORA,
mode: AddressingMode::XIND,
cycles: 6,
},
0x05 => Instruction {
opcode: 0x05,
operation: Operation::ORA,
mode: AddressingMode::ZPG,
cycles: 3,
},
0x06 => Instruction {
opcode: 0x06,
operation: Operation::ASL,
mode: AddressingMode::ZPG,
cycles: 5,
},
0x08 => Instruction {
opcode: 0x08,
operation: Operation::PHP,
mode: AddressingMode::IMPL,
cycles: 3,
},
0x09 => Instruction {
opcode: 0x09,
operation: Operation::ORA,
mode: AddressingMode::IMM,
cycles: 2,
},
0x0A => Instruction {
opcode: 0x0A,
operation: Operation::ASL,
mode: AddressingMode::ACC,
cycles: 2,
},
0x0D => Instruction {
opcode: 0x0D,
operation: Operation::ORA,
mode: AddressingMode::ABS,
cycles: 4,
},
0x0E => Instruction {
opcode: 0x0E,
operation: Operation::ASL,
mode: AddressingMode::ABS,
cycles: 6,
},
0x10 => Instruction {
opcode: 0x10,
operation: Operation::BPL,
mode: AddressingMode::REL,
cycles: 2,
},
0x11 => Instruction {
opcode: 0x11,
operation: Operation::ORA,
mode: AddressingMode::INDY,
cycles: 5,
},
0x15 => Instruction {
opcode: 0x15,
operation: Operation::ORA,
mode: AddressingMode::ZPGX,
cycles: 4,
},
0x16 => Instruction {
opcode: 0x16,
operation: Operation::ASL,
mode: AddressingMode::ZPGX,
cycles: 6,
},
0x18 => Instruction {
opcode: 0x18,
operation: Operation::CLC,
mode: AddressingMode::IMPL,
cycles: 2,
},
0x19 => Instruction {
opcode: 0x19,
operation: Operation::ORA,
mode: AddressingMode::ABSY,
cycles: 4,
},
0x1D => Instruction {
opcode: 0x1D,
operation: Operation::ORA,
mode: AddressingMode::ABSX,
cycles: 4,
},
0x1E => Instruction {
opcode: 0x1E,
operation: Operation::ASL,
mode: AddressingMode::ABSX,
cycles: 7,
},
0x20 => Instruction {
opcode: 0x20,
operation: Operation::JSR,
mode: AddressingMode::ABS,
cycles: 6,
},
0x21 => Instruction {
opcode: 0x21,
operation: Operation::AND,
mode: AddressingMode::XIND,
cycles: 6,
},
0x24 => Instruction {
opcode: 0x24,
operation: Operation::BIT,
mode: AddressingMode::ZPG,
cycles: 3,
},
0x25 => Instruction {
opcode: 0x25,
operation: Operation::AND,
mode: AddressingMode::ZPG,
cycles: 3,
},
0x26 => Instruction {
opcode: 0x26,
operation: Operation::ROL,
mode: AddressingMode::ZPG,
cycles: 5,
},
0x28 => Instruction {
opcode: 0x28,
operation: Operation::PLP,
mode: AddressingMode::IMPL,
cycles: 4,
},
0x29 => Instruction {
opcode: 0x29,
operation: Operation::AND,
mode: AddressingMode::IMM,
cycles: 2,
},
0x2A => Instruction {
opcode: 0x2A,
operation: Operation::ROL,
mode: AddressingMode::ACC,
cycles: 2,
},
0x2C => Instruction {
opcode: 0x2C,
operation: Operation::BIT,
mode: AddressingMode::ABS,
cycles: 4,
},
0x2D => Instruction {
opcode: 0x2D,
operation: Operation::AND,
mode: AddressingMode::ABS,
cycles: 4,
},
0x2E => Instruction {
opcode: 0x2E,
operation: Operation::ROL,
mode: AddressingMode::ABS,
cycles: 6,
},
0x30 => Instruction {
opcode: 0x30,
operation: Operation::BMI,
mode: AddressingMode::REL,
cycles: 2,
},
0x31 => Instruction {
opcode: 0x31,
operation: Operation::AND,
mode: AddressingMode::INDY,
cycles: 5,
},
0x35 => Instruction {
opcode: 0x35,
operation: Operation::AND,
mode: AddressingMode::ZPGX,
cycles: 4,
},
0x36 => Instruction {
opcode: 0x36,
operation: Operation::ROL,
mode: AddressingMode::ZPGX,
cycles: 6,
},
0x38 => Instruction {
opcode: 0x38,
operation: Operation::SEC,
mode: AddressingMode::IMPL,
cycles: 2,
},
0x39 => Instruction {
opcode: 0x39,
operation: Operation::AND,
mode: AddressingMode::ABSY,
cycles: 4,
},
0x3D => Instruction {
opcode: 0x3D,
operation: Operation::AND,
mode: AddressingMode::ABSX,
cycles: 4,
},
0x3E => Instruction {
opcode: 0x3E,
operation: Operation::ROL,
mode: AddressingMode::ABSX,
cycles: 7,
},
0x40 => Instruction {
opcode: 0x40,
operation: Operation::RTI,
mode: AddressingMode::IMPL,
cycles: 6,
},
0x41 => Instruction {
opcode: 0x41,
operation: Operation::EOR,
mode: AddressingMode::XIND,
cycles: 6,
},
0x45 => Instruction {
opcode: 0x45,
operation: Operation::EOR,
mode: AddressingMode::ZPG,
cycles: 3,
},
0x46 => Instruction {
opcode: 0x46,
operation: Operation::LSR,
mode: AddressingMode::ZPG,
cycles: 5,
},
0x48 => Instruction {
opcode: 0x48,
operation: Operation::PHA,
mode: AddressingMode::IMPL,
cycles: 3,
},
0x49 => Instruction {
opcode: 0x49,
operation: Operation::EOR,
mode: AddressingMode::IMM,
cycles: 2,
},
0x4A => Instruction {
opcode: 0x4A,
operation: Operation::LSR,
mode: AddressingMode::ACC,
cycles: 2,
},
0x4C => Instruction {
opcode: 0x4C,
operation: Operation::JMP,
mode: AddressingMode::ABS,
cycles: 3,
},
0x4D => Instruction {
opcode: 0x4D,
operation: Operation::EOR,
mode: AddressingMode::ABS,
cycles: 4,
},
0x4E => Instruction {
opcode: 0x4E,
operation: Operation::LSR,
mode: AddressingMode::ABS,
cycles: 6,
},
0x50 => Instruction {
opcode: 0x50,
operation: Operation::BVC,
mode: AddressingMode::REL,
cycles: 2,
},
0x51 => Instruction {
opcode: 0x51,
operation: Operation::EOR,
mode: AddressingMode::INDY,
cycles: 5,
},
0x55 => Instruction {
opcode: 0x55,
operation: Operation::EOR,
mode: AddressingMode::ZPGX,
cycles: 4,
},
0x56 => Instruction {
opcode: 0x56,
operation: Operation::LSR,
mode: AddressingMode::ZPGX,
cycles: 6,
},
0x58 => Instruction {
opcode: 0x58,
operation: Operation::CLI,
mode: AddressingMode::IMPL,
cycles: 2,
},
0x59 => Instruction {
opcode: 0x59,
operation: Operation::EOR,
mode: AddressingMode::ABSY,
cycles: 4,
},
0x5D => Instruction {
opcode: 0x5D,
operation: Operation::EOR,
mode: AddressingMode::ABSX,
cycles: 4,
},
0x5E => Instruction {
opcode: 0x5E,
operation: Operation::LSR,
mode: AddressingMode::ABSX,
cycles: 7,
},
0x60 => Instruction {
opcode: 0x60,
operation: Operation::RTS,
mode: AddressingMode::IMPL,
cycles: 6,
},
0x61 => Instruction {
opcode: 0x61,
operation: Operation::ADC,
mode: AddressingMode::XIND,
cycles: 6,
},
0x65 => Instruction {
opcode: 0x65,
operation: Operation::ADC,
mode: AddressingMode::ZPG,
cycles: 3,
},
0x66 => Instruction {
opcode: 0x66,
operation: Operation::ROR,
mode: AddressingMode::ZPG,
cycles: 5,
},
0x68 => Instruction {
opcode: 0x68,
operation: Operation::PLA,
mode: AddressingMode::IMPL,
cycles: 4,
},
0x69 => Instruction {
opcode: 0x69,
operation: Operation::ADC,
mode: AddressingMode::IMM,
cycles: 2,
},
0x6A => Instruction {
opcode: 0x6A,
operation: Operation::ROR,
mode: AddressingMode::ACC,
cycles: 2,
},
0x6C => Instruction {
opcode: 0x6C,
operation: Operation::JMP,
mode: AddressingMode::IND,
cycles: 5,
},
0x6D => Instruction {
opcode: 0x6D,
operation: Operation::ADC,
mode: AddressingMode::ABS,
cycles: 4,
},
0x6E => Instruction {
opcode: 0x6E,
operation: Operation::ROR,
mode: AddressingMode::ABS,
cycles: 6,
},
0x70 => Instruction {
opcode: 0x70,
operation: Operation::BVS,
mode: AddressingMode::REL,
cycles: 2,
},
0x71 => Instruction {
opcode: 0x71,
operation: Operation::ADC,
mode: AddressingMode::INDY,
cycles: 5,
},
0x75 => Instruction {
opcode: 0x75,
operation: Operation::ADC,
mode: AddressingMode::ZPGX,
cycles: 4,
},
0x76 => Instruction {
opcode: 0x76,
operation: Operation::ROR,
mode: AddressingMode::ZPGX,
cycles: 6,
},
0x78 => Instruction {
opcode: 0x78,
operation: Operation::SEI,
mode: AddressingMode::IMPL,
cycles: 2,
},
0x79 => Instruction {
opcode: 0x79,
operation: Operation::ADC,
mode: AddressingMode::ABSY,
cycles: 4,
},
0x7D => Instruction {
opcode: 0x7D,
operation: Operation::ADC,
mode: AddressingMode::ABSX,
cycles: 4,
},
0x7E => Instruction {
opcode: 0x7E,
operation: Operation::ROR,
mode: AddressingMode::ABSX,
cycles: 7,
},
0x81 => Instruction {
opcode: 0x81,
operation: Operation::STA,
mode: AddressingMode::XIND,
cycles: 6,
},
0x84 => Instruction {
opcode: 0x84,
operation: Operation::STY,
mode: AddressingMode::ZPG,
cycles: 3,
},
0x85 => Instruction {
opcode: 0x85,
operation: Operation::STA,
mode: AddressingMode::ZPG,
cycles: 3,
},
0x86 => Instruction {
opcode: 0x86,
operation: Operation::STX,
mode: AddressingMode::ZPG,
cycles: 3,
},
0x88 => Instruction {
opcode: 0x88,
operation: Operation::DEY,
mode: AddressingMode::IMPL,
cycles: 2,
},
0x8A => Instruction {
opcode: 0x8A,
operation: Operation::TXA,
mode: AddressingMode::IMPL,
cycles: 2,
},
0x8C => Instruction {
opcode: 0x8C,
operation: Operation::STY,
mode: AddressingMode::ABS,
cycles: 4,
},
0x8D => Instruction {
opcode: 0x8D,
operation: Operation::STA,
mode: AddressingMode::ABS,
cycles: 4,
},
0x8E => Instruction {
opcode: 0x8E,
operation: Operation::STX,
mode: AddressingMode::ABS,
cycles: 4,
},
0x90 => Instruction {
opcode: 0x90,
operation: Operation::BCC,
mode: AddressingMode::REL,
cycles: 2,
},
0x91 => Instruction {
opcode: 0x91,
operation: Operation::STA,
mode: AddressingMode::INDY,
cycles: 6,
},
0x94 => Instruction {
opcode: 0x94,
operation: Operation::STY,
mode: AddressingMode::ZPGX,
cycles: 4,
},
0x95 => Instruction {
opcode: 0x95,
operation: Operation::STA,
mode: AddressingMode::ZPGX,
cycles: 4,
},
0x96 => Instruction {
opcode: 0x96,
operation: Operation::STX,
mode: AddressingMode::ZPGY,
cycles: 4,
},
0x98 => Instruction {
opcode: 0x98,
operation: Operation::TYA,
mode: AddressingMode::IMPL,
cycles: 2,
},
0x99 => Instruction {
opcode: 0x99,
operation: Operation::STA,
mode: AddressingMode::ABSY,
cycles: 5,
},
0x9A => Instruction {
opcode: 0x9A,
operation: Operation::TXS,
mode: AddressingMode::IMPL,
cycles: 2,
},
0x9D => Instruction {
opcode: 0x9D,
operation: Operation::STA,
mode: AddressingMode::ABSX,
cycles: 5,
},
0xA0 => Instruction {
opcode: 0xA0,
operation: Operation::LDY,
mode: AddressingMode::IMM,
cycles: 2,
},
0xA1 => Instruction {
opcode: 0xA1,
operation: Operation::LDA,
mode: AddressingMode::XIND,
cycles: 6,
},
0xA2 => Instruction {
opcode: 0xA2,
operation: Operation::LDX,
mode: AddressingMode::IMM,
cycles: 2,
},
0xA4 => Instruction {
opcode: 0xA4,
operation: Operation::LDY,
mode: AddressingMode::ZPG,
cycles: 3,
},
0xA5 => Instruction {
opcode: 0xA5,
operation: Operation::LDA,
mode: AddressingMode::ZPG,
cycles: 3,
},
0xA6 => Instruction {
opcode: 0xA6,
operation: Operation::LDX,
mode: AddressingMode::ZPG,
cycles: 3,
},
0xA8 => Instruction {
opcode: 0xA8,
operation: Operation::TAY,
mode: AddressingMode::IMPL,
cycles: 2,
},
0xA9 => Instruction {
opcode: 0xA9,
operation: Operation::LDA,
mode: AddressingMode::IMM,
cycles: 2,
},
0xAA => Instruction {
opcode: 0xAA,
operation: Operation::TAX,
mode: AddressingMode::IMPL,
cycles: 2,
},
0xAC => Instruction {
opcode: 0xAC,
operation: Operation::LDY,
mode: AddressingMode::ABS,
cycles: 4,
},
0xAD => Instruction {
opcode: 0xAD,
operation: Operation::LDA,
mode: AddressingMode::ABS,
cycles: 4,
},
0xAE => Instruction {
opcode: 0xAE,
operation: Operation::LDX,
mode: AddressingMode::ABS,
cycles: 4,
},
0xB0 => Instruction {
opcode: 0xB0,
operation: Operation::BCS,
mode: AddressingMode::REL,
cycles: 2,
},
0xB1 => Instruction {
opcode: 0xB1,
operation: Operation::LDA,
mode: AddressingMode::INDY,
cycles: 5,
},
0xB4 => Instruction {
opcode: 0xB4,
operation: Operation::LDY,
mode: AddressingMode::ZPGX,
cycles: 4,
},
0xB5 => Instruction {
opcode: 0xB5,
operation: Operation::LDA,
mode: AddressingMode::ZPGX,
cycles: 4,
},
0xB6 => Instruction {
opcode: 0xB6,
operation: Operation::LDX,
mode: AddressingMode::ZPGY,
cycles: 4,
},
0xB8 => Instruction {
opcode: 0xB8,
operation: Operation::CLV,
mode: AddressingMode::IMPL,
cycles: 2,
},
0xB9 => Instruction {
opcode: 0xB9,
operation: Operation::LDA,
mode: AddressingMode::ABSY,
cycles: 4,
},
0xBA => Instruction {
opcode: 0xBA,
operation: Operation::TSX,
mode: AddressingMode::IMPL,
cycles: 2,
},
0xBC => Instruction {
opcode: 0xBC,
operation: Operation::LDY,
mode: AddressingMode::ABSX,
cycles: 4,
},
0xBD => Instruction {
opcode: 0xBD,
operation: Operation::LDA,
mode: AddressingMode::ABSX,
cycles: 4,
},
0xBE => Instruction {
opcode: 0xBE,
operation: Operation::LDX,
mode: AddressingMode::ABSY,
cycles: 4,
},
0xC0 => Instruction {
opcode: 0xC0,
operation: Operation::CPY,
mode: AddressingMode::IMM,
cycles: 2,
},
0xC1 => Instruction {
opcode: 0xC1,
operation: Operation::CMP,
mode: AddressingMode::XIND,
cycles: 6,
},
0xC4 => Instruction {
opcode: 0xC4,
operation: Operation::CPY,
mode: AddressingMode::ZPG,
cycles: 3,
},
0xC5 => Instruction {
opcode: 0xC5,
operation: Operation::CMP,
mode: AddressingMode::ZPG,
cycles: 3,
},
0xC6 => Instruction {
opcode: 0xC6,
operation: Operation::DEC,
mode: AddressingMode::ZPG,
cycles: 5,
},
0xC8 => Instruction {
opcode: 0xC8,
operation: Operation::INY,
mode: AddressingMode::IMPL,
cycles: 2,
},
0xC9 => Instruction {
opcode: 0xC9,
operation: Operation::CMP,
mode: AddressingMode::IMM,
cycles: 2,
},
0xCA => Instruction {
opcode: 0xCA,
operation: Operation::DEX,
mode: AddressingMode::IMPL,
cycles: 2,
},
0xCC => Instruction {
opcode: 0xCC,
operation: Operation::CPY,
mode: AddressingMode::ABS,
cycles: 4,
},
0xCD => Instruction {
opcode: 0xCD,
operation: Operation::CMP,
mode: AddressingMode::ABS,
cycles: 4,
},
0xCE => Instruction {
opcode: 0xCE,
operation: Operation::DEC,
mode: AddressingMode::ABS,
cycles: 6,
},
0xD0 => Instruction {
opcode: 0xD0,
operation: Operation::BNE,
mode: AddressingMode::REL,
cycles: 2,
},
0xD1 => Instruction {
opcode: 0xD1,
operation: Operation::CMP,
mode: AddressingMode::INDY,
cycles: 5,
},
0xD5 => Instruction {
opcode: 0xD5,
operation: Operation::CMP,
mode: AddressingMode::ZPGX,
cycles: 4,
},
0xD6 => Instruction {
opcode: 0xD6,
operation: Operation::DEC,
mode: AddressingMode::ZPGX,
cycles: 6,
},
0xD8 => Instruction {
opcode: 0xD8,
operation: Operation::CLD,
mode: AddressingMode::IMPL,
cycles: 2,
},
0xD9 => Instruction {
opcode: 0xD9,
operation: Operation::CMP,
mode: AddressingMode::ABSY,
cycles: 4,
},
0xDD => Instruction {
opcode: 0xDD,
operation: Operation::CMP,
mode: AddressingMode::ABSX,
cycles: 4,
},
0xDE => Instruction {
opcode: 0xDE,
operation: Operation::DEC,
mode: AddressingMode::ABSX,
cycles: 7,
},
0xE0 => Instruction {
opcode: 0xE0,
operation: Operation::CPX,
mode: AddressingMode::IMM,
cycles: 2,
},
0xE1 => Instruction {
opcode: 0xE1,
operation: Operation::SBC,
mode: AddressingMode::XIND,
cycles: 6,
},
0xE4 => Instruction {
opcode: 0xE4,
operation: Operation::CPX,
mode: AddressingMode::ZPG,
cycles: 3,
},
0xE5 => Instruction {
opcode: 0xE5,
operation: Operation::SBC,
mode: AddressingMode::ZPG,
cycles: 3,
},
0xE6 => Instruction {
opcode: 0xE6,
operation: Operation::INC,
mode: AddressingMode::ZPG,
cycles: 5,
},
0xE8 => Instruction {
opcode: 0xE8,
operation: Operation::INX,
mode: AddressingMode::IMPL,
cycles: 2,
},
0xE9 => Instruction {
opcode: 0xE9,
operation: Operation::SBC,
mode: AddressingMode::IMM,
cycles: 2,
},
0xEA => Instruction {
opcode: 0xEA,
operation: Operation::NOP,
mode: AddressingMode::IMPL,
cycles: 2,
},
0xEC => Instruction {
opcode: 0xEC,
operation: Operation::CPX,
mode: AddressingMode::ABS,
cycles: 4,
},
0xED => Instruction {
opcode: 0xED,
operation: Operation::SBC,
mode: AddressingMode::ABS,
cycles: 4,
},
0xEE => Instruction {
opcode: 0xEE,
operation: Operation::INC,
mode: AddressingMode::ABS,
cycles: 6,
},
0xF0 => Instruction {
opcode: 0xF0,
operation: Operation::BEQ,
mode: AddressingMode::REL,
cycles: 2,
},
0xF1 => Instruction {
opcode: 0xF1,
operation: Operation::SBC,
mode: AddressingMode::INDY,
cycles: 5,
},
0xF5 => Instruction {
opcode: 0xF5,
operation: Operation::SBC,
mode: AddressingMode::ZPGX,
cycles: 4,
},
0xF6 => Instruction {
opcode: 0xF6,
operation: Operation::INC,
mode: AddressingMode::ZPGX,
cycles: 6,
},
0xF8 => Instruction {
opcode: 0xF8,
operation: Operation::SED,
mode: AddressingMode::IMPL,
cycles: 2,
},
0xF9 => Instruction {
opcode: 0xF9,
operation: Operation::SBC,
mode: AddressingMode::ABSY,
cycles: 4,
},
0xFD => Instruction {
opcode: 0xFD,
operation: Operation::SBC,
mode: AddressingMode::ABSX,
cycles: 4,
},
0xFE => Instruction {
opcode: 0xFE,
operation: Operation::INC,
mode: AddressingMode::ABSX,
cycles: 7,
},
_ => panic!("Unknown opcode: {:02X}", opcode),
}
}