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/**
* @ingroup emu68_lib
* @file emu68/inst68.h
* @author Benjamin Gerard
* @date 1999/03/13
* @brief 68k arithmetic and logical instruction header.
*
*/
/* $Id: inst68.h 122 2009-07-02 04:07:08Z benjihan $ */
/* Copyright (C) 1998-2009 Benjamin Gerard */
/** @defgroup emu68_lib_inst 68k Instructions
* @ingroup emu68_lib_core
* @{
*/
/** @name Arithmetical instruction functions
*
* The integer arithmetic operations include four basic operations:
* ADD, SUB, MUL, and DIV. They also include CMP, CMPM, CMP2, CLR,
* and NEG. The instruction set includes ADD, CMP, and SUB
* instructions for both address and data operations with all operand
* sizes valid for data operations. Address operands consist of 16 or
* 32 bits. The CLR and NEG instructions apply to all sizes of data
* operands. Signed and unsigned MUL and DIV instructions include:
* - Word multiply to produce a long product.
* - Long divided by a word divisor (word quotient, word remainder).
*
* @{
*/
/** 68K ADD/X instruction.
*
* The add68() function performs addition and updates SR flags
* accordingly.
*
* @param emu68 68k emulator instance.
* @param s normalized source operand
* @param d normalized destination operand
* @param c normalized carry
* @return nornmalized result
* @retval d + s + c
*/
int68_t ;
/** 68K SUB/X instruction.
*
* The sub68() function performs substraction and updates SR flags
* accordingly.
*
* @param emu68 68k emulator instance.
* @param s normalized source operand
* @param d normalized destination operand
* @param c normalized carry
* @return nornmalized result
* @retval d - s - c
*/
int68_t ;
/** 68K CMP instruction.
*
* The cmp68() function performs substraction d minus s and updates
* SR flags accordingly.
*
* @param emu68 68k emulator instance.
* @param s normalized source operand
* @param d normalized destination operand
*/
void ;
/** 68k NEG/X instruction.
*
* The neg68() function performs 2nd complement and updates SR flags
* accordingly.
*
* @param emu68 68k emulator instance.
* @param d normalized destination operand
* @param c normalized carry
* @return normalized result
* @retval -d - c
*/
int68_t ;
/** 68K MULS instruction.
*
* The muls68() function performs signed multiplication and updates
* SR flags accordingly.
*
* @param emu68 68k emulator instance.
* @param s normalized word source operand
* @param d normalized word destination operand
* @return normalized long result
* @retval d * s
*/
int68_t ;
/** 68K MULU instruction.
*
* The mulu68() function performs unsigned multiplication and updates
* SR flags accordingly.
*
* @param emu68 68k emulator instance.
* @param s normalized word source operand
* @param d normalized word destination operand
* @return normalized long result
* @retval d * s
*/
int68_t ;
/** 68K DIVS instruction.
*
* The divs68() function performs signed division and updates SR
* flags accordingly. In case of divide by zero the corresponding
* exception is triggered. In case of overflow the result is the
* destination unchanged; additionnally V SR flag is set.
*
* @param emu68 68k emulator instance.
* @param s normalized word source operand
* @param d normalized long destination operand
* @return result
* @retval MSW:d%s LSW:d/s
* @retval unchanged d in case of overflow
*/
int68_t ;
/** 68K DIVU instruction.
*
* The divu68() function performs unsigned division and updates SR
* flags accordingly. In case of divide by zero the corresponding
* exception is triggered. In case of overflow the result is the
* destination unchanged; additionnally V SR flag is set.
*
* @param emu68 68k emulator instance.
* @param s normalized word source operand
* @param d normalized long destination operand
* @return result
* @retval MSW:d%s LSW:d/s
* @retval unchanged d in case of overflow
*/
int68_t ;
/** 68K CLR instruction.
*
* The clr68() function clears and updates SR flags accordingly.
*
* @param emu68 68k emulator instance.
* @retval 0
*/
int68_t ;
/** @} */
/** @name Logical instruction functions
*
* The logical operation instructions (AND, OR, EOR, and NOT) perform
* logical operations with all sizes of integer data operands.
*
* @{
*/
/** 68K AND instruction.
*
* The and68() function performs bitwise AND and updates SR flags
* accordingly.
*
* @param emu68 68k emulator instance.
* @param s normalized source operand
* @param d normalized destination operand
* @return normalized result
* @retval d & s
*/
int68_t ;
/** 68K OR instruction.
*
* The orr68() function performs bitwise OR and updates SR flags
* accordingly.
*
* @param emu68 68k emulator instance.
* @param s normalized source operand
* @param d normalized destination operand
* @return normalized result
* @retval d | s
*/
int68_t ;
/** 68K EOR instruction.
*
* The eor68() function performs bitwise OR and updates SR flags
* accordingly.
*
* @param emu68 68k emulator instance.
* @param s normalized source operand
* @param d normalized destination operand
* @return normalized result
* @retval d ^ s
*/
int68_t ;
/** 68K NOT instruction.
*
* The not68() function performs bitwise NOT (aka 1st complement) and
* updates SR flags accordingly.
*
* @param emu68 68k emulator instance
* @param d normalized destination operand
* @return normalized result
* @retval ~d
*/
int68_t ;
/** @} */
/** @name Bit manipulation functions
*
* BTST, BSET, BCLR, and BCHG are bit manipulation instructions. All
* bit manipulation operations can be performed on either registers
* or memory. The bit number is specified either as immediate data or
* in the contents of a data register. Register operands are 32 bits
* long, and memory operands are 8 bits long. Table 3-6 summarizes
* bit manipulation operations; Z refers to the zero bit of the CCR.
*
* @{
*/
/** 68K BTST instruction (Bit TeST).
*
* The btst68() function performs a bit test and updates SR flags
* accordingly.
*
* @param emu68 68k emulator instance
* @param val value to test
* @param bit bit number
*/
void ;
/** 68K BSET instruction (Bit SET).
*
* The bset68() function performs a bit test and set and updates SR
* flags accordingly.
*
* @param emu68 68k emulator instance
* @param val value to test
* @param bit bit number
* @return result
* @retval val | (1<<bit)
*/
int68_t ;
/** 68K BCLR instruction (Bit CLeaR).
*
* The bclr68() function performs a bit test and clear and updates SR
* flags accordingly.
*
* @param emu68 68k emulator instance
* @param val value to test
* @param bit bit number
* @return result
* @retval val & ~(1<<bit)
*/
int68_t ;
/** 68K BCHG instruction (Bit CHanGe).
*
* The bchg68() function performs a bit test and change and updates SR
* flags accordingly.
*
* @param emu68 68k emulator instance
* @param val value to test
* @param bit bit number
* @return result
* @retval val ^ (1<<bit)
*/
int68_t ;
/** @} */
/** @name Program control instructions
*
* A set of subroutine call and return instructions and conditional
* and unconditional branch instructions perform program control
* operations. Also included are test operand instructions (TST and
* FTST), which set the integer or floating-point condition codes for
* use by other program and system control instructions. NOP forces
* synchronization of the internal pipelines. Table 3-9 summarizes
* these instructions.
*
* @{
*/
void ;
void ;
void ;
void ;
;
void ;
void ;
void ;
void ;
int68_t ;
;
;
/** @} */
/** @name Data move instructions
*
* The MOVE instructions with their associated addressing modes are
* the basic means of transferring and storing addresses and
* data. MOVE instructions transfer byte, word, and long-word
* operands from memory to memory, memory to register, register to
* memory, and register to register. MOVE instructions transfer word
* and long-word operands and ensure that only valid address
* manipulations are executed.
*
* Data move and associated instructions are MOVEM, MOVEP, MOVEQ,
* EXG, LEA, PEA, LINK, and UNLK.
*
* @{
*/
/** SWAP words
*
* The swap68() function swaps MSW and LSW and updates SR flags
* accordingly
*
* @param emu68 68k emulator instance
* @param dn data register to swap [0..7]
*/
void ;
/** 68K LEA instruction (load effective address).
*
* The lea68() function returns effective address.
*
* @param emu68 68k emulator instance
* @param mode addressing mode [0..7]
* @param reg address register [0..7]
* @return effective address
*/
addr68_t ;
/** 68K PEA instruction (push effective address).
*
* The pea68() function pushs effective address into the stack.
*
* @param emu68 68k emulator instance
* @param mode addressing mode [0..7]
* @param reg address register [0..7]
* @return effective address
*/
addr68_t ;
void ;
void ;
void ;
/* EMU68_EXTERN */
/* void movem68(emu68_t * const emu68, const int reg0, const int reg9); */
/* EMU68_EXTERN */
/* void movep68(emu68_t * const emu68, const int reg0, const int reg9); */
/** @} */
/** @name Shifting instructions
*
* The ASR, ASL, LSR, and LSL instructions provide shift operations
* in both directions. The ROR, ROL, ROXR, and ROXL instructions
* perform rotate (circular shift) operations, with and without the
* CCR extend bit (X-bit). All shift and rotate operations can be
* performed on either registers or memory. Register shift and
* rotate operations shift all operand sizes. The shift count can be
* specified in the instruction operation word (to shift from 1 – 8
* places) or in a register (modulo 64 shift count). Memory shift
* and rotate operations shift word operands one bit position
* only. The SWAP instruction exchanges the 16-bit halves of a
* register. Fast byte swapping is possible by using the ROR and ROL
* instructions with a shift count of eight, enhancing the
* performance of the shift/rotate instructions. Table 3-5 is a
* summary of the shift and rotate operations. In Table 3-5, C and X
* refer to the C-bit and X- bit in the CCR.
*
* @{
*/
/** 68K SWAP instruction.
*
* The swap68() function performs a MSW LSW swapping and updates SR
* flags accordingly.
*
* @param emu68 68k emulator instance
* @param d unnormalized destination operand
* @return result
*
*/
void ;
/** Logical Shift Left.
*
* The lsl68() function performs logical (unsigned) shift left and
* updates SR flags accordingly.
*
* @param emu68 68k emulator instance
* @param d normalized destination operand
* @param s source operand (shift count)
* @param l word length in bit minus one (7, 15 or 31)
* @return normalized result
* @retval d << s
*
*/
int68_t ;
/** Logical Shift Right.
*
* The lsr68() function performs logical (unsigned) shift right and
* updates SR flags accordingly
*
* @param emu68 68k emulator instance
* @param d normalized destination operand
* @param s source operand (shift count)
* @param l word length in bit minus one (7, 15 or 31)
* @return normalized result
* @retval d >> s
*/
int68_t ;
/** Arithmetic Shift Left.
*
* The asl68() function performs arithmetic (signed) shift left and
* updates SR flags accordingly
*
* @param emu68 68k emulator instance
* @param d normalized destination operand
* @param s source operand (shift count)
* @param l word length in bit minus one (7, 15 or 31)
* @return normalized result
* @retval d << s
*
*/
int68_t ;
/** Arithmetic Shift Right.
*
* The asr68() function performs arithmetic (signed) shift right and
* updates SR flags accordingly
*
* @param emu68 68k emulator instance
* @param d normalized destination operand
* @param s source operand (shift count)
* @param l word length in bit minus one (7, 15 or 31)
* @return normalized result
* @retval d >> s
*/
int68_t ;
/** ROtation Left.
*
* The rol68() function performs bit rotation to the left and updates
* SR flags accordingly
*
* @param emu68 68k emulator instance
* @param d normalized destination operand
* @param s source operand (shift count)
* @param l word length in bit minus one (7, 15 or 31)
* @return normalized result
*/
int68_t ;
/** ROtation Right.
*
* The ror68() function performs bit rotation to the right and
* updates SR flags accordingly
*
* @param emu68 68k emulator instance
* @param d normalized destination operand
* @param s source operand (shift count)
* @param l word length in bit minus one (7, 15 or 31)
* @return normalized result
*/
int68_t ;
/** ROtation eXtended Left.
*
* The roxl68() function performs extended bit rotation to the left
* and updates SR flags accordingly
*
* @param emu68 68k emulator instance
* @param d normalized destination operand
* @param s source operand (shift count)
* @param l word length in bit minus one (7, 15 or 31)
* @return normalized result
*/
int68_t ;
/** ROtation eXtended Right.
*
* The roxr68() function performs extended bit rotation to the right
* and updates SR flags accordingly
*
* @param emu68 68k emulator instance
* @param d normalized destination operand
* @param s source operand (shift count)
* @param l word length in bit minus one (7, 15 or 31)
* @return normalized result
*/
int68_t ;
/** @} */
/** @name Binary Coded Decimal (BCD) instructions
*
* Three instructions support operations on binary-coded decimal
* (BCD) numbers. The arithmetic operations on packed BCD numbers are
* ABCD, SBCD, and NBCD.
*
* @{
*/
/** Negate Binary Coded Decimal with extend.
*
* The nbcd68() function performs BCD negating with extend and
* updates SR flags accordingly
*
* @param emu68 68k emulator instance.
* @param d destination operand
* @return result
* @retval 0 - d,10 - X
*/
int68_t ;
/** Addition Binary Coded Decimal with extend.
*
* The abcd68() function performs BCD addition with extend and
* updates SR flags accordingly
*
* @param emu68 68k emulator instance.
* @param d destination operand
* @return result
* @retval s,10 + d,10 + X
*/
int68_t ;
/** Substract Binary Coded Decimal with extend.
*
* The sbcd68() function performs BCD substraction with extend and
* updates SR flags accordingly
*
* @param emu68 68k emulator instance.
* @param d destination operand
* @return result
* @retval d,10 - s,10 - X
*/
int68_t ;
/** @} */
/** @name Exception functions
* @{
*/
void ;
void ;
void ;
void ;
/** @} */
/** @name System Control Instructions
*
* Privileged and trapping instructions as well as instructions that
* use or modify the CCR provide system control operations. FSAVE and
* FRESTORE save and restore the nonuser visible portion of the FPU
* during context switches in a virtual memory or multitasking
* system. The conditional trap instructions, which use the same
* conditional tests as their corresponding program control
* instructions, allow an optional 16- or 32-bit immediate operand to
* be included as part of the instruction for passing parameters to
* the operating system. These instructions cause the processor to
* flush the instruction pipe. Table 3-10 summarizes these
* instructions. See 3.2 Integer Unit Condition Code Computation for
* more details on condition codes.
*
* @{
*/
void ;
void ;
void ;
void ;
void ;
void ;
void ;
void ;
void ;
void ;
void ;
/** @} */
/**
* @}
*/
/* #ifndef _EMU68_INST68_H_ */