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</pre><pre class="rust"><code><span class="comment">/* origin: FreeBSD /usr/src/lib/msun/src/s_fmaf.c */
/*-
* Copyright (c) 2005-2011 David Schultz <das@FreeBSD.ORG>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
</span><span class="kw">use </span>core::f32;
<span class="kw">use </span>core::ptr::read_volatile;
<span class="kw">use </span><span class="kw">super</span>::fenv::{
feclearexcept, fegetround, feraiseexcept, fetestexcept, FE_INEXACT, FE_TONEAREST, FE_UNDERFLOW,
};
<span class="comment">/*
* Fused multiply-add: Compute x * y + z with a single rounding error.
*
* A double has more than twice as much precision than a float, so
* direct double-precision arithmetic suffices, except where double
* rounding occurs.
*/
</span><span class="doccomment">/// Floating multiply add (f32)
///
/// Computes `(x*y)+z`, rounded as one ternary operation:
/// Computes the value (as if) to infinite precision and rounds once to the result format,
/// according to the rounding mode characterized by the value of FLT_ROUNDS.
</span><span class="attr">#[cfg_attr(all(test, assert_no_panic), no_panic::no_panic)]
</span><span class="kw">pub fn </span>fmaf(x: f32, y: f32, <span class="kw-2">mut </span>z: f32) -> f32 {
<span class="kw">let </span>xy: f64;
<span class="kw">let </span><span class="kw-2">mut </span>result: f64;
<span class="kw">let </span><span class="kw-2">mut </span>ui: u64;
<span class="kw">let </span>e: i32;
xy = x <span class="kw">as </span>f64 * y <span class="kw">as </span>f64;
result = xy + z <span class="kw">as </span>f64;
ui = result.to_bits();
e = (ui >> <span class="number">52</span>) <span class="kw">as </span>i32 & <span class="number">0x7ff</span>;
<span class="comment">/* Common case: The double precision result is fine. */
</span><span class="kw">if </span>(
<span class="comment">/* not a halfway case */
</span>ui & <span class="number">0x1fffffff</span>) != <span class="number">0x10000000 </span>||
<span class="comment">/* NaN */
</span>e == <span class="number">0x7ff </span>||
<span class="comment">/* exact */
</span>(result - xy == z <span class="kw">as </span>f64 && result - z <span class="kw">as </span>f64 == xy) ||
<span class="comment">/* not round-to-nearest */
</span>fegetround() != FE_TONEAREST
{
<span class="comment">/*
underflow may not be raised correctly, example:
fmaf(0x1p-120f, 0x1p-120f, 0x1p-149f)
*/
</span><span class="kw">if </span>e < <span class="number">0x3ff </span>- <span class="number">126 </span>&& e >= <span class="number">0x3ff </span>- <span class="number">149 </span>&& fetestexcept(FE_INEXACT) != <span class="number">0 </span>{
feclearexcept(FE_INEXACT);
<span class="comment">// prevent `xy + vz` from being CSE'd with `xy + z` above
</span><span class="kw">let </span>vz: f32 = <span class="kw">unsafe </span>{ read_volatile(<span class="kw-2">&</span>z) };
result = xy + vz <span class="kw">as </span>f64;
<span class="kw">if </span>fetestexcept(FE_INEXACT) != <span class="number">0 </span>{
feraiseexcept(FE_UNDERFLOW);
} <span class="kw">else </span>{
feraiseexcept(FE_INEXACT);
}
}
z = result <span class="kw">as </span>f32;
<span class="kw">return </span>z;
}
<span class="comment">/*
* If result is inexact, and exactly halfway between two float values,
* we need to adjust the low-order bit in the direction of the error.
*/
</span><span class="kw">let </span>neg = ui >> <span class="number">63 </span>!= <span class="number">0</span>;
<span class="kw">let </span>err = <span class="kw">if </span>neg == (z <span class="kw">as </span>f64 > xy) {
xy - result + z <span class="kw">as </span>f64
} <span class="kw">else </span>{
z <span class="kw">as </span>f64 - result + xy
};
<span class="kw">if </span>neg == (err < <span class="number">0.0</span>) {
ui += <span class="number">1</span>;
} <span class="kw">else </span>{
ui -= <span class="number">1</span>;
}
f64::from_bits(ui) <span class="kw">as </span>f32
}
<span class="attr">#[cfg(test)]
</span><span class="kw">mod </span>tests {
<span class="attr">#[test]
</span><span class="kw">fn </span>issue_263() {
<span class="kw">let </span>a = f32::from_bits(<span class="number">1266679807</span>);
<span class="kw">let </span>b = f32::from_bits(<span class="number">1300234242</span>);
<span class="kw">let </span>c = f32::from_bits(<span class="number">1115553792</span>);
<span class="kw">let </span>expected = f32::from_bits(<span class="number">1501560833</span>);
<span class="macro">assert_eq!</span>(<span class="kw">super</span>::fmaf(a, b, c), expected);
}
}
</code></pre></div>
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