#[doc = r"Value read from the register"]
pub struct R {
bits: u8,
}
#[doc = r"Value to write to the register"]
pub struct W {
bits: u8,
}
impl super::RXCSRL5 {
#[doc = r"Modifies the contents of the register"]
#[inline(always)]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
self.register.set(f(&R { bits }, &mut W { bits }).bits);
}
#[doc = r"Reads the contents of the register"]
#[inline(always)]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r"Writes to the register"]
#[inline(always)]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
self.register.set(
f(&mut W {
bits: Self::reset_value(),
})
.bits,
);
}
#[doc = r"Reset value of the register"]
#[inline(always)]
pub const fn reset_value() -> u8 {
0
}
#[doc = r"Writes the reset value to the register"]
#[inline(always)]
pub fn reset(&self) {
self.register.set(Self::reset_value())
}
}
#[doc = r"Value of the field"]
pub struct USB_RXCSRL5_RXRDYR {
bits: bool,
}
impl USB_RXCSRL5_RXRDYR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r"Proxy"]
pub struct _USB_RXCSRL5_RXRDYW<'a> {
w: &'a mut W,
}
impl<'a> _USB_RXCSRL5_RXRDYW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(1 << 0);
self.w.bits |= ((value as u8) & 1) << 0;
self.w
}
}
#[doc = r"Value of the field"]
pub struct USB_RXCSRL5_FULLR {
bits: bool,
}
impl USB_RXCSRL5_FULLR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r"Proxy"]
pub struct _USB_RXCSRL5_FULLW<'a> {
w: &'a mut W,
}
impl<'a> _USB_RXCSRL5_FULLW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(1 << 1);
self.w.bits |= ((value as u8) & 1) << 1;
self.w
}
}
#[doc = r"Value of the field"]
pub struct USB_RXCSRL5_OVERR {
bits: bool,
}
impl USB_RXCSRL5_OVERR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r"Proxy"]
pub struct _USB_RXCSRL5_OVERW<'a> {
w: &'a mut W,
}
impl<'a> _USB_RXCSRL5_OVERW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(1 << 2);
self.w.bits |= ((value as u8) & 1) << 2;
self.w
}
}
#[doc = r"Value of the field"]
pub struct USB_RXCSRL5_DATAERRR {
bits: bool,
}
impl USB_RXCSRL5_DATAERRR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r"Proxy"]
pub struct _USB_RXCSRL5_DATAERRW<'a> {
w: &'a mut W,
}
impl<'a> _USB_RXCSRL5_DATAERRW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(1 << 3);
self.w.bits |= ((value as u8) & 1) << 3;
self.w
}
}
#[doc = r"Value of the field"]
pub struct USB_RXCSRL5_FLUSHR {
bits: bool,
}
impl USB_RXCSRL5_FLUSHR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r"Proxy"]
pub struct _USB_RXCSRL5_FLUSHW<'a> {
w: &'a mut W,
}
impl<'a> _USB_RXCSRL5_FLUSHW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(1 << 4);
self.w.bits |= ((value as u8) & 1) << 4;
self.w
}
}
#[doc = r"Value of the field"]
pub struct USB_RXCSRL5_STALLR {
bits: bool,
}
impl USB_RXCSRL5_STALLR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r"Proxy"]
pub struct _USB_RXCSRL5_STALLW<'a> {
w: &'a mut W,
}
impl<'a> _USB_RXCSRL5_STALLW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(1 << 5);
self.w.bits |= ((value as u8) & 1) << 5;
self.w
}
}
#[doc = r"Value of the field"]
pub struct USB_RXCSRL5_STALLEDR {
bits: bool,
}
impl USB_RXCSRL5_STALLEDR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r"Proxy"]
pub struct _USB_RXCSRL5_STALLEDW<'a> {
w: &'a mut W,
}
impl<'a> _USB_RXCSRL5_STALLEDW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(1 << 6);
self.w.bits |= ((value as u8) & 1) << 6;
self.w
}
}
#[doc = r"Value of the field"]
pub struct USB_RXCSRL5_CLRDTR {
bits: bool,
}
impl USB_RXCSRL5_CLRDTR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r"Proxy"]
pub struct _USB_RXCSRL5_CLRDTW<'a> {
w: &'a mut W,
}
impl<'a> _USB_RXCSRL5_CLRDTW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(1 << 7);
self.w.bits |= ((value as u8) & 1) << 7;
self.w
}
}
#[doc = r"Value of the field"]
pub struct USB_RXCSRL5_ERRORR {
bits: bool,
}
impl USB_RXCSRL5_ERRORR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r"Proxy"]
pub struct _USB_RXCSRL5_ERRORW<'a> {
w: &'a mut W,
}
impl<'a> _USB_RXCSRL5_ERRORW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(1 << 2);
self.w.bits |= ((value as u8) & 1) << 2;
self.w
}
}
#[doc = r"Value of the field"]
pub struct USB_RXCSRL5_NAKTOR {
bits: bool,
}
impl USB_RXCSRL5_NAKTOR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r"Proxy"]
pub struct _USB_RXCSRL5_NAKTOW<'a> {
w: &'a mut W,
}
impl<'a> _USB_RXCSRL5_NAKTOW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(1 << 3);
self.w.bits |= ((value as u8) & 1) << 3;
self.w
}
}
#[doc = r"Value of the field"]
pub struct USB_RXCSRL5_REQPKTR {
bits: bool,
}
impl USB_RXCSRL5_REQPKTR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r"Proxy"]
pub struct _USB_RXCSRL5_REQPKTW<'a> {
w: &'a mut W,
}
impl<'a> _USB_RXCSRL5_REQPKTW<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(1 << 5);
self.w.bits |= ((value as u8) & 1) << 5;
self.w
}
}
impl R {
#[doc = r"Value of the register as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
self.bits
}
#[doc = "Bit 0 - Receive Packet Ready"]
#[inline(always)]
pub fn usb_rxcsrl5_rxrdy(&self) -> USB_RXCSRL5_RXRDYR {
let bits = ((self.bits >> 0) & 1) != 0;
USB_RXCSRL5_RXRDYR { bits }
}
#[doc = "Bit 1 - FIFO Full"]
#[inline(always)]
pub fn usb_rxcsrl5_full(&self) -> USB_RXCSRL5_FULLR {
let bits = ((self.bits >> 1) & 1) != 0;
USB_RXCSRL5_FULLR { bits }
}
#[doc = "Bit 2 - Overrun"]
#[inline(always)]
pub fn usb_rxcsrl5_over(&self) -> USB_RXCSRL5_OVERR {
let bits = ((self.bits >> 2) & 1) != 0;
USB_RXCSRL5_OVERR { bits }
}
#[doc = "Bit 3 - Data Error"]
#[inline(always)]
pub fn usb_rxcsrl5_dataerr(&self) -> USB_RXCSRL5_DATAERRR {
let bits = ((self.bits >> 3) & 1) != 0;
USB_RXCSRL5_DATAERRR { bits }
}
#[doc = "Bit 4 - Flush FIFO"]
#[inline(always)]
pub fn usb_rxcsrl5_flush(&self) -> USB_RXCSRL5_FLUSHR {
let bits = ((self.bits >> 4) & 1) != 0;
USB_RXCSRL5_FLUSHR { bits }
}
#[doc = "Bit 5 - Send STALL"]
#[inline(always)]
pub fn usb_rxcsrl5_stall(&self) -> USB_RXCSRL5_STALLR {
let bits = ((self.bits >> 5) & 1) != 0;
USB_RXCSRL5_STALLR { bits }
}
#[doc = "Bit 6 - Endpoint Stalled"]
#[inline(always)]
pub fn usb_rxcsrl5_stalled(&self) -> USB_RXCSRL5_STALLEDR {
let bits = ((self.bits >> 6) & 1) != 0;
USB_RXCSRL5_STALLEDR { bits }
}
#[doc = "Bit 7 - Clear Data Toggle"]
#[inline(always)]
pub fn usb_rxcsrl5_clrdt(&self) -> USB_RXCSRL5_CLRDTR {
let bits = ((self.bits >> 7) & 1) != 0;
USB_RXCSRL5_CLRDTR { bits }
}
#[doc = "Bit 2 - Error"]
#[inline(always)]
pub fn usb_rxcsrl5_error(&self) -> USB_RXCSRL5_ERRORR {
let bits = ((self.bits >> 2) & 1) != 0;
USB_RXCSRL5_ERRORR { bits }
}
#[doc = "Bit 3 - NAK Timeout"]
#[inline(always)]
pub fn usb_rxcsrl5_nakto(&self) -> USB_RXCSRL5_NAKTOR {
let bits = ((self.bits >> 3) & 1) != 0;
USB_RXCSRL5_NAKTOR { bits }
}
#[doc = "Bit 5 - Request Packet"]
#[inline(always)]
pub fn usb_rxcsrl5_reqpkt(&self) -> USB_RXCSRL5_REQPKTR {
let bits = ((self.bits >> 5) & 1) != 0;
USB_RXCSRL5_REQPKTR { bits }
}
}
impl W {
#[doc = r"Writes raw bits to the register"]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - Receive Packet Ready"]
#[inline(always)]
pub fn usb_rxcsrl5_rxrdy(&mut self) -> _USB_RXCSRL5_RXRDYW {
_USB_RXCSRL5_RXRDYW { w: self }
}
#[doc = "Bit 1 - FIFO Full"]
#[inline(always)]
pub fn usb_rxcsrl5_full(&mut self) -> _USB_RXCSRL5_FULLW {
_USB_RXCSRL5_FULLW { w: self }
}
#[doc = "Bit 2 - Overrun"]
#[inline(always)]
pub fn usb_rxcsrl5_over(&mut self) -> _USB_RXCSRL5_OVERW {
_USB_RXCSRL5_OVERW { w: self }
}
#[doc = "Bit 3 - Data Error"]
#[inline(always)]
pub fn usb_rxcsrl5_dataerr(&mut self) -> _USB_RXCSRL5_DATAERRW {
_USB_RXCSRL5_DATAERRW { w: self }
}
#[doc = "Bit 4 - Flush FIFO"]
#[inline(always)]
pub fn usb_rxcsrl5_flush(&mut self) -> _USB_RXCSRL5_FLUSHW {
_USB_RXCSRL5_FLUSHW { w: self }
}
#[doc = "Bit 5 - Send STALL"]
#[inline(always)]
pub fn usb_rxcsrl5_stall(&mut self) -> _USB_RXCSRL5_STALLW {
_USB_RXCSRL5_STALLW { w: self }
}
#[doc = "Bit 6 - Endpoint Stalled"]
#[inline(always)]
pub fn usb_rxcsrl5_stalled(&mut self) -> _USB_RXCSRL5_STALLEDW {
_USB_RXCSRL5_STALLEDW { w: self }
}
#[doc = "Bit 7 - Clear Data Toggle"]
#[inline(always)]
pub fn usb_rxcsrl5_clrdt(&mut self) -> _USB_RXCSRL5_CLRDTW {
_USB_RXCSRL5_CLRDTW { w: self }
}
#[doc = "Bit 2 - Error"]
#[inline(always)]
pub fn usb_rxcsrl5_error(&mut self) -> _USB_RXCSRL5_ERRORW {
_USB_RXCSRL5_ERRORW { w: self }
}
#[doc = "Bit 3 - NAK Timeout"]
#[inline(always)]
pub fn usb_rxcsrl5_nakto(&mut self) -> _USB_RXCSRL5_NAKTOW {
_USB_RXCSRL5_NAKTOW { w: self }
}
#[doc = "Bit 5 - Request Packet"]
#[inline(always)]
pub fn usb_rxcsrl5_reqpkt(&mut self) -> _USB_RXCSRL5_REQPKTW {
_USB_RXCSRL5_REQPKTW { w: self }
}
}