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/// Address for the ADC control
pub const ADDR_ADC_CTRL : u32 = 0xF40200;
/// Address for the AAF configuration
pub const ADDR_AAF_CFG : u32 = 0xF40430;
/// Address for the PA control
pub const ADDR_PA_CTRL : u32 = 0xF40300;
/// Address for the PA LOCK
pub const ADDR_PA_LOCK : u32 = 0xF40338;
/// Address for the OCP Threshold retention
pub const ADDR_OCP_RETENTION : u32 = 0x80093C;
/// Address for the dcdc configuration
pub const ADDR_SIMO_CFG : u32 = 0xF20024;
/// Address for the dcdc frequency
pub const ADDR_SIMO_FREQ : u32 = 0x80004C;
/// Address for RF frequency
pub const ADDR_FREQ_RF : u32 = 0xF40144;
/// Address for OOK Detection settings
pub const ADDR_OOK_DETECT : u32 = 0xF30E14;
/// Address for CPFSK detect tuning
pub const ADDR_CPFSK_DETECT : u32 = 0xF30C14;
/// Address for CPFSK demodulation tuning
pub const ADDR_CPFSK_DEMOD : u32 = 0xF30C28;
/// Address for LoRa Parameters
pub const ADDR_LORA_PARAM : u32 = 0xF30A14;
/// Address for LoRa TX Configuration
pub const ADDR_LORA_TX_CFG1 : u32 = 0xF30A24;
/// Address for LoRa RX Configuration
pub const ADDR_LORA_RX_CFG : u32 = 0xF30A2C;
/// Address for LoRa Ranging extra configruation
pub const ADDR_LORA_RANGING_EXTRA : u32 = 0xF30B50;
/// Address for LoRa Timing Sync configuration
pub const ADDR_LORA_TIMING_SYNC : u32 = 0xF30B64;