Struct lpc845_pac::adc0::ctrl::W

pub struct W(_);

Register CTRL writer

Implementations

impl W

pub fn clkdiv(&mut self) -> CLKDIV_W<'_>

Bits 0:7 - In synchronous mode only, the system clock is divided by this value plus one to produce the clock for the ADC converter, which should be less than or equal to 72 MHz. Typically, software should program the smallest value in this field that yields this maximum clock rate or slightly less, but in certain cases (such as a high-impedance analog source) a slower clock may be desirable. This field is ignored in the asynchronous operating mode.

pub fn asynmode(&mut self) -> ASYNMODE_W<'_>

Bit 8 - Select clock mode.

pub fn lpwrmode(&mut self) -> LPWRMODE_W<'_>

Bit 10 - The low-power ADC mode

pub fn calmode(&mut self) -> CALMODE_W<'_>

Bit 30 - Writing a ‘1’ to this bit will initiate a sef-calibration cycle. This bit will be automatically cleared by hardware after the calibration cycle is complete. Note: Other bits of this register may be written to concurrently with setting this bit, however once this bit has been set no further writes to this register are permitted unitl the full calibration cycle has ended.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<CTRL_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<CTRL_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<CTRL_SPEC>> for W

fn from(writer: W<CTRL_SPEC>) -> Self

Performs the conversion.