[−][src]Type Definition lpc54606_pac::syscon::SPIFICLKDIV
type SPIFICLKDIV = Reg<u32, _SPIFICLKDIV>;
SPIFI clock divider
This register you can read
, reset
, write
, write_with_zero
, modify
. See API.
For information about available fields see spificlkdiv module
Trait Implementations
impl Readable for SPIFICLKDIV
[src]
read()
method returns spificlkdiv::R reader structure
impl ResetValue for SPIFICLKDIV
[src]
Register SPIFICLKDIV reset()
's with value 0x4000_0000
impl Writable for SPIFICLKDIV
[src]
write(|w| ..)
method takes spificlkdiv::W writer structure