Lockstitch
Lockstitch is an incremental, stateful cryptographic primitive for symmetric-key cryptographic operations (e.g. hashing, encryption, message authentication codes, and authenticated encryption) in complex protocols. Inspired by TupleHash, STROBE, Noise Protocol's stateful objects, and Xoodyak's Cyclist mode, Lockstitch uses the AEGIS-128L authenticated cipher and SHA-256 to provide 100+ Gb/sec performance on modern processors at a 128-bit security level.
⚠️ WARNING: You should not use this. ⚠️
Neither the design nor the implementation of this library have been independently evaluated. It uses
very recent cryptographic algorithms in slightly heterodox ways and may well be just an absolutely
terrible idea. The design is documented in design.md; read it and see if the
arguments therein are convincing.
In addition, there is absolutely no guarantee of backwards compatibility.
Design
A Lockstitch protocol is a stateful object which has four different operations:
Mix: Mixes a piece of data into the protocol's state, making all future outputs dependent on it.Derive: Outputs bytes of pseudo-random data dependent on the protocol's prior state.Encrypt/Decrypt: Encrypts and decrypts data using the protocol's state as the key.Ratchet: Irreversibly modifies the protocol's state, preventing rollback.
Using these operations, one can construct a wide variety of symmetric-key constructions.
Use
Lockstitch is used to compose cryptographic protocols.
For example, we can create message digests:
assert_eq!;
assert_ne!;
We can create message authentication codes:
assert_eq!;
assert_ne!;
assert_ne!;
We can even create authenticated encryption:
let plaintext = b"a message".to_vec;
let ciphertext = aead_encrypt;
assert_eq!;
assert_eq!;
assert_eq!;
assert_eq!;
let mut bad_ciphertext = ciphertext.to_vec;
bad_ciphertext ^= 1; // flip one bit
assert_eq!;
Cargo Features
asm: Enables hand-coded assembly for SHA-256 forx86andx86_64and a vectorized implementation foraarch64. Enabled by default.docs: Enables the docs-onlyperfanddesignmodules.hedge: Enables hedged random value generation withrand_core. Enabled by default.std: Enables features based on the Rust standard library. Enabled by default.
Performance
Lockstitch's SHA-256 and AEGIS-128L implementations benefit significantly from the use of specific CPU instructions.
x86/x86_64
On x86/x86_64 CPUs, Lockstitch achieves its best performance with the aes and ssse3 target
features enabled.
To compile a binary with support for these features, create a .cargo/config.toml file with the
following:
[]
= ["-C", "target-feature=+aes,+ssse3"]
Or use the following RUSTFLAGS environment variable:
aarch64
On aarch64-darwin-apple (i.e. macOS), the ARMv8-A cryptography instructions and NEON vector
instructions are enabled by default. On other targets (e.g. aarch64-unknown-linux-gnu), the sha3
and aes target features should be enabled.
Other
For other platforms, the portable crate feature provides a very slow but fully portable AES
implementation.
Additional Information
For more information on the design of Lockstitch, see design.md.
For more information on performance, see perf.md.
License
Copyright © 2023 Coda Hale, Frank Denis
AEGIS-128L implementation adapted from rust-aegis.
Distributed under the MIT License.