use std::collections::HashMap;
#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Hash)]
pub enum X86IsaExtension {
Mmx,
Sse,
Sse2,
Sse3,
Ssse3,
Sse41,
Sse42,
Avx,
Avx2,
Fma,
Avx512f,
Avx512cd,
Avx512er,
Avx512pf,
Avx512bw,
Avx512dq,
Avx512vl,
Avx512vbmi,
Avx512vbmi2,
Avx512vnni,
Avx512bitalg,
Avx512vpopcntdq,
Avx512bf16,
Avx512fp16,
Bmi,
Bmi2,
Aes,
Sha,
Rdrand,
Rdseed,
Adx,
Gfni,
Vpclmulqdq,
Amx,
}
impl X86IsaExtension {
pub fn display_name(&self) -> &'static str {
match self {
X86IsaExtension::Mmx => "MMX",
X86IsaExtension::Sse => "SSE",
X86IsaExtension::Sse2 => "SSE2",
X86IsaExtension::Sse3 => "SSE3",
X86IsaExtension::Ssse3 => "SSSE3",
X86IsaExtension::Sse41 => "SSE4.1",
X86IsaExtension::Sse42 => "SSE4.2",
X86IsaExtension::Avx => "AVX",
X86IsaExtension::Avx2 => "AVX2",
X86IsaExtension::Fma => "FMA",
X86IsaExtension::Avx512f => "AVX-512F",
X86IsaExtension::Avx512cd => "AVX-512CD",
X86IsaExtension::Avx512er => "AVX-512ER",
X86IsaExtension::Avx512pf => "AVX-512PF",
X86IsaExtension::Avx512bw => "AVX-512BW",
X86IsaExtension::Avx512dq => "AVX-512DQ",
X86IsaExtension::Avx512vl => "AVX-512VL",
X86IsaExtension::Avx512vbmi => "AVX-512VBMI",
X86IsaExtension::Avx512vbmi2 => "AVX-512VBMI2",
X86IsaExtension::Avx512vnni => "AVX-512VNNI",
X86IsaExtension::Avx512bitalg => "AVX-512BITALG",
X86IsaExtension::Avx512vpopcntdq => "AVX-512VPOPCNTDQ",
X86IsaExtension::Avx512bf16 => "AVX-512BF16",
X86IsaExtension::Avx512fp16 => "AVX-512FP16",
X86IsaExtension::Bmi => "BMI",
X86IsaExtension::Bmi2 => "BMI2",
X86IsaExtension::Aes => "AES",
X86IsaExtension::Sha => "SHA",
X86IsaExtension::Rdrand => "RDRAND",
X86IsaExtension::Rdseed => "RDSEED",
X86IsaExtension::Adx => "ADX",
X86IsaExtension::Gfni => "GFNI",
X86IsaExtension::Vpclmulqdq => "VPCLMULQDQ",
X86IsaExtension::Amx => "AMX",
}
}
pub fn introduced_in(&self) -> &'static str {
match self {
X86IsaExtension::Mmx => "Pentium MMX (1997)",
X86IsaExtension::Sse => "Pentium III (1999)",
X86IsaExtension::Sse2 => "Pentium 4 (2001)",
X86IsaExtension::Sse3 => "Prescott (2004)",
X86IsaExtension::Ssse3 => "Core 2 (2006)",
X86IsaExtension::Sse41 => "Penryn (2008)",
X86IsaExtension::Sse42 => "Nehalem (2008)",
X86IsaExtension::Avx => "Sandy Bridge (2011)",
X86IsaExtension::Avx2 => "Haswell (2013)",
X86IsaExtension::Fma => "Haswell (2013)",
X86IsaExtension::Avx512f => "Skylake-SP (2017)",
X86IsaExtension::Avx512cd => "Skylake-SP (2017)",
X86IsaExtension::Avx512er => "Xeon Phi x200 (2016)",
X86IsaExtension::Avx512pf => "Xeon Phi x200 (2016)",
X86IsaExtension::Avx512bw => "Skylake-SP (2017)",
X86IsaExtension::Avx512dq => "Skylake-SP (2017)",
X86IsaExtension::Avx512vl => "Skylake-SP (2017)",
X86IsaExtension::Avx512vbmi => "Cannon Lake (2018)",
X86IsaExtension::Avx512vbmi2 => "Ice Lake (2019)",
X86IsaExtension::Avx512vnni => "Cascade Lake (2019)",
X86IsaExtension::Avx512bitalg => "Ice Lake (2019)",
X86IsaExtension::Avx512vpopcntdq => "Ice Lake (2019)",
X86IsaExtension::Avx512bf16 => "Cooper Lake (2020)",
X86IsaExtension::Avx512fp16 => "Sapphire Rapids (2022)",
X86IsaExtension::Bmi => "Haswell (2013)",
X86IsaExtension::Bmi2 => "Haswell (2013)",
X86IsaExtension::Aes => "Westmere (2010)",
X86IsaExtension::Sha => "Goldmont (2016)",
X86IsaExtension::Rdrand => "Ivy Bridge (2012)",
X86IsaExtension::Rdseed => "Broadwell (2014)",
X86IsaExtension::Adx => "Broadwell (2014)",
X86IsaExtension::Gfni => "Ice Lake (2019)",
X86IsaExtension::Vpclmulqdq => "Westmere (2010)",
X86IsaExtension::Amx => "Sapphire Rapids (2022)",
}
}
pub fn cpuid_feature(&self) -> &'static str {
match self {
X86IsaExtension::Mmx => "CPUID.01H:EDX.MMX[bit 23]",
X86IsaExtension::Sse => "CPUID.01H:EDX.SSE[bit 25]",
X86IsaExtension::Sse2 => "CPUID.01H:EDX.SSE2[bit 26]",
X86IsaExtension::Sse3 => "CPUID.01H:ECX.SSE3[bit 0]",
X86IsaExtension::Ssse3 => "CPUID.01H:ECX.SSSE3[bit 9]",
X86IsaExtension::Sse41 => "CPUID.01H:ECX.SSE4_1[bit 19]",
X86IsaExtension::Sse42 => "CPUID.01H:ECX.SSE4_2[bit 20]",
X86IsaExtension::Avx => "CPUID.01H:ECX.AVX[bit 28]",
X86IsaExtension::Avx2 => "CPUID.07H.0:EBX.AVX2[bit 5]",
X86IsaExtension::Fma => "CPUID.01H:ECX.FMA[bit 12]",
X86IsaExtension::Avx512f => "CPUID.07H.0:EBX.AVX512F[bit 16]",
X86IsaExtension::Avx512cd => "CPUID.07H.0:EBX.AVX512CD[bit 28]",
X86IsaExtension::Avx512er => "CPUID.07H.0:EBX.AVX512ER[bit 27]",
X86IsaExtension::Avx512pf => "CPUID.07H.0:EBX.AVX512PF[bit 26]",
X86IsaExtension::Avx512bw => "CPUID.07H.0:EBX.AVX512BW[bit 30]",
X86IsaExtension::Avx512dq => "CPUID.07H.0:EBX.AVX512DQ[bit 17]",
X86IsaExtension::Avx512vl => "CPUID.07H.0:EBX.AVX512VL[bit 31]",
X86IsaExtension::Avx512vbmi => "CPUID.07H.0:ECX.AVX512VBMI[bit 1]",
X86IsaExtension::Avx512vbmi2 => "CPUID.07H.0:ECX.AVX512VBMI2[bit 6]",
X86IsaExtension::Avx512vnni => "CPUID.07H.0:ECX.AVX512VNNI[bit 11]",
X86IsaExtension::Avx512bitalg => "CPUID.07H.0:ECX.AVX512BITALG[bit 12]",
X86IsaExtension::Avx512vpopcntdq => "CPUID.07H.0:ECX.AVX512VPOPCNTDQ[bit 14]",
X86IsaExtension::Avx512bf16 => "CPUID.07H.1:EAX.AVX512BF16[bit 5]",
X86IsaExtension::Avx512fp16 => "CPUID.07H.0:EDX.AVX512FP16[bit 23]",
X86IsaExtension::Bmi => "CPUID.07H.0:EBX.BMI[bit 3]",
X86IsaExtension::Bmi2 => "CPUID.07H.0:EBX.BMI2[bit 8]",
X86IsaExtension::Aes => "CPUID.01H:ECX.AES[bit 25]",
X86IsaExtension::Sha => "CPUID.07H.0:EBX.SHA[bit 29]",
X86IsaExtension::Rdrand => "CPUID.01H:ECX.RDRAND[bit 30]",
X86IsaExtension::Rdseed => "CPUID.07H.0:EBX.RDSEED[bit 18]",
X86IsaExtension::Adx => "CPUID.07H.0:EBX.ADX[bit 19]",
X86IsaExtension::Gfni => "CPUID.07H.0:ECX.GFNI[bit 8]",
X86IsaExtension::Vpclmulqdq => "CPUID.01H:ECX.PCLMULQDQ[bit 1]",
X86IsaExtension::Amx => "CPUID.07H.0:EDX.AMX_TILE[bit 24]",
}
}
}
impl std::fmt::Display for X86IsaExtension {
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
write!(f, "{}", self.display_name())
}
}
#[derive(Debug, Clone, PartialEq, Eq)]
pub struct X86IntrinsicEntry {
pub name: &'static str,
pub prototype: &'static str,
pub isa: X86IsaExtension,
pub instruction: &'static str,
pub description: &'static str,
}
impl X86IntrinsicEntry {
pub const fn new(
name: &'static str,
prototype: &'static str,
isa: X86IsaExtension,
instruction: &'static str,
description: &'static str,
) -> Self {
X86IntrinsicEntry { name, prototype, isa, instruction, description }
}
}
#[derive(Debug, Clone)]
pub struct X86IntrinsicsCatalog {
entries: Vec<X86IntrinsicEntry>,
}
impl X86IntrinsicsCatalog {
pub fn new() -> Self {
let mut entries = Vec::with_capacity(1200);
entries.extend(Self::mmx_intrinsics());
entries.extend(Self::sse_intrinsics());
entries.extend(Self::sse2_intrinsics());
entries.extend(Self::sse3_intrinsics());
entries.extend(Self::ssse3_intrinsics());
entries.extend(Self::sse41_intrinsics());
entries.extend(Self::sse42_intrinsics());
entries.extend(Self::avx_intrinsics());
entries.extend(Self::avx2_intrinsics());
entries.extend(Self::fma_intrinsics());
entries.extend(Self::avx512f_intrinsics());
entries.extend(Self::avx512cd_intrinsics());
entries.extend(Self::avx512er_intrinsics());
entries.extend(Self::avx512pf_intrinsics());
entries.extend(Self::avx512bw_intrinsics());
entries.extend(Self::avx512dq_intrinsics());
entries.extend(Self::avx512vl_intrinsics());
entries.extend(Self::avx512vbmi_intrinsics());
entries.extend(Self::avx512vbmi2_intrinsics());
entries.extend(Self::avx512vnni_intrinsics());
entries.extend(Self::avx512bitalg_intrinsics());
entries.extend(Self::avx512vpopcntdq_intrinsics());
entries.extend(Self::avx512bf16_intrinsics());
entries.extend(Self::avx512fp16_intrinsics());
entries.extend(Self::bmi_intrinsics());
entries.extend(Self::bmi2_intrinsics());
entries.extend(Self::aes_sha_intrinsics());
entries.extend(Self::rdrand_rdseed_intrinsics());
entries.extend(Self::adx_intrinsics());
entries.extend(Self::gfni_intrinsics());
entries.extend(Self::vpclmulqdq_intrinsics());
entries.extend(Self::amx_intrinsics());
X86IntrinsicsCatalog { entries }
}
pub fn all(&self) -> &[X86IntrinsicEntry] {
&self.entries
}
pub fn len(&self) -> usize {
self.entries.len()
}
pub fn is_empty(&self) -> bool {
self.entries.is_empty()
}
pub fn by_isa(&self, isa: X86IsaExtension) -> Vec<&X86IntrinsicEntry> {
self.entries.iter().filter(|e| e.isa == isa).collect()
}
pub fn find_by_name(&self, name: &str) -> Option<&X86IntrinsicEntry> {
self.entries.iter().find(|e| e.name == name)
}
pub fn find_by_instruction(&self, instruction: &str) -> Vec<&X86IntrinsicEntry> {
self.entries.iter().filter(|e| e.instruction == instruction).collect()
}
pub fn all_isa_extensions(&self) -> Vec<X86IsaExtension> {
let mut set: Vec<X86IsaExtension> = Vec::new();
for entry in &self.entries {
if !set.contains(&entry.isa) {
set.push(entry.isa);
}
}
set
}
pub fn count_by_isa(&self) -> HashMap<X86IsaExtension, usize> {
let mut map = HashMap::new();
for entry in &self.entries {
*map.entry(entry.isa).or_insert(0) += 1;
}
map
}
pub fn find_by_prefix(&self, prefix: &str) -> Vec<&X86IntrinsicEntry> {
self.entries.iter().filter(|e| e.name.starts_with(prefix)).collect()
}
fn mmx_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm_empty",
"void _mm_empty(void)",
X86IsaExtension::Mmx,
"EMMS",
"Empty the MMX state by clearing the FP/MMX tag word.",
),
X86IntrinsicEntry::new(
"_mm_setzero_si64",
"__m64 _mm_setzero_si64(void)",
X86IsaExtension::Mmx,
"PXOR",
"Return vector of type __m64 with all elements set to zero.",
),
X86IntrinsicEntry::new(
"_mm_set_pi8",
"__m64 _mm_set_pi8(char b7, char b6, char b5, char b4, char b3, char b2, char b1, char b0)",
X86IsaExtension::Mmx,
"composite",
"Set packed 8-bit integers in an __m64 with the supplied values.",
),
X86IntrinsicEntry::new(
"_mm_set_pi16",
"__m64 _mm_set_pi16(short w3, short w2, short w1, short w0)",
X86IsaExtension::Mmx,
"composite",
"Set packed 16-bit integers in an __m64 with the supplied values.",
),
X86IntrinsicEntry::new(
"_mm_set_pi32",
"__m64 _mm_set_pi32(int i1, int i0)",
X86IsaExtension::Mmx,
"composite",
"Set packed 32-bit integers in an __m64 with the supplied values.",
),
X86IntrinsicEntry::new(
"_mm_setr_pi8",
"__m64 _mm_setr_pi8(char b7, char b6, char b5, char b4, char b3, char b2, char b1, char b0)",
X86IsaExtension::Mmx,
"composite",
"Set packed 8-bit integers in an __m64 in reverse order.",
),
X86IntrinsicEntry::new(
"_mm_setr_pi16",
"__m64 _mm_setr_pi16(short w3, short w2, short w1, short w0)",
X86IsaExtension::Mmx,
"composite",
"Set packed 16-bit integers in an __m64 in reverse order.",
),
X86IntrinsicEntry::new(
"_mm_setr_pi32",
"__m64 _mm_setr_pi32(int i1, int i0)",
X86IsaExtension::Mmx,
"composite",
"Set packed 32-bit integers in an __m64 in reverse order.",
),
X86IntrinsicEntry::new(
"_mm_set1_pi8",
"__m64 _mm_set1_pi8(char b)",
X86IsaExtension::Mmx,
"composite",
"Set all 8-bit integers in an __m64 to the same value.",
),
X86IntrinsicEntry::new(
"_mm_set1_pi16",
"__m64 _mm_set1_pi16(short w)",
X86IsaExtension::Mmx,
"composite",
"Set all 16-bit integers in an __m64 to the same value.",
),
X86IntrinsicEntry::new(
"_mm_set1_pi32",
"__m64 _mm_set1_pi32(int i)",
X86IsaExtension::Mmx,
"composite",
"Set all 32-bit integers in an __m64 to the same value.",
),
X86IntrinsicEntry::new(
"_m_pextrw",
"int _m_pextrw(__m64 a, int n)",
X86IsaExtension::Mmx,
"PEXTRW",
"Extract a 16-bit integer from the MMX register at position n.",
),
X86IntrinsicEntry::new(
"_m_pinsrw",
"__m64 _m_pinsrw(__m64 a, int d, int n)",
X86IsaExtension::Mmx,
"PINSRW",
"Insert a 16-bit integer into the MMX register at position n.",
),
X86IntrinsicEntry::new(
"_m_pmaxsw",
"__m64 _m_pmaxsw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PMAXSW",
"Compare packed signed 16-bit integers and store maximum values.",
),
X86IntrinsicEntry::new(
"_m_pmaxub",
"__m64 _m_pmaxub(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PMAXUB",
"Compare packed unsigned 8-bit integers and store maximum values.",
),
X86IntrinsicEntry::new(
"_m_pminsw",
"__m64 _m_pminsw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PMINSW",
"Compare packed signed 16-bit integers and store minimum values.",
),
X86IntrinsicEntry::new(
"_m_pminub",
"__m64 _m_pminub(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PMINUB",
"Compare packed unsigned 8-bit integers and store minimum values.",
),
X86IntrinsicEntry::new(
"_m_pavgb",
"__m64 _m_pavgb(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PAVGB",
"Compute the rounded average of packed unsigned 8-bit integers.",
),
X86IntrinsicEntry::new(
"_m_pavgw",
"__m64 _m_pavgw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PAVGW",
"Compute the rounded average of packed unsigned 16-bit integers.",
),
X86IntrinsicEntry::new(
"_m_pmulhuw",
"__m64 _m_pmulhuw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PMULHUW",
"Multiply packed unsigned 16-bit integers and store high 16 bits.",
),
X86IntrinsicEntry::new(
"_m_psadbw",
"__m64 _m_psadbw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PSADBW",
"Compute the sum of absolute differences of unsigned 8-bit integers.",
),
X86IntrinsicEntry::new(
"_m_pmovmskb",
"int _m_pmovmskb(__m64 a)",
X86IsaExtension::Mmx,
"PMOVMSKB",
"Create an 8-bit mask from the most significant bit of each byte.",
),
X86IntrinsicEntry::new(
"_m_pmulhw",
"__m64 _m_pmulhw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PMULHW",
"Multiply packed signed 16-bit integers and store high 16 bits.",
),
X86IntrinsicEntry::new(
"_m_pmullw",
"__m64 _m_pmullw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PMULLW",
"Multiply packed signed 16-bit integers and store low 16 bits.",
),
X86IntrinsicEntry::new(
"_m_pshufw",
"__m64 _m_pshufw(__m64 a, int n)",
X86IsaExtension::Mmx,
"PSHUFW",
"Shuffle packed 16-bit integers according to the immediate control.",
),
X86IntrinsicEntry::new(
"_m_paddb",
"__m64 _m_paddb(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PADDB",
"Add packed 8-bit integers.",
),
X86IntrinsicEntry::new(
"_m_paddw",
"__m64 _m_paddw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PADDW",
"Add packed 16-bit integers.",
),
X86IntrinsicEntry::new(
"_m_paddd",
"__m64 _m_paddd(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PADDD",
"Add packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_m_paddsb",
"__m64 _m_paddsb(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PADDSB",
"Add packed signed 8-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_m_paddsw",
"__m64 _m_paddsw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PADDSW",
"Add packed signed 16-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_m_paddusb",
"__m64 _m_paddusb(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PADDUSB",
"Add packed unsigned 8-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_m_paddusw",
"__m64 _m_paddusw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PADDUSW",
"Add packed unsigned 16-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_m_psubb",
"__m64 _m_psubb(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PSUBB",
"Subtract packed 8-bit integers.",
),
X86IntrinsicEntry::new(
"_m_psubw",
"__m64 _m_psubw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PSUBW",
"Subtract packed 16-bit integers.",
),
X86IntrinsicEntry::new(
"_m_psubd",
"__m64 _m_psubd(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PSUBD",
"Subtract packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_m_psubsb",
"__m64 _m_psubsb(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PSUBSB",
"Subtract packed signed 8-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_m_psubsw",
"__m64 _m_psubsw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PSUBSW",
"Subtract packed signed 16-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_m_psubusb",
"__m64 _m_psubusb(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PSUBUSB",
"Subtract packed unsigned 8-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_m_psubusw",
"__m64 _m_psubusw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PSUBUSW",
"Subtract packed unsigned 16-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_m_pand",
"__m64 _m_pand(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PAND",
"Compute the bitwise AND of two 64-bit MMX vectors.",
),
X86IntrinsicEntry::new(
"_m_por",
"__m64 _m_por(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"POR",
"Compute the bitwise OR of two 64-bit MMX vectors.",
),
X86IntrinsicEntry::new(
"_m_pxor",
"__m64 _m_pxor(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PXOR",
"Compute the bitwise XOR of two 64-bit MMX vectors.",
),
X86IntrinsicEntry::new(
"_m_pandn",
"__m64 _m_pandn(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PANDN",
"Compute the bitwise AND-NOT of two 64-bit MMX vectors.",
),
X86IntrinsicEntry::new(
"_m_pcmpeqb",
"__m64 _m_pcmpeqb(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PCMPEQB",
"Compare packed 8-bit integers for equality.",
),
X86IntrinsicEntry::new(
"_m_pcmpeqw",
"__m64 _m_pcmpeqw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PCMPEQW",
"Compare packed 16-bit integers for equality.",
),
X86IntrinsicEntry::new(
"_m_pcmpeqd",
"__m64 _m_pcmpeqd(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PCMPEQD",
"Compare packed 32-bit integers for equality.",
),
X86IntrinsicEntry::new(
"_m_pcmpgtb",
"__m64 _m_pcmpgtb(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PCMPGTB",
"Compare packed signed 8-bit integers for greater-than.",
),
X86IntrinsicEntry::new(
"_m_pcmpgtw",
"__m64 _m_pcmpgtw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PCMPGTW",
"Compare packed signed 16-bit integers for greater-than.",
),
X86IntrinsicEntry::new(
"_m_pcmpgtd",
"__m64 _m_pcmpgtd(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PCMPGTD",
"Compare packed signed 32-bit integers for greater-than.",
),
X86IntrinsicEntry::new(
"_m_psllw",
"__m64 _m_psllw(__m64 a, __m64 count)",
X86IsaExtension::Mmx,
"PSLLW",
"Shift packed 16-bit integers left logically.",
),
X86IntrinsicEntry::new(
"_m_pslld",
"__m64 _m_pslld(__m64 a, __m64 count)",
X86IsaExtension::Mmx,
"PSLLD",
"Shift packed 32-bit integers left logically.",
),
X86IntrinsicEntry::new(
"_m_psllq",
"__m64 _m_psllq(__m64 a, __m64 count)",
X86IsaExtension::Mmx,
"PSLLQ",
"Shift packed 64-bit integer left logically.",
),
X86IntrinsicEntry::new(
"_m_psrlw",
"__m64 _m_psrlw(__m64 a, __m64 count)",
X86IsaExtension::Mmx,
"PSRLW",
"Shift packed 16-bit integers right logically.",
),
X86IntrinsicEntry::new(
"_m_psrld",
"__m64 _m_psrld(__m64 a, __m64 count)",
X86IsaExtension::Mmx,
"PSRLD",
"Shift packed 32-bit integers right logically.",
),
X86IntrinsicEntry::new(
"_m_psrlq",
"__m64 _m_psrlq(__m64 a, __m64 count)",
X86IsaExtension::Mmx,
"PSRLQ",
"Shift packed 64-bit integer right logically.",
),
X86IntrinsicEntry::new(
"_m_psraw",
"__m64 _m_psraw(__m64 a, __m64 count)",
X86IsaExtension::Mmx,
"PSRAW",
"Shift packed 16-bit integers right arithmetically.",
),
X86IntrinsicEntry::new(
"_m_psrad",
"__m64 _m_psrad(__m64 a, __m64 count)",
X86IsaExtension::Mmx,
"PSRAD",
"Shift packed 32-bit integers right arithmetically.",
),
X86IntrinsicEntry::new(
"_m_packsswb",
"__m64 _m_packsswb(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PACKSSWB",
"Pack signed 16-bit integers into 8-bit with signed saturation.",
),
X86IntrinsicEntry::new(
"_m_packssdw",
"__m64 _m_packssdw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PACKSSDW",
"Pack signed 32-bit integers into 16-bit with signed saturation.",
),
X86IntrinsicEntry::new(
"_m_packuswb",
"__m64 _m_packuswb(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PACKUSWB",
"Pack signed 16-bit integers into unsigned 8-bit with saturation.",
),
X86IntrinsicEntry::new(
"_m_punpckhbw",
"__m64 _m_punpckhbw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PUNPCKHBW",
"Unpack and interleave high-order 8-bit integers.",
),
X86IntrinsicEntry::new(
"_m_punpckhwd",
"__m64 _m_punpckhwd(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PUNPCKHWD",
"Unpack and interleave high-order 16-bit integers.",
),
X86IntrinsicEntry::new(
"_m_punpckhdq",
"__m64 _m_punpckhdq(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PUNPCKHDQ",
"Unpack and interleave high-order 32-bit integers.",
),
X86IntrinsicEntry::new(
"_m_punpcklbw",
"__m64 _m_punpcklbw(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PUNPCKLBW",
"Unpack and interleave low-order 8-bit integers.",
),
X86IntrinsicEntry::new(
"_m_punpcklwd",
"__m64 _m_punpcklwd(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PUNPCKLWD",
"Unpack and interleave low-order 16-bit integers.",
),
X86IntrinsicEntry::new(
"_m_punpckldq",
"__m64 _m_punpckldq(__m64 a, __m64 b)",
X86IsaExtension::Mmx,
"PUNPCKLDQ",
"Unpack and interleave low-order 32-bit integers.",
),
]
}
fn sse_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm_load_ps",
"__m128 _mm_load_ps(float const *mem_addr)",
X86IsaExtension::Sse,
"MOVAPS",
"Load 128-bits (four packed single-precision FP values) from aligned memory.",
),
X86IntrinsicEntry::new(
"_mm_loadu_ps",
"__m128 _mm_loadu_ps(float const *mem_addr)",
X86IsaExtension::Sse,
"MOVUPS",
"Load 128-bits (four packed single-precision FP values) from unaligned memory.",
),
X86IntrinsicEntry::new(
"_mm_load_ss",
"__m128 _mm_load_ss(float const *mem_addr)",
X86IsaExtension::Sse,
"MOVSS",
"Load a single-precision FP value into the low element, clear upper.",
),
X86IntrinsicEntry::new(
"_mm_load1_ps",
"__m128 _mm_load1_ps(float const *mem_addr)",
X86IsaExtension::Sse,
"MOVSS+SHUFPS",
"Load a single FP value and broadcast to all four elements.",
),
X86IntrinsicEntry::new(
"_mm_loadr_ps",
"__m128 _mm_loadr_ps(float const *mem_addr)",
X86IsaExtension::Sse,
"MOVAPS+SHUFPS",
"Load four single-precision FP values in reverse order.",
),
X86IntrinsicEntry::new(
"_mm_loadh_pi",
"__m128 _mm_loadh_pi(__m128 a, __m64 const *mem_addr)",
X86IsaExtension::Sse,
"MOVHPS",
"Load two FP values into the high 64 bits of an XMM register.",
),
X86IntrinsicEntry::new(
"_mm_loadl_pi",
"__m128 _mm_loadl_pi(__m128 a, __m64 const *mem_addr)",
X86IsaExtension::Sse,
"MOVLPS",
"Load two FP values into the low 64 bits of an XMM register.",
),
X86IntrinsicEntry::new(
"_mm_store_ps",
"void _mm_store_ps(float *mem_addr, __m128 a)",
X86IsaExtension::Sse,
"MOVAPS",
"Store 128-bits (four packed single-precision FP values) to aligned memory.",
),
X86IntrinsicEntry::new(
"_mm_storeu_ps",
"void _mm_storeu_ps(float *mem_addr, __m128 a)",
X86IsaExtension::Sse,
"MOVUPS",
"Store 128-bits (four packed single-precision FP values) to unaligned memory.",
),
X86IntrinsicEntry::new(
"_mm_store_ss",
"void _mm_store_ss(float *mem_addr, __m128 a)",
X86IsaExtension::Sse,
"MOVSS",
"Store the lowest single-precision FP value to memory.",
),
X86IntrinsicEntry::new(
"_mm_store1_ps",
"void _mm_store1_ps(float *mem_addr, __m128 a)",
X86IsaExtension::Sse,
"MOVSS+SHUFPS",
"Store the lowest single-precision FP value to four consecutive locations.",
),
X86IntrinsicEntry::new(
"_mm_storer_ps",
"void _mm_storer_ps(float *mem_addr, __m128 a)",
X86IsaExtension::Sse,
"MOVAPS+SHUFPS",
"Store four single-precision FP values in reverse order.",
),
X86IntrinsicEntry::new(
"_mm_storeh_pi",
"void _mm_storeh_pi(__m64 *mem_addr, __m128 a)",
X86IsaExtension::Sse,
"MOVHPS",
"Store the high 64 bits of an XMM register to memory.",
),
X86IntrinsicEntry::new(
"_mm_storel_pi",
"void _mm_storel_pi(__m64 *mem_addr, __m128 a)",
X86IsaExtension::Sse,
"MOVLPS",
"Store the low 64 bits of an XMM register to memory.",
),
X86IntrinsicEntry::new(
"_mm_move_ss",
"__m128 _mm_move_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"MOVSS",
"Move the lower single-precision FP value from b, preserve upper.",
),
X86IntrinsicEntry::new(
"_mm_movehl_ps",
"__m128 _mm_movehl_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"MOVHLPS",
"Move high two elements of b to low two elements of result.",
),
X86IntrinsicEntry::new(
"_mm_movelh_ps",
"__m128 _mm_movelh_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"MOVLHPS",
"Move low two elements of b to high two elements of result.",
),
X86IntrinsicEntry::new(
"_mm_set_ps",
"__m128 _mm_set_ps(float e3, float e2, float e1, float e0)",
X86IsaExtension::Sse,
"composite",
"Set four packed single-precision FP values with the supplied values.",
),
X86IntrinsicEntry::new(
"_mm_set_ss",
"__m128 _mm_set_ss(float w)",
X86IsaExtension::Sse,
"composite",
"Set the low single-precision FP value, zero upper elements.",
),
X86IntrinsicEntry::new(
"_mm_set1_ps",
"__m128 _mm_set1_ps(float w)",
X86IsaExtension::Sse,
"composite",
"Broadcast a single-precision FP value to all four elements.",
),
X86IntrinsicEntry::new(
"_mm_setr_ps",
"__m128 _mm_setr_ps(float e3, float e2, float e1, float e0)",
X86IsaExtension::Sse,
"composite",
"Set four packed single-precision FP values in reverse order.",
),
X86IntrinsicEntry::new(
"_mm_setzero_ps",
"__m128 _mm_setzero_ps(void)",
X86IsaExtension::Sse,
"XORPS",
"Return a 128-bit vector with all elements set to zero.",
),
X86IntrinsicEntry::new(
"_mm_add_ps",
"__m128 _mm_add_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"ADDPS",
"Add packed single-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_add_ss",
"__m128 _mm_add_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"ADDSS",
"Add the lower single-precision FP values, pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_sub_ps",
"__m128 _mm_sub_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"SUBPS",
"Subtract packed single-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_sub_ss",
"__m128 _mm_sub_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"SUBSS",
"Subtract the lower single-precision FP values, pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_mul_ps",
"__m128 _mm_mul_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"MULPS",
"Multiply packed single-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_mul_ss",
"__m128 _mm_mul_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"MULSS",
"Multiply the lower single-precision FP values, pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_div_ps",
"__m128 _mm_div_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"DIVPS",
"Divide packed single-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_div_ss",
"__m128 _mm_div_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"DIVSS",
"Divide the lower single-precision FP values, pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_sqrt_ps",
"__m128 _mm_sqrt_ps(__m128 a)",
X86IsaExtension::Sse,
"SQRTPS",
"Compute the square root of packed single-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_sqrt_ss",
"__m128 _mm_sqrt_ss(__m128 a)",
X86IsaExtension::Sse,
"SQRTSS",
"Compute the square root of the lower single-precision FP value.",
),
X86IntrinsicEntry::new(
"_mm_rcp_ps",
"__m128 _mm_rcp_ps(__m128 a)",
X86IsaExtension::Sse,
"RCPPS",
"Compute the approximate reciprocal of packed single-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_rcp_ss",
"__m128 _mm_rcp_ss(__m128 a)",
X86IsaExtension::Sse,
"RCPSS",
"Compute the approximate reciprocal of the lower single-precision FP value.",
),
X86IntrinsicEntry::new(
"_mm_rsqrt_ps",
"__m128 _mm_rsqrt_ps(__m128 a)",
X86IsaExtension::Sse,
"RSQRTPS",
"Compute the approximate reciprocal square root of packed single-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_rsqrt_ss",
"__m128 _mm_rsqrt_ss(__m128 a)",
X86IsaExtension::Sse,
"RSQRTSS",
"Compute the approximate reciprocal square root of the lower single-precision FP value.",
),
X86IntrinsicEntry::new(
"_mm_min_ps",
"__m128 _mm_min_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"MINPS",
"Compare packed single-precision FP values and return the minimum.",
),
X86IntrinsicEntry::new(
"_mm_min_ss",
"__m128 _mm_min_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"MINSS",
"Compare the lower single-precision FP values and return the minimum.",
),
X86IntrinsicEntry::new(
"_mm_max_ps",
"__m128 _mm_max_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"MAXPS",
"Compare packed single-precision FP values and return the maximum.",
),
X86IntrinsicEntry::new(
"_mm_max_ss",
"__m128 _mm_max_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"MAXSS",
"Compare the lower single-precision FP values and return the maximum.",
),
X86IntrinsicEntry::new(
"_mm_cmpeq_ps",
"__m128 _mm_cmpeq_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPPS",
"Compare packed single-precision FP values for equality.",
),
X86IntrinsicEntry::new(
"_mm_cmpeq_ss",
"__m128 _mm_cmpeq_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPSS",
"Compare the lower single-precision FP values for equality.",
),
X86IntrinsicEntry::new(
"_mm_cmplt_ps",
"__m128 _mm_cmplt_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPPS",
"Compare packed single-precision FP values for less-than.",
),
X86IntrinsicEntry::new(
"_mm_cmplt_ss",
"__m128 _mm_cmplt_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPSS",
"Compare the lower single-precision FP values for less-than.",
),
X86IntrinsicEntry::new(
"_mm_cmple_ps",
"__m128 _mm_cmple_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPPS",
"Compare packed single-precision FP values for less-than-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmple_ss",
"__m128 _mm_cmple_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPSS",
"Compare the lower single-precision FP values for less-than-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpgt_ps",
"__m128 _mm_cmpgt_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPPS",
"Compare packed single-precision FP values for greater-than.",
),
X86IntrinsicEntry::new(
"_mm_cmpgt_ss",
"__m128 _mm_cmpgt_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPSS",
"Compare the lower single-precision FP values for greater-than.",
),
X86IntrinsicEntry::new(
"_mm_cmpge_ps",
"__m128 _mm_cmpge_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPPS",
"Compare packed single-precision FP values for greater-than-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpge_ss",
"__m128 _mm_cmpge_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPSS",
"Compare the lower single-precision FP values for greater-than-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpneq_ps",
"__m128 _mm_cmpneq_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPPS",
"Compare packed single-precision FP values for not-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpneq_ss",
"__m128 _mm_cmpneq_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPSS",
"Compare the lower single-precision FP values for not-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpnlt_ps",
"__m128 _mm_cmpnlt_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPPS",
"Compare packed single-precision FP values for not-less-than.",
),
X86IntrinsicEntry::new(
"_mm_cmpnlt_ss",
"__m128 _mm_cmpnlt_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPSS",
"Compare the lower single-precision FP values for not-less-than.",
),
X86IntrinsicEntry::new(
"_mm_cmpnle_ps",
"__m128 _mm_cmpnle_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPPS",
"Compare packed single-precision FP values for not-less-than-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpnle_ss",
"__m128 _mm_cmpnle_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPSS",
"Compare the lower single-precision FP values for not-less-than-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpngt_ps",
"__m128 _mm_cmpngt_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPPS",
"Compare packed single-precision FP values for not-greater-than.",
),
X86IntrinsicEntry::new(
"_mm_cmpngt_ss",
"__m128 _mm_cmpngt_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPSS",
"Compare the lower single-precision FP values for not-greater-than.",
),
X86IntrinsicEntry::new(
"_mm_cmpnge_ps",
"__m128 _mm_cmpnge_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPPS",
"Compare packed single-precision FP values for not-greater-than-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpnge_ss",
"__m128 _mm_cmpnge_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPSS",
"Compare the lower single-precision FP values for not-greater-than-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpord_ps",
"__m128 _mm_cmpord_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPPS",
"Compare packed single-precision FP values for ordered. Neither NaN.",
),
X86IntrinsicEntry::new(
"_mm_cmpord_ss",
"__m128 _mm_cmpord_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPSS",
"Compare the lower single-precision FP values for ordered. Neither NaN.",
),
X86IntrinsicEntry::new(
"_mm_cmpunord_ps",
"__m128 _mm_cmpunord_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPPS",
"Compare packed single-precision FP values for unordered. Either NaN.",
),
X86IntrinsicEntry::new(
"_mm_cmpunord_ss",
"__m128 _mm_cmpunord_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"CMPSS",
"Compare the lower single-precision FP values for unordered. Either NaN.",
),
X86IntrinsicEntry::new(
"_mm_comieq_ss",
"int _mm_comieq_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"COMISS",
"Compare the lower single-precision FP values and set EFLAGS for equality.",
),
X86IntrinsicEntry::new(
"_mm_comilt_ss",
"int _mm_comilt_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"COMISS",
"Compare the lower single-precision FP values and set EFLAGS for less-than.",
),
X86IntrinsicEntry::new(
"_mm_comile_ss",
"int _mm_comile_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"COMISS",
"Compare the lower single-precision FP values and set EFLAGS for less-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_comigt_ss",
"int _mm_comigt_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"COMISS",
"Compare the lower single-precision FP values and set EFLAGS for greater-than.",
),
X86IntrinsicEntry::new(
"_mm_comige_ss",
"int _mm_comige_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"COMISS",
"Compare the lower single-precision FP values and set EFLAGS for greater-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_comineq_ss",
"int _mm_comineq_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"COMISS",
"Compare the lower single-precision FP values and set EFLAGS for not-equal.",
),
X86IntrinsicEntry::new(
"_mm_ucomieq_ss",
"int _mm_ucomieq_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"UCOMISS",
"Unordered compare the lower single-precision FP values for equality.",
),
X86IntrinsicEntry::new(
"_mm_ucomilt_ss",
"int _mm_ucomilt_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"UCOMISS",
"Unordered compare the lower single-precision FP values for less-than.",
),
X86IntrinsicEntry::new(
"_mm_ucomile_ss",
"int _mm_ucomile_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"UCOMISS",
"Unordered compare the lower single-precision FP values for less-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_ucomigt_ss",
"int _mm_ucomigt_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"UCOMISS",
"Unordered compare the lower single-precision FP values for greater-than.",
),
X86IntrinsicEntry::new(
"_mm_ucomige_ss",
"int _mm_ucomige_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"UCOMISS",
"Unordered compare the lower single-precision FP values for greater-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_ucomineq_ss",
"int _mm_ucomineq_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"UCOMISS",
"Unordered compare the lower single-precision FP values for not-equal.",
),
X86IntrinsicEntry::new(
"_mm_cvtss_si32",
"int _mm_cvtss_si32(__m128 a)",
X86IsaExtension::Sse,
"CVTSS2SI",
"Convert the lower single-precision FP value to a 32-bit integer.",
),
X86IntrinsicEntry::new(
"_mm_cvtss_si64",
"int64_t _mm_cvtss_si64(__m128 a)",
X86IsaExtension::Sse,
"CVTSS2SI",
"Convert the lower single-precision FP value to a 64-bit integer.",
),
X86IntrinsicEntry::new(
"_mm_cvt_ss2si",
"int _mm_cvt_ss2si(__m128 a)",
X86IsaExtension::Sse,
"CVTSS2SI",
"Convert the lower single-precision FP value to a 32-bit integer (legacy).",
),
X86IntrinsicEntry::new(
"_mm_cvtsi32_ss",
"__m128 _mm_cvtsi32_ss(__m128 a, int b)",
X86IsaExtension::Sse,
"CVTSI2SS",
"Convert a 32-bit integer to a single-precision FP value.",
),
X86IntrinsicEntry::new(
"_mm_cvtsi64_ss",
"__m128 _mm_cvtsi64_ss(__m128 a, int64_t b)",
X86IsaExtension::Sse,
"CVTSI2SS",
"Convert a 64-bit integer to a single-precision FP value.",
),
X86IntrinsicEntry::new(
"_mm_cvtpi16_ps",
"__m128 _mm_cvtpi16_ps(__m64 a)",
X86IsaExtension::Sse,
"composite",
"Convert four packed 16-bit integers to single-precision FP.",
),
X86IntrinsicEntry::new(
"_mm_cvtpi32_ps",
"__m128 _mm_cvtpi32_ps(__m128 a, __m64 b)",
X86IsaExtension::Sse,
"CVTPI2PS",
"Convert two packed 32-bit integers to single-precision FP.",
),
X86IntrinsicEntry::new(
"_mm_cvtpi32x2_ps",
"__m128 _mm_cvtpi32x2_ps(__m64 a, __m64 b)",
X86IsaExtension::Sse,
"CVTPI2PS",
"Convert two pairs of 32-bit integers to four single-precision FP.",
),
X86IntrinsicEntry::new(
"_mm_cvtps_pi16",
"__m64 _mm_cvtps_pi16(__m128 a)",
X86IsaExtension::Sse,
"composite",
"Convert four packed single-precision FP to packed 16-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_cvtps_pi32",
"__m64 _mm_cvtps_pi32(__m128 a)",
X86IsaExtension::Sse,
"CVTPS2PI",
"Convert two packed single-precision FP to packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_cvtt_ss2si",
"int _mm_cvtt_ss2si(__m128 a)",
X86IsaExtension::Sse,
"CVTTSS2SI",
"Convert with truncation the lower single-precision FP to a 32-bit integer.",
),
X86IntrinsicEntry::new(
"_mm_cvttss_si32",
"int _mm_cvttss_si32(__m128 a)",
X86IsaExtension::Sse,
"CVTTSS2SI",
"Convert with truncation the lower single-precision FP to a 32-bit integer.",
),
X86IntrinsicEntry::new(
"_mm_cvttss_si64",
"int64_t _mm_cvttss_si64(__m128 a)",
X86IsaExtension::Sse,
"CVTTSS2SI",
"Convert with truncation the lower single-precision FP to a 64-bit integer.",
),
X86IntrinsicEntry::new(
"_mm_cvttps_pi32",
"__m64 _mm_cvttps_pi32(__m128 a)",
X86IsaExtension::Sse,
"CVTTPS2PI",
"Convert with truncation two single-precision FP to packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_shuffle_ps",
"__m128 _mm_shuffle_ps(__m128 a, __m128 b, unsigned int imm8)",
X86IsaExtension::Sse,
"SHUFPS",
"Shuffle single-precision FP values using 8-bit immediate control.",
),
X86IntrinsicEntry::new(
"_mm_unpackhi_ps",
"__m128 _mm_unpackhi_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"UNPCKHPS",
"Unpack and interleave high single-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_unpacklo_ps",
"__m128 _mm_unpacklo_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"UNPCKLPS",
"Unpack and interleave low single-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_and_ps",
"__m128 _mm_and_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"ANDPS",
"Compute the bitwise AND of two packed single-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm_andnot_ps",
"__m128 _mm_andnot_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"ANDNPS",
"Compute the bitwise AND-NOT of two packed single-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm_or_ps",
"__m128 _mm_or_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"ORPS",
"Compute the bitwise OR of two packed single-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm_xor_ps",
"__m128 _mm_xor_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse,
"XORPS",
"Compute the bitwise XOR of two packed single-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm_prefetch",
"void _mm_prefetch(char const *p, int i)",
X86IsaExtension::Sse,
"PREFETCHT0/T1/T2/NTA",
"Load one cache line of data from address p to a location closer to the processor.",
),
X86IntrinsicEntry::new(
"_mm_stream_ps",
"void _mm_stream_ps(float *mem_addr, __m128 a)",
X86IsaExtension::Sse,
"MOVNTPS",
"Store 128-bits to memory using a non-temporal hint to minimize cache pollution.",
),
X86IntrinsicEntry::new(
"_mm_stream_pi",
"void _mm_stream_pi(__m64 *mem_addr, __m64 a)",
X86IsaExtension::Sse,
"MOVNTQ",
"Store 64-bits to memory using a non-temporal hint to minimize cache pollution.",
),
X86IntrinsicEntry::new(
"_mm_sfence",
"void _mm_sfence(void)",
X86IsaExtension::Sse,
"SFENCE",
"Guarantee that every preceding store is globally visible before any subsequent store.",
),
X86IntrinsicEntry::new(
"_mm_extract_pi16",
"int _mm_extract_pi16(__m64 a, int n)",
X86IsaExtension::Sse,
"PEXTRW",
"Extract a 16-bit integer from the 64-bit vector at position n.",
),
X86IntrinsicEntry::new(
"_mm_insert_pi16",
"__m64 _mm_insert_pi16(__m64 a, int d, int n)",
X86IsaExtension::Sse,
"PINSRW",
"Insert a 16-bit integer into the 64-bit vector at position n.",
),
X86IntrinsicEntry::new(
"_mm_max_pi16",
"__m64 _mm_max_pi16(__m64 a, __m64 b)",
X86IsaExtension::Sse,
"PMAXSW",
"Compare packed signed 16-bit integers and store maximum values.",
),
X86IntrinsicEntry::new(
"_mm_max_pu8",
"__m64 _mm_max_pu8(__m64 a, __m64 b)",
X86IsaExtension::Sse,
"PMAXUB",
"Compare packed unsigned 8-bit integers and store maximum values.",
),
X86IntrinsicEntry::new(
"_mm_min_pi16",
"__m64 _mm_min_pi16(__m64 a, __m64 b)",
X86IsaExtension::Sse,
"PMINSW",
"Compare packed signed 16-bit integers and store minimum values.",
),
X86IntrinsicEntry::new(
"_mm_min_pu8",
"__m64 _mm_min_pu8(__m64 a, __m64 b)",
X86IsaExtension::Sse,
"PMINUB",
"Compare packed unsigned 8-bit integers and store minimum values.",
),
X86IntrinsicEntry::new(
"_mm_movemask_pi8",
"int _mm_movemask_pi8(__m64 a)",
X86IsaExtension::Sse,
"PMOVMSKB",
"Create an 8-bit mask from the most significant bit of each byte.",
),
X86IntrinsicEntry::new(
"_mm_mulhi_pu16",
"__m64 _mm_mulhi_pu16(__m64 a, __m64 b)",
X86IsaExtension::Sse,
"PMULHUW",
"Multiply packed unsigned 16-bit integers and store high 16 bits.",
),
X86IntrinsicEntry::new(
"_mm_sad_pu8",
"__m64 _mm_sad_pu8(__m64 a, __m64 b)",
X86IsaExtension::Sse,
"PSADBW",
"Compute the sum of absolute differences of unsigned 8-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_shuffle_pi16",
"__m64 _mm_shuffle_pi16(__m64 a, int n)",
X86IsaExtension::Sse,
"PSHUFW",
"Shuffle packed 16-bit integers according to the immediate control.",
),
X86IntrinsicEntry::new(
"_mm_avg_pu8",
"__m64 _mm_avg_pu8(__m64 a, __m64 b)",
X86IsaExtension::Sse,
"PAVGB",
"Compute the rounded average of packed unsigned 8-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_avg_pu16",
"__m64 _mm_avg_pu16(__m64 a, __m64 b)",
X86IsaExtension::Sse,
"PAVGW",
"Compute the rounded average of packed unsigned 16-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_getcsr",
"unsigned int _mm_getcsr(void)",
X86IsaExtension::Sse,
"STMXCSR",
"Get the contents of the MXCSR control and status register.",
),
X86IntrinsicEntry::new(
"_mm_setcsr",
"void _mm_setcsr(unsigned int i)",
X86IsaExtension::Sse,
"LDMXCSR",
"Set the contents of the MXCSR control and status register.",
),
X86IntrinsicEntry::new(
"_mm_movemask_ps",
"int _mm_movemask_ps(__m128 a)",
X86IsaExtension::Sse,
"MOVMSKPS",
"Create a 4-bit mask from the most significant bit of each 32-bit FP element.",
),
]
}
fn sse2_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm_load_pd",
"__m128d _mm_load_pd(double const *mem_addr)",
X86IsaExtension::Sse2,
"MOVAPD",
"Load 128-bits (two packed double-precision FP values) from aligned memory.",
),
X86IntrinsicEntry::new(
"_mm_loadu_pd",
"__m128d _mm_loadu_pd(double const *mem_addr)",
X86IsaExtension::Sse2,
"MOVUPD",
"Load 128-bits (two packed double-precision FP values) from unaligned memory.",
),
X86IntrinsicEntry::new(
"_mm_load_sd",
"__m128d _mm_load_sd(double const *mem_addr)",
X86IsaExtension::Sse2,
"MOVSD",
"Load a double-precision FP value into the low element, clear upper.",
),
X86IntrinsicEntry::new(
"_mm_load1_pd",
"__m128d _mm_load1_pd(double const *mem_addr)",
X86IsaExtension::Sse2,
"MOVSD+SHUFPD",
"Load a double-precision FP value and duplicate to both elements.",
),
X86IntrinsicEntry::new(
"_mm_loadr_pd",
"__m128d _mm_loadr_pd(double const *mem_addr)",
X86IsaExtension::Sse2,
"MOVAPD+SHUFPD",
"Load two double-precision FP values in reverse order.",
),
X86IntrinsicEntry::new(
"_mm_loadh_pd",
"__m128d _mm_loadh_pd(__m128d a, double const *mem_addr)",
X86IsaExtension::Sse2,
"MOVHPD",
"Load a double-precision FP value into the high element.",
),
X86IntrinsicEntry::new(
"_mm_loadl_pd",
"__m128d _mm_loadl_pd(__m128d a, double const *mem_addr)",
X86IsaExtension::Sse2,
"MOVLPD",
"Load a double-precision FP value into the low element.",
),
X86IntrinsicEntry::new(
"_mm_store_pd",
"void _mm_store_pd(double *mem_addr, __m128d a)",
X86IsaExtension::Sse2,
"MOVAPD",
"Store 128-bits (two packed double-precision FP values) to aligned memory.",
),
X86IntrinsicEntry::new(
"_mm_storeu_pd",
"void _mm_storeu_pd(double *mem_addr, __m128d a)",
X86IsaExtension::Sse2,
"MOVUPD",
"Store 128-bits (two packed double-precision FP values) to unaligned memory.",
),
X86IntrinsicEntry::new(
"_mm_store_sd",
"void _mm_store_sd(double *mem_addr, __m128d a)",
X86IsaExtension::Sse2,
"MOVSD",
"Store the lower double-precision FP value to memory.",
),
X86IntrinsicEntry::new(
"_mm_store1_pd",
"void _mm_store1_pd(double *mem_addr, __m128d a)",
X86IsaExtension::Sse2,
"MOVSD+SHUFPD",
"Store the low double-precision FP value to two consecutive locations.",
),
X86IntrinsicEntry::new(
"_mm_storer_pd",
"void _mm_storer_pd(double *mem_addr, __m128d a)",
X86IsaExtension::Sse2,
"MOVAPD+SHUFPD",
"Store two double-precision FP values in reverse order.",
),
X86IntrinsicEntry::new(
"_mm_storeh_pd",
"void _mm_storeh_pd(double *mem_addr, __m128d a)",
X86IsaExtension::Sse2,
"MOVHPD",
"Store the high double-precision FP value to memory.",
),
X86IntrinsicEntry::new(
"_mm_storel_pd",
"void _mm_storel_pd(double *mem_addr, __m128d a)",
X86IsaExtension::Sse2,
"MOVLPD",
"Store the low double-precision FP value to memory.",
),
X86IntrinsicEntry::new(
"_mm_move_sd",
"__m128d _mm_move_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"MOVSD",
"Move the lower double-precision FP value from b, preserve upper.",
),
X86IntrinsicEntry::new(
"_mm_add_pd",
"__m128d _mm_add_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"ADDPD",
"Add packed double-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_add_sd",
"__m128d _mm_add_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"ADDSD",
"Add the lower double-precision FP values, pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_sub_pd",
"__m128d _mm_sub_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"SUBPD",
"Subtract packed double-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_sub_sd",
"__m128d _mm_sub_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"SUBSD",
"Subtract the lower double-precision FP values, pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_mul_pd",
"__m128d _mm_mul_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"MULPD",
"Multiply packed double-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_mul_sd",
"__m128d _mm_mul_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"MULSD",
"Multiply the lower double-precision FP values, pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_div_pd",
"__m128d _mm_div_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"DIVPD",
"Divide packed double-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_div_sd",
"__m128d _mm_div_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"DIVSD",
"Divide the lower double-precision FP values, pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_sqrt_pd",
"__m128d _mm_sqrt_pd(__m128d a)",
X86IsaExtension::Sse2,
"SQRTPD",
"Compute the square root of packed double-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_sqrt_sd",
"__m128d _mm_sqrt_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"SQRTSD",
"Compute the square root of the lower double-precision FP value.",
),
X86IntrinsicEntry::new(
"_mm_min_pd",
"__m128d _mm_min_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"MINPD",
"Compare packed double-precision FP values and return the minimum.",
),
X86IntrinsicEntry::new(
"_mm_min_sd",
"__m128d _mm_min_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"MINSD",
"Compare the lower double-precision FP values and return the minimum.",
),
X86IntrinsicEntry::new(
"_mm_max_pd",
"__m128d _mm_max_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"MAXPD",
"Compare packed double-precision FP values and return the maximum.",
),
X86IntrinsicEntry::new(
"_mm_max_sd",
"__m128d _mm_max_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"MAXSD",
"Compare the lower double-precision FP values and return the maximum.",
),
X86IntrinsicEntry::new(
"_mm_cmpeq_pd",
"__m128d _mm_cmpeq_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPPD",
"Compare packed double-precision FP values for equality.",
),
X86IntrinsicEntry::new(
"_mm_cmpeq_sd",
"__m128d _mm_cmpeq_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPSD",
"Compare the lower double-precision FP values for equality.",
),
X86IntrinsicEntry::new(
"_mm_cmplt_pd",
"__m128d _mm_cmplt_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPPD",
"Compare packed double-precision FP values for less-than.",
),
X86IntrinsicEntry::new(
"_mm_cmplt_sd",
"__m128d _mm_cmplt_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPSD",
"Compare the lower double-precision FP values for less-than.",
),
X86IntrinsicEntry::new(
"_mm_cmple_pd",
"__m128d _mm_cmple_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPPD",
"Compare packed double-precision FP values for less-than-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmple_sd",
"__m128d _mm_cmple_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPSD",
"Compare the lower double-precision FP values for less-than-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpgt_pd",
"__m128d _mm_cmpgt_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPPD",
"Compare packed double-precision FP values for greater-than.",
),
X86IntrinsicEntry::new(
"_mm_cmpgt_sd",
"__m128d _mm_cmpgt_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPSD",
"Compare the lower double-precision FP values for greater-than.",
),
X86IntrinsicEntry::new(
"_mm_cmpge_pd",
"__m128d _mm_cmpge_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPPD",
"Compare packed double-precision FP values for greater-than-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpge_sd",
"__m128d _mm_cmpge_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPSD",
"Compare the lower double-precision FP values for greater-than-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpneq_pd",
"__m128d _mm_cmpneq_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPPD",
"Compare packed double-precision FP values for not-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpneq_sd",
"__m128d _mm_cmpneq_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPSD",
"Compare the lower double-precision FP values for not-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpnlt_pd",
"__m128d _mm_cmpnlt_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPPD",
"Compare packed double-precision FP values for not-less-than.",
),
X86IntrinsicEntry::new(
"_mm_cmpnlt_sd",
"__m128d _mm_cmpnlt_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPSD",
"Compare the lower double-precision FP values for not-less-than.",
),
X86IntrinsicEntry::new(
"_mm_cmpnle_pd",
"__m128d _mm_cmpnle_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPPD",
"Compare packed double-precision FP values for not-less-than-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpnle_sd",
"__m128d _mm_cmpnle_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPSD",
"Compare the lower double-precision FP values for not-less-than-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_cmpord_pd",
"__m128d _mm_cmpord_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPPD",
"Compare packed double-precision FP values for ordered. Neither NaN.",
),
X86IntrinsicEntry::new(
"_mm_cmpord_sd",
"__m128d _mm_cmpord_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPSD",
"Compare the lower double-precision FP values for ordered. Neither NaN.",
),
X86IntrinsicEntry::new(
"_mm_cmpunord_pd",
"__m128d _mm_cmpunord_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPPD",
"Compare packed double-precision FP values for unordered. Either NaN.",
),
X86IntrinsicEntry::new(
"_mm_cmpunord_sd",
"__m128d _mm_cmpunord_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"CMPSD",
"Compare the lower double-precision FP values for unordered. Either NaN.",
),
X86IntrinsicEntry::new(
"_mm_comieq_sd",
"int _mm_comieq_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"COMISD",
"Compare the lower double-precision FP values and set EFLAGS for equality.",
),
X86IntrinsicEntry::new(
"_mm_comilt_sd",
"int _mm_comilt_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"COMISD",
"Compare the lower double-precision FP values and set EFLAGS for less-than.",
),
X86IntrinsicEntry::new(
"_mm_comile_sd",
"int _mm_comile_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"COMISD",
"Compare the lower double-precision FP values and set EFLAGS for less-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_comigt_sd",
"int _mm_comigt_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"COMISD",
"Compare the lower double-precision FP values and set EFLAGS for greater-than.",
),
X86IntrinsicEntry::new(
"_mm_comige_sd",
"int _mm_comige_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"COMISD",
"Compare the lower double-precision FP values and set EFLAGS for greater-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_comineq_sd",
"int _mm_comineq_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"COMISD",
"Compare the lower double-precision FP values and set EFLAGS for not-equal.",
),
X86IntrinsicEntry::new(
"_mm_ucomieq_sd",
"int _mm_ucomieq_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"UCOMISD",
"Unordered compare the lower double-precision FP values for equality.",
),
X86IntrinsicEntry::new(
"_mm_ucomilt_sd",
"int _mm_ucomilt_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"UCOMISD",
"Unordered compare the lower double-precision FP values for less-than.",
),
X86IntrinsicEntry::new(
"_mm_ucomile_sd",
"int _mm_ucomile_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"UCOMISD",
"Unordered compare the lower double-precision FP values for less-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_ucomigt_sd",
"int _mm_ucomigt_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"UCOMISD",
"Unordered compare the lower double-precision FP values for greater-than.",
),
X86IntrinsicEntry::new(
"_mm_ucomige_sd",
"int _mm_ucomige_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"UCOMISD",
"Unordered compare the lower double-precision FP values for greater-or-equal.",
),
X86IntrinsicEntry::new(
"_mm_ucomineq_sd",
"int _mm_ucomineq_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"UCOMISD",
"Unordered compare the lower double-precision FP values for not-equal.",
),
X86IntrinsicEntry::new(
"_mm_cvtsd_si32",
"int _mm_cvtsd_si32(__m128d a)",
X86IsaExtension::Sse2,
"CVTSD2SI",
"Convert the lower double-precision FP value to a 32-bit integer.",
),
X86IntrinsicEntry::new(
"_mm_cvtsd_si64",
"int64_t _mm_cvtsd_si64(__m128d a)",
X86IsaExtension::Sse2,
"CVTSD2SI",
"Convert the lower double-precision FP value to a 64-bit integer.",
),
X86IntrinsicEntry::new(
"_mm_cvtsd_ss",
"__m128 _mm_cvtsd_ss(__m128 a, __m128d b)",
X86IsaExtension::Sse2,
"CVTSD2SS",
"Convert the lower double-precision FP value to a single-precision FP.",
),
X86IntrinsicEntry::new(
"_mm_cvtsi32_sd",
"__m128d _mm_cvtsi32_sd(__m128d a, int b)",
X86IsaExtension::Sse2,
"CVTSI2SD",
"Convert a 32-bit integer to a double-precision FP value.",
),
X86IntrinsicEntry::new(
"_mm_cvtsi64_sd",
"__m128d _mm_cvtsi64_sd(__m128d a, int64_t b)",
X86IsaExtension::Sse2,
"CVTSI2SD",
"Convert a 64-bit integer to a double-precision FP value.",
),
X86IntrinsicEntry::new(
"_mm_cvtss_sd",
"__m128d _mm_cvtss_sd(__m128d a, __m128 b)",
X86IsaExtension::Sse2,
"CVTSS2SD",
"Convert the lower single-precision FP value to a double-precision FP.",
),
X86IntrinsicEntry::new(
"_mm_cvttpd_pi32",
"__m64 _mm_cvttpd_pi32(__m128d a)",
X86IsaExtension::Sse2,
"CVTTPD2PI",
"Convert with truncation packed double-precision FP to packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_cvttpd_epi32",
"__m128i _mm_cvttpd_epi32(__m128d a)",
X86IsaExtension::Sse2,
"CVTTPD2DQ",
"Convert with truncation packed double-precision FP to packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_cvtpd_pi32",
"__m64 _mm_cvtpd_pi32(__m128d a)",
X86IsaExtension::Sse2,
"CVTPD2PI",
"Convert packed double-precision FP to packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_cvtpd_ps",
"__m128 _mm_cvtpd_ps(__m128d a)",
X86IsaExtension::Sse2,
"CVTPD2PS",
"Convert packed double-precision FP values to single-precision FP.",
),
X86IntrinsicEntry::new(
"_mm_cvtpi32_pd",
"__m128d _mm_cvtpi32_pd(__m64 a)",
X86IsaExtension::Sse2,
"CVTPI2PD",
"Convert two packed 32-bit integers to packed double-precision FP.",
),
X86IntrinsicEntry::new(
"_mm_cvtps_pd",
"__m128d _mm_cvtps_pd(__m128 a)",
X86IsaExtension::Sse2,
"CVTPS2PD",
"Convert two packed single-precision FP to packed double-precision FP.",
),
X86IntrinsicEntry::new(
"_mm_cvttsd_si32",
"int _mm_cvttsd_si32(__m128d a)",
X86IsaExtension::Sse2,
"CVTTSD2SI",
"Convert with truncation the lower double-precision FP to a 32-bit integer.",
),
X86IntrinsicEntry::new(
"_mm_cvttsd_si64",
"int64_t _mm_cvttsd_si64(__m128d a)",
X86IsaExtension::Sse2,
"CVTTSD2SI",
"Convert with truncation the lower double-precision FP to a 64-bit integer.",
),
X86IntrinsicEntry::new(
"_mm_shuffle_pd",
"__m128d _mm_shuffle_pd(__m128d a, __m128d b, int imm8)",
X86IsaExtension::Sse2,
"SHUFPD",
"Shuffle double-precision FP values using 2-bit immediate control.",
),
X86IntrinsicEntry::new(
"_mm_unpackhi_pd",
"__m128d _mm_unpackhi_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"UNPCKHPD",
"Unpack and interleave high double-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_unpacklo_pd",
"__m128d _mm_unpacklo_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"UNPCKLPD",
"Unpack and interleave low double-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_and_pd",
"__m128d _mm_and_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"ANDPD",
"Compute the bitwise AND of two packed double-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm_andnot_pd",
"__m128d _mm_andnot_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"ANDNPD",
"Compute the bitwise AND-NOT of two packed double-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm_or_pd",
"__m128d _mm_or_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"ORPD",
"Compute the bitwise OR of two packed double-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm_xor_pd",
"__m128d _mm_xor_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse2,
"XORPD",
"Compute the bitwise XOR of two packed double-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm_set_pd",
"__m128d _mm_set_pd(double e1, double e0)",
X86IsaExtension::Sse2,
"composite",
"Set two packed double-precision FP values with the supplied values.",
),
X86IntrinsicEntry::new(
"_mm_set_sd",
"__m128d _mm_set_sd(double w)",
X86IsaExtension::Sse2,
"composite",
"Set the low double-precision FP value, zero the high element.",
),
X86IntrinsicEntry::new(
"_mm_set1_pd",
"__m128d _mm_set1_pd(double w)",
X86IsaExtension::Sse2,
"composite",
"Broadcast a double-precision FP value to both elements.",
),
X86IntrinsicEntry::new(
"_mm_setr_pd",
"__m128d _mm_setr_pd(double e1, double e0)",
X86IsaExtension::Sse2,
"composite",
"Set two packed double-precision FP values in reverse order.",
),
X86IntrinsicEntry::new(
"_mm_setzero_pd",
"__m128d _mm_setzero_pd(void)",
X86IsaExtension::Sse2,
"XORPD",
"Return a 128-bit vector with both double-precision FP elements set to zero.",
),
X86IntrinsicEntry::new(
"_mm_movemask_pd",
"int _mm_movemask_pd(__m128d a)",
X86IsaExtension::Sse2,
"MOVMSKPD",
"Create a 2-bit mask from the most significant bit of each double-precision FP element.",
),
X86IntrinsicEntry::new(
"_mm_load_si128",
"__m128i _mm_load_si128(__m128i const *mem_addr)",
X86IsaExtension::Sse2,
"MOVDQA",
"Load 128-bits of integer data from aligned memory.",
),
X86IntrinsicEntry::new(
"_mm_loadu_si128",
"__m128i _mm_loadu_si128(__m128i const *mem_addr)",
X86IsaExtension::Sse2,
"MOVDQU",
"Load 128-bits of integer data from unaligned memory.",
),
X86IntrinsicEntry::new(
"_mm_store_si128",
"void _mm_store_si128(__m128i *mem_addr, __m128i a)",
X86IsaExtension::Sse2,
"MOVDQA",
"Store 128-bits of integer data to aligned memory.",
),
X86IntrinsicEntry::new(
"_mm_storeu_si128",
"void _mm_storeu_si128(__m128i *mem_addr, __m128i a)",
X86IsaExtension::Sse2,
"MOVDQU",
"Store 128-bits of integer data to unaligned memory.",
),
X86IntrinsicEntry::new(
"_mm_stream_si128",
"void _mm_stream_si128(__m128i *mem_addr, __m128i a)",
X86IsaExtension::Sse2,
"MOVNTDQ",
"Store 128-bits of integer data using a non-temporal hint.",
),
X86IntrinsicEntry::new(
"_mm_stream_si32",
"void _mm_stream_si32(int *mem_addr, int a)",
X86IsaExtension::Sse2,
"MOVNTI",
"Store a 32-bit integer using a non-temporal hint.",
),
X86IntrinsicEntry::new(
"_mm_stream_si64",
"void _mm_stream_si64(int64_t *mem_addr, int64_t a)",
X86IsaExtension::Sse2,
"MOVNTI",
"Store a 64-bit integer using a non-temporal hint.",
),
X86IntrinsicEntry::new(
"_mm_add_epi8",
"__m128i _mm_add_epi8(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PADDB",
"Add packed 8-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_add_epi16",
"__m128i _mm_add_epi16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PADDW",
"Add packed 16-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_add_epi32",
"__m128i _mm_add_epi32(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PADDD",
"Add packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_add_epi64",
"__m128i _mm_add_epi64(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PADDQ",
"Add packed 64-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_adds_epi8",
"__m128i _mm_adds_epi8(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PADDSB",
"Add packed signed 8-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_mm_adds_epi16",
"__m128i _mm_adds_epi16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PADDSW",
"Add packed signed 16-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_mm_adds_epu8",
"__m128i _mm_adds_epu8(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PADDUSB",
"Add packed unsigned 8-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_mm_adds_epu16",
"__m128i _mm_adds_epu16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PADDUSW",
"Add packed unsigned 16-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_mm_sub_epi8",
"__m128i _mm_sub_epi8(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PSUBB",
"Subtract packed 8-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_sub_epi16",
"__m128i _mm_sub_epi16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PSUBW",
"Subtract packed 16-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_sub_epi32",
"__m128i _mm_sub_epi32(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PSUBD",
"Subtract packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_sub_epi64",
"__m128i _mm_sub_epi64(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PSUBQ",
"Subtract packed 64-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_subs_epi8",
"__m128i _mm_subs_epi8(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PSUBSB",
"Subtract packed signed 8-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_mm_subs_epi16",
"__m128i _mm_subs_epi16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PSUBSW",
"Subtract packed signed 16-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_mm_subs_epu8",
"__m128i _mm_subs_epu8(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PSUBUSB",
"Subtract packed unsigned 8-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_mm_subs_epu16",
"__m128i _mm_subs_epu16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PSUBUSW",
"Subtract packed unsigned 16-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_mm_madd_epi16",
"__m128i _mm_madd_epi16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PMADDWD",
"Multiply packed signed 16-bit integers, add adjacent pairs of 32-bit products.",
),
X86IntrinsicEntry::new(
"_mm_mulhi_epi16",
"__m128i _mm_mulhi_epi16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PMULHW",
"Multiply packed signed 16-bit integers and store high 16 bits.",
),
X86IntrinsicEntry::new(
"_mm_mullo_epi16",
"__m128i _mm_mullo_epi16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PMULLW",
"Multiply packed signed 16-bit integers and store low 16 bits.",
),
X86IntrinsicEntry::new(
"_mm_mul_epu32",
"__m128i _mm_mul_epu32(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PMULUDQ",
"Multiply two pairs of unsigned 32-bit integers into 64-bit products.",
),
X86IntrinsicEntry::new(
"_mm_cmpeq_epi8",
"__m128i _mm_cmpeq_epi8(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PCMPEQB",
"Compare packed 8-bit integers for equality.",
),
X86IntrinsicEntry::new(
"_mm_cmpeq_epi16",
"__m128i _mm_cmpeq_epi16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PCMPEQW",
"Compare packed 16-bit integers for equality.",
),
X86IntrinsicEntry::new(
"_mm_cmpeq_epi32",
"__m128i _mm_cmpeq_epi32(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PCMPEQD",
"Compare packed 32-bit integers for equality.",
),
X86IntrinsicEntry::new(
"_mm_cmpgt_epi8",
"__m128i _mm_cmpgt_epi8(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PCMPGTB",
"Compare packed signed 8-bit integers for greater-than.",
),
X86IntrinsicEntry::new(
"_mm_cmpgt_epi16",
"__m128i _mm_cmpgt_epi16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PCMPGTW",
"Compare packed signed 16-bit integers for greater-than.",
),
X86IntrinsicEntry::new(
"_mm_cmpgt_epi32",
"__m128i _mm_cmpgt_epi32(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PCMPGTD",
"Compare packed signed 32-bit integers for greater-than.",
),
X86IntrinsicEntry::new(
"_mm_and_si128",
"__m128i _mm_and_si128(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PAND",
"Compute the bitwise AND of two 128-bit integer vectors.",
),
X86IntrinsicEntry::new(
"_mm_andnot_si128",
"__m128i _mm_andnot_si128(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PANDN",
"Compute the bitwise AND-NOT of two 128-bit integer vectors.",
),
X86IntrinsicEntry::new(
"_mm_or_si128",
"__m128i _mm_or_si128(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"POR",
"Compute the bitwise OR of two 128-bit integer vectors.",
),
X86IntrinsicEntry::new(
"_mm_xor_si128",
"__m128i _mm_xor_si128(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PXOR",
"Compute the bitwise XOR of two 128-bit integer vectors.",
),
X86IntrinsicEntry::new(
"_mm_slli_epi16",
"__m128i _mm_slli_epi16(__m128i a, int imm8)",
X86IsaExtension::Sse2,
"PSLLW",
"Shift packed 16-bit integers left by immediate while shifting in zeros.",
),
X86IntrinsicEntry::new(
"_mm_slli_epi32",
"__m128i _mm_slli_epi32(__m128i a, int imm8)",
X86IsaExtension::Sse2,
"PSLLD",
"Shift packed 32-bit integers left by immediate while shifting in zeros.",
),
X86IntrinsicEntry::new(
"_mm_slli_epi64",
"__m128i _mm_slli_epi64(__m128i a, int imm8)",
X86IsaExtension::Sse2,
"PSLLQ",
"Shift packed 64-bit integers left by immediate while shifting in zeros.",
),
X86IntrinsicEntry::new(
"_mm_srli_epi16",
"__m128i _mm_srli_epi16(__m128i a, int imm8)",
X86IsaExtension::Sse2,
"PSRLW",
"Shift packed 16-bit integers right by immediate while shifting in zeros.",
),
X86IntrinsicEntry::new(
"_mm_srli_epi32",
"__m128i _mm_srli_epi32(__m128i a, int imm8)",
X86IsaExtension::Sse2,
"PSRLD",
"Shift packed 32-bit integers right by immediate while shifting in zeros.",
),
X86IntrinsicEntry::new(
"_mm_srli_epi64",
"__m128i _mm_srli_epi64(__m128i a, int imm8)",
X86IsaExtension::Sse2,
"PSRLQ",
"Shift packed 64-bit integers right by immediate while shifting in zeros.",
),
X86IntrinsicEntry::new(
"_mm_srai_epi16",
"__m128i _mm_srai_epi16(__m128i a, int imm8)",
X86IsaExtension::Sse2,
"PSRAW",
"Shift packed 16-bit integers right by immediate while shifting in sign bits.",
),
X86IntrinsicEntry::new(
"_mm_srai_epi32",
"__m128i _mm_srai_epi32(__m128i a, int imm8)",
X86IsaExtension::Sse2,
"PSRAD",
"Shift packed 32-bit integers right by immediate while shifting in sign bits.",
),
X86IntrinsicEntry::new(
"_mm_sll_epi16",
"__m128i _mm_sll_epi16(__m128i a, __m128i count)",
X86IsaExtension::Sse2,
"PSLLW",
"Shift packed 16-bit integers left by vector count while shifting in zeros.",
),
X86IntrinsicEntry::new(
"_mm_sll_epi32",
"__m128i _mm_sll_epi32(__m128i a, __m128i count)",
X86IsaExtension::Sse2,
"PSLLD",
"Shift packed 32-bit integers left by vector count while shifting in zeros.",
),
X86IntrinsicEntry::new(
"_mm_sll_epi64",
"__m128i _mm_sll_epi64(__m128i a, __m128i count)",
X86IsaExtension::Sse2,
"PSLLQ",
"Shift packed 64-bit integers left by vector count while shifting in zeros.",
),
X86IntrinsicEntry::new(
"_mm_srl_epi16",
"__m128i _mm_srl_epi16(__m128i a, __m128i count)",
X86IsaExtension::Sse2,
"PSRLW",
"Shift packed 16-bit integers right by vector count while shifting in zeros.",
),
X86IntrinsicEntry::new(
"_mm_srl_epi32",
"__m128i _mm_srl_epi32(__m128i a, __m128i count)",
X86IsaExtension::Sse2,
"PSRLD",
"Shift packed 32-bit integers right by vector count while shifting in zeros.",
),
X86IntrinsicEntry::new(
"_mm_srl_epi64",
"__m128i _mm_srl_epi64(__m128i a, __m128i count)",
X86IsaExtension::Sse2,
"PSRLQ",
"Shift packed 64-bit integers right by vector count while shifting in zeros.",
),
X86IntrinsicEntry::new(
"_mm_sra_epi16",
"__m128i _mm_sra_epi16(__m128i a, __m128i count)",
X86IsaExtension::Sse2,
"PSRAW",
"Shift packed 16-bit integers right by vector count while shifting in sign bits.",
),
X86IntrinsicEntry::new(
"_mm_sra_epi32",
"__m128i _mm_sra_epi32(__m128i a, __m128i count)",
X86IsaExtension::Sse2,
"PSRAD",
"Shift packed 32-bit integers right by vector count while shifting in sign bits.",
),
X86IntrinsicEntry::new(
"_mm_packs_epi16",
"__m128i _mm_packs_epi16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PACKSSWB",
"Pack signed 16-bit integers into 8-bit with signed saturation.",
),
X86IntrinsicEntry::new(
"_mm_packs_epi32",
"__m128i _mm_packs_epi32(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PACKSSDW",
"Pack signed 32-bit integers into 16-bit with signed saturation.",
),
X86IntrinsicEntry::new(
"_mm_packus_epi16",
"__m128i _mm_packus_epi16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PACKUSWB",
"Pack signed 16-bit integers into unsigned 8-bit with saturation.",
),
X86IntrinsicEntry::new(
"_mm_unpackhi_epi8",
"__m128i _mm_unpackhi_epi8(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PUNPCKHBW",
"Unpack and interleave high-order 8-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_unpackhi_epi16",
"__m128i _mm_unpackhi_epi16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PUNPCKHWD",
"Unpack and interleave high-order 16-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_unpackhi_epi32",
"__m128i _mm_unpackhi_epi32(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PUNPCKHDQ",
"Unpack and interleave high-order 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_unpackhi_epi64",
"__m128i _mm_unpackhi_epi64(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PUNPCKHQDQ",
"Unpack and interleave high-order 64-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_unpacklo_epi8",
"__m128i _mm_unpacklo_epi8(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PUNPCKLBW",
"Unpack and interleave low-order 8-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_unpacklo_epi16",
"__m128i _mm_unpacklo_epi16(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PUNPCKLWD",
"Unpack and interleave low-order 16-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_unpacklo_epi32",
"__m128i _mm_unpacklo_epi32(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PUNPCKLDQ",
"Unpack and interleave low-order 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_unpacklo_epi64",
"__m128i _mm_unpacklo_epi64(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PUNPCKLQDQ",
"Unpack and interleave low-order 64-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_movepi64_pi64",
"__m64 _mm_movepi64_pi64(__m128i a)",
X86IsaExtension::Sse2,
"MOVDQ2Q",
"Move the low 64 bits of an XMM register to an MMX register.",
),
X86IntrinsicEntry::new(
"_mm_movpi64_epi64",
"__m128i _mm_movpi64_epi64(__m64 a)",
X86IsaExtension::Sse2,
"MOVQ2DQ",
"Move the lower 64 bits of an MMX register to the low of an XMM, zero upper.",
),
X86IntrinsicEntry::new(
"_mm_move_epi64",
"__m128i _mm_move_epi64(__m128i a)",
X86IsaExtension::Sse2,
"MOVQ",
"Move the lower 64-bit integer, zero the upper 64 bits.",
),
X86IntrinsicEntry::new(
"_mm_shuffle_epi32",
"__m128i _mm_shuffle_epi32(__m128i a, int imm8)",
X86IsaExtension::Sse2,
"PSHUFD",
"Shuffle 32-bit integers using 8-bit immediate control.",
),
X86IntrinsicEntry::new(
"_mm_shufflehi_epi16",
"__m128i _mm_shufflehi_epi16(__m128i a, int imm8)",
X86IsaExtension::Sse2,
"PSHUFHW",
"Shuffle high-order 16-bit integers using 8-bit immediate, preserve low.",
),
X86IntrinsicEntry::new(
"_mm_shufflelo_epi16",
"__m128i _mm_shufflelo_epi16(__m128i a, int imm8)",
X86IsaExtension::Sse2,
"PSHUFLW",
"Shuffle low-order 16-bit integers using 8-bit immediate, preserve high.",
),
X86IntrinsicEntry::new(
"_mm_cvtepi32_pd",
"__m128d _mm_cvtepi32_pd(__m128i a)",
X86IsaExtension::Sse2,
"CVTDQ2PD",
"Convert two packed 32-bit integers to packed double-precision FP.",
),
X86IntrinsicEntry::new(
"_mm_cvtepi32_ps",
"__m128 _mm_cvtepi32_ps(__m128i a)",
X86IsaExtension::Sse2,
"CVTDQ2PS",
"Convert four packed 32-bit integers to packed single-precision FP.",
),
X86IntrinsicEntry::new(
"_mm_cvtpd_epi32",
"__m128i _mm_cvtpd_epi32(__m128d a)",
X86IsaExtension::Sse2,
"CVTPD2DQ",
"Convert packed double-precision FP to packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_cvtps_epi32",
"__m128i _mm_cvtps_epi32(__m128 a)",
X86IsaExtension::Sse2,
"CVTPS2DQ",
"Convert four packed single-precision FP to packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_cvttps_epi32",
"__m128i _mm_cvttps_epi32(__m128 a)",
X86IsaExtension::Sse2,
"CVTTPS2DQ",
"Convert with truncation packed single-precision FP to packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_set_epi32",
"__m128i _mm_set_epi32(int i3, int i2, int i1, int i0)",
X86IsaExtension::Sse2,
"composite",
"Set four packed 32-bit integers with the supplied values.",
),
X86IntrinsicEntry::new(
"_mm_set_epi16",
"__m128i _mm_set_epi16(short w7, short w6, short w5, short w4, short w3, short w2, short w1, short w0)",
X86IsaExtension::Sse2,
"composite",
"Set eight packed 16-bit integers with the supplied values.",
),
X86IntrinsicEntry::new(
"_mm_set_epi8",
"__m128i _mm_set_epi8(char b15, char b14, ..., char b0)",
X86IsaExtension::Sse2,
"composite",
"Set sixteen packed 8-bit integers with the supplied values.",
),
X86IntrinsicEntry::new(
"_mm_set_epi64x",
"__m128i _mm_set_epi64x(int64_t q1, int64_t q0)",
X86IsaExtension::Sse2,
"composite",
"Set two packed 64-bit integers with the supplied values.",
),
X86IntrinsicEntry::new(
"_mm_set_epi64",
"__m128i _mm_set_epi64(__m64 q1, __m64 q0)",
X86IsaExtension::Sse2,
"composite",
"Set two packed 64-bit integers with the supplied MMX values.",
),
X86IntrinsicEntry::new(
"_mm_setr_epi32",
"__m128i _mm_setr_epi32(int i3, int i2, int i1, int i0)",
X86IsaExtension::Sse2,
"composite",
"Set four packed 32-bit integers in reverse order.",
),
X86IntrinsicEntry::new(
"_mm_setr_epi16",
"__m128i _mm_setr_epi16(short w7, short w6, ..., short w0)",
X86IsaExtension::Sse2,
"composite",
"Set eight packed 16-bit integers in reverse order.",
),
X86IntrinsicEntry::new(
"_mm_setr_epi8",
"__m128i _mm_setr_epi8(char b15, char b14, ..., char b0)",
X86IsaExtension::Sse2,
"composite",
"Set sixteen packed 8-bit integers in reverse order.",
),
X86IntrinsicEntry::new(
"_mm_setr_epi64",
"__m128i _mm_setr_epi64(__m64 q1, __m64 q0)",
X86IsaExtension::Sse2,
"composite",
"Set two packed 64-bit integers in reverse order.",
),
X86IntrinsicEntry::new(
"_mm_set1_epi32",
"__m128i _mm_set1_epi32(int i)",
X86IsaExtension::Sse2,
"PSHUFD",
"Broadcast a 32-bit integer to all four elements.",
),
X86IntrinsicEntry::new(
"_mm_set1_epi16",
"__m128i _mm_set1_epi16(short w)",
X86IsaExtension::Sse2,
"PSHUFLW+PSHUFHW",
"Broadcast a 16-bit integer to all eight elements.",
),
X86IntrinsicEntry::new(
"_mm_set1_epi8",
"__m128i _mm_set1_epi8(char b)",
X86IsaExtension::Sse2,
"composite",
"Broadcast an 8-bit integer to all sixteen elements.",
),
X86IntrinsicEntry::new(
"_mm_set1_epi64x",
"__m128i _mm_set1_epi64x(int64_t q)",
X86IsaExtension::Sse2,
"composite",
"Broadcast a 64-bit integer to both elements.",
),
X86IntrinsicEntry::new(
"_mm_set1_epi64",
"__m128i _mm_set1_epi64(__m64 q)",
X86IsaExtension::Sse2,
"composite",
"Broadcast a 64-bit integer to both elements.",
),
X86IntrinsicEntry::new(
"_mm_setzero_si128",
"__m128i _mm_setzero_si128(void)",
X86IsaExtension::Sse2,
"PXOR",
"Return a 128-bit vector with all integer elements set to zero.",
),
X86IntrinsicEntry::new(
"_mm_extract_epi16",
"int _mm_extract_epi16(__m128i a, int imm8)",
X86IsaExtension::Sse2,
"PEXTRW",
"Extract a 16-bit integer from the 128-bit register at immediate index.",
),
X86IntrinsicEntry::new(
"_mm_insert_epi16",
"__m128i _mm_insert_epi16(__m128i a, int i, int imm8)",
X86IsaExtension::Sse2,
"PINSRW",
"Insert a 16-bit integer into the 128-bit register at immediate index.",
),
X86IntrinsicEntry::new(
"_mm_movemask_epi8",
"int _mm_movemask_epi8(__m128i a)",
X86IsaExtension::Sse2,
"PMOVMSKB",
"Create a 16-bit mask from the most significant bit of each byte.",
),
X86IntrinsicEntry::new(
"_mm_sad_epu8",
"__m128i _mm_sad_epu8(__m128i a, __m128i b)",
X86IsaExtension::Sse2,
"PSADBW",
"Compute the sum of absolute differences of unsigned 8-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_clflush",
"void _mm_clflush(void const *p)",
X86IsaExtension::Sse2,
"CLFLUSH",
"Invalidate and flush the cache line that contains the linear address p.",
),
X86IntrinsicEntry::new(
"_mm_lfence",
"void _mm_lfence(void)",
X86IsaExtension::Sse2,
"LFENCE",
"Guarantee that every load preceding this fence is globally visible before any load that follows.",
),
X86IntrinsicEntry::new(
"_mm_mfence",
"void _mm_mfence(void)",
X86IsaExtension::Sse2,
"MFENCE",
"Guarantee that every load and store preceding this fence is globally visible before any load or store that follows.",
),
X86IntrinsicEntry::new(
"_mm_pause",
"void _mm_pause(void)",
X86IsaExtension::Sse2,
"PAUSE",
"Provide a hint to the processor to improve spin-wait loop performance.",
),
X86IntrinsicEntry::new(
"_mm_stream_pd",
"void _mm_stream_pd(double *mem_addr, __m128d a)",
X86IsaExtension::Sse2,
"MOVNTPD",
"Store 128-bits of double-precision FP using a non-temporal hint.",
),
X86IntrinsicEntry::new(
"_mm_maskmove_si64",
"void _mm_maskmove_si64(__m64 d, __m64 n, char *p)",
X86IsaExtension::Sse2,
"MASKMOVQ",
"Conditionally store selected bytes of d to address p using byte mask n.",
),
]
}
fn sse3_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm_addsub_ps",
"__m128 _mm_addsub_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse3,
"ADDSUBPS",
"Alternately add and subtract packed single-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_addsub_pd",
"__m128d _mm_addsub_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse3,
"ADDSUBPD",
"Alternately add and subtract packed double-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_hadd_ps",
"__m128 _mm_hadd_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse3,
"HADDPS",
"Horizontally add adjacent pairs of single-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_hadd_pd",
"__m128d _mm_hadd_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse3,
"HADDPD",
"Horizontally add packed double-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_hsub_ps",
"__m128 _mm_hsub_ps(__m128 a, __m128 b)",
X86IsaExtension::Sse3,
"HSUBPS",
"Horizontally subtract adjacent pairs of single-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_hsub_pd",
"__m128d _mm_hsub_pd(__m128d a, __m128d b)",
X86IsaExtension::Sse3,
"HSUBPD",
"Horizontally subtract packed double-precision FP values.",
),
X86IntrinsicEntry::new(
"_mm_moveldup_ps",
"__m128 _mm_moveldup_ps(__m128 a)",
X86IsaExtension::Sse3,
"MOVSLDUP",
"Duplicate even-indexed single-precision FP values into odd positions.",
),
X86IntrinsicEntry::new(
"_mm_movehdup_ps",
"__m128 _mm_movehdup_ps(__m128 a)",
X86IsaExtension::Sse3,
"MOVSHDUP",
"Duplicate odd-indexed single-precision FP values into even positions.",
),
X86IntrinsicEntry::new(
"_mm_movedup_pd",
"__m128d _mm_movedup_pd(__m128d a)",
X86IsaExtension::Sse3,
"MOVDDUP",
"Duplicate the lower double-precision FP value to both elements.",
),
X86IntrinsicEntry::new(
"_mm_lddqu_si128",
"__m128i _mm_lddqu_si128(__m128i const *mem_addr)",
X86IsaExtension::Sse3,
"LDDQU",
"Load 128-bits of integer data from unaligned memory with special handling.",
),
X86IntrinsicEntry::new(
"_mm_loaddup_pd",
"__m128d _mm_loaddup_pd(double const *mem_addr)",
X86IsaExtension::Sse3,
"MOVDDUP",
"Load a double-precision FP value and duplicate to both elements.",
),
X86IntrinsicEntry::new(
"_mm_monitor",
"void _mm_monitor(void const *p, unsigned extensions, unsigned hints)",
X86IsaExtension::Sse3,
"MONITOR",
"Set up an address range to be monitored by MWAIT.",
),
X86IntrinsicEntry::new(
"_mm_mwait",
"void _mm_mwait(unsigned extensions, unsigned hints)",
X86IsaExtension::Sse3,
"MWAIT",
"Wait until the MONITOR range is written or until a specific state.",
),
]
}
fn ssse3_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm_abs_epi8",
"__m128i _mm_abs_epi8(__m128i a)",
X86IsaExtension::Ssse3,
"PABSB",
"Compute the absolute value of packed 8-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_abs_epi16",
"__m128i _mm_abs_epi16(__m128i a)",
X86IsaExtension::Ssse3,
"PABSW",
"Compute the absolute value of packed 16-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_abs_epi32",
"__m128i _mm_abs_epi32(__m128i a)",
X86IsaExtension::Ssse3,
"PABSD",
"Compute the absolute value of packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_abs_pi8",
"__m64 _mm_abs_pi8(__m64 a)",
X86IsaExtension::Ssse3,
"PABSB",
"Compute the absolute value of packed 8-bit integers (MMX).",
),
X86IntrinsicEntry::new(
"_mm_abs_pi16",
"__m64 _mm_abs_pi16(__m64 a)",
X86IsaExtension::Ssse3,
"PABSW",
"Compute the absolute value of packed 16-bit integers (MMX).",
),
X86IntrinsicEntry::new(
"_mm_abs_pi32",
"__m64 _mm_abs_pi32(__m64 a)",
X86IsaExtension::Ssse3,
"PABSD",
"Compute the absolute value of packed 32-bit integers (MMX).",
),
X86IntrinsicEntry::new(
"_mm_sign_epi8",
"__m128i _mm_sign_epi8(__m128i a, __m128i b)",
X86IsaExtension::Ssse3,
"PSIGNB",
"Negate/zero/preserve packed 8-bit integers based on sign of b.",
),
X86IntrinsicEntry::new(
"_mm_sign_epi16",
"__m128i _mm_sign_epi16(__m128i a, __m128i b)",
X86IsaExtension::Ssse3,
"PSIGNW",
"Negate/zero/preserve packed 16-bit integers based on sign of b.",
),
X86IntrinsicEntry::new(
"_mm_sign_epi32",
"__m128i _mm_sign_epi32(__m128i a, __m128i b)",
X86IsaExtension::Ssse3,
"PSIGND",
"Negate/zero/preserve packed 32-bit integers based on sign of b.",
),
X86IntrinsicEntry::new(
"_mm_sign_pi8",
"__m64 _mm_sign_pi8(__m64 a, __m64 b)",
X86IsaExtension::Ssse3,
"PSIGNB",
"Negate/zero/preserve packed 8-bit integers based on sign (MMX).",
),
X86IntrinsicEntry::new(
"_mm_sign_pi16",
"__m64 _mm_sign_pi16(__m64 a, __m64 b)",
X86IsaExtension::Ssse3,
"PSIGNW",
"Negate/zero/preserve packed 16-bit integers based on sign (MMX).",
),
X86IntrinsicEntry::new(
"_mm_sign_pi32",
"__m64 _mm_sign_pi32(__m64 a, __m64 b)",
X86IsaExtension::Ssse3,
"PSIGND",
"Negate/zero/preserve packed 32-bit integers based on sign (MMX).",
),
X86IntrinsicEntry::new(
"_mm_shuffle_epi8",
"__m128i _mm_shuffle_epi8(__m128i a, __m128i b)",
X86IsaExtension::Ssse3,
"PSHUFB",
"Shuffle packed 8-bit integers according to b; set to zero if msb set.",
),
X86IntrinsicEntry::new(
"_mm_shuffle_pi8",
"__m64 _mm_shuffle_pi8(__m64 a, __m64 b)",
X86IsaExtension::Ssse3,
"PSHUFB",
"Shuffle packed 8-bit integers according to b (MMX).",
),
X86IntrinsicEntry::new(
"_mm_alignr_epi8",
"__m128i _mm_alignr_epi8(__m128i a, __m128i b, int imm8)",
X86IsaExtension::Ssse3,
"PALIGNR",
"Concatenate a and b, right-shift by byte offset, extract 16-byte result.",
),
X86IntrinsicEntry::new(
"_mm_alignr_pi8",
"__m64 _mm_alignr_pi8(__m64 a, __m64 b, int imm8)",
X86IsaExtension::Ssse3,
"PALIGNR",
"Concatenate a and b, right-shift by byte offset (MMX).",
),
X86IntrinsicEntry::new(
"_mm_hadd_epi16",
"__m128i _mm_hadd_epi16(__m128i a, __m128i b)",
X86IsaExtension::Ssse3,
"PHADDW",
"Horizontally add adjacent pairs of 16-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_hadd_epi32",
"__m128i _mm_hadd_epi32(__m128i a, __m128i b)",
X86IsaExtension::Ssse3,
"PHADDD",
"Horizontally add adjacent pairs of 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_hadds_epi16",
"__m128i _mm_hadds_epi16(__m128i a, __m128i b)",
X86IsaExtension::Ssse3,
"PHADDSW",
"Horizontally add adjacent pairs of 16-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_mm_hadd_pi16",
"__m64 _mm_hadd_pi16(__m64 a, __m64 b)",
X86IsaExtension::Ssse3,
"PHADDW",
"Horizontally add adjacent pairs of 16-bit integers (MMX).",
),
X86IntrinsicEntry::new(
"_mm_hadd_pi32",
"__m64 _mm_hadd_pi32(__m64 a, __m64 b)",
X86IsaExtension::Ssse3,
"PHADDD",
"Horizontally add adjacent pairs of 32-bit integers (MMX).",
),
X86IntrinsicEntry::new(
"_mm_hsub_epi16",
"__m128i _mm_hsub_epi16(__m128i a, __m128i b)",
X86IsaExtension::Ssse3,
"PHSUBW",
"Horizontally subtract adjacent pairs of 16-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_hsub_epi32",
"__m128i _mm_hsub_epi32(__m128i a, __m128i b)",
X86IsaExtension::Ssse3,
"PHSUBD",
"Horizontally subtract adjacent pairs of 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_hsubs_epi16",
"__m128i _mm_hsubs_epi16(__m128i a, __m128i b)",
X86IsaExtension::Ssse3,
"PHSUBSW",
"Horizontally subtract adjacent pairs of 16-bit integers with saturation.",
),
X86IntrinsicEntry::new(
"_mm_maddubs_epi16",
"__m128i _mm_maddubs_epi16(__m128i a, __m128i b)",
X86IsaExtension::Ssse3,
"PMADDUBSW",
"Multiply packed unsigned 8-bit integers by signed 8-bit, add adjacent pairs.",
),
X86IntrinsicEntry::new(
"_mm_maddubs_pi16",
"__m64 _mm_maddubs_pi16(__m64 a, __m64 b)",
X86IsaExtension::Ssse3,
"PMADDUBSW",
"Multiply unsigned 8-bit by signed 8-bit, add adjacent pairs (MMX).",
),
X86IntrinsicEntry::new(
"_mm_mulhrs_epi16",
"__m128i _mm_mulhrs_epi16(__m128i a, __m128i b)",
X86IsaExtension::Ssse3,
"PMULHRSW",
"Multiply packed signed 16-bit integers and store rounded scaled high result.",
),
X86IntrinsicEntry::new(
"_mm_mulhrs_pi16",
"__m64 _mm_mulhrs_pi16(__m64 a, __m64 b)",
X86IsaExtension::Ssse3,
"PMULHRSW",
"Multiply packed signed 16-bit integers, store rounded high result (MMX).",
),
]
}
fn sse41_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm_blend_ps",
"__m128 _mm_blend_ps(__m128 a, __m128 b, const int imm8)",
X86IsaExtension::Sse41,
"BLENDPS",
"Blend packed single-precision FP values using immediate mask.",
),
X86IntrinsicEntry::new(
"_mm_blend_pd",
"__m128d _mm_blend_pd(__m128d a, __m128d b, const int imm8)",
X86IsaExtension::Sse41,
"BLENDPD",
"Blend packed double-precision FP values using immediate mask.",
),
X86IntrinsicEntry::new(
"_mm_blendv_ps",
"__m128 _mm_blendv_ps(__m128 a, __m128 b, __m128 mask)",
X86IsaExtension::Sse41,
"BLENDVPS",
"Blend packed single-precision FP values using variable mask.",
),
X86IntrinsicEntry::new(
"_mm_blendv_pd",
"__m128d _mm_blendv_pd(__m128d a, __m128d b, __m128d mask)",
X86IsaExtension::Sse41,
"BLENDVPD",
"Blend packed double-precision FP values using variable mask.",
),
X86IntrinsicEntry::new(
"_mm_blend_epi16",
"__m128i _mm_blend_epi16(__m128i a, __m128i b, const int imm8)",
X86IsaExtension::Sse41,
"PBLENDW",
"Blend packed 16-bit integers using immediate mask.",
),
X86IntrinsicEntry::new(
"_mm_blendv_epi8",
"__m128i _mm_blendv_epi8(__m128i a, __m128i b, __m128i mask)",
X86IsaExtension::Sse41,
"PBLENDVB",
"Blend packed 8-bit integers using variable mask.",
),
X86IntrinsicEntry::new(
"_mm_round_ps",
"__m128 _mm_round_ps(__m128 a, int rounding)",
X86IsaExtension::Sse41,
"ROUNDPS",
"Round packed single-precision FP values using the specified rounding mode.",
),
X86IntrinsicEntry::new(
"_mm_round_pd",
"__m128d _mm_round_pd(__m128d a, int rounding)",
X86IsaExtension::Sse41,
"ROUNDPD",
"Round packed double-precision FP values using the specified rounding mode.",
),
X86IntrinsicEntry::new(
"_mm_round_ss",
"__m128 _mm_round_ss(__m128 a, __m128 b, int rounding)",
X86IsaExtension::Sse41,
"ROUNDSS",
"Round the lower single-precision FP value, pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_round_sd",
"__m128d _mm_round_sd(__m128d a, __m128d b, int rounding)",
X86IsaExtension::Sse41,
"ROUNDSD",
"Round the lower double-precision FP value, pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_ceil_ps",
"__m128 _mm_ceil_ps(__m128 a)",
X86IsaExtension::Sse41,
"ROUNDPS",
"Round packed single-precision FP up toward +infinity (ceiling).",
),
X86IntrinsicEntry::new(
"_mm_ceil_pd",
"__m128d _mm_ceil_pd(__m128d a)",
X86IsaExtension::Sse41,
"ROUNDPD",
"Round packed double-precision FP up toward +infinity (ceiling).",
),
X86IntrinsicEntry::new(
"_mm_ceil_ss",
"__m128 _mm_ceil_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse41,
"ROUNDSS",
"Round the lower single-precision FP up toward +infinity (ceiling).",
),
X86IntrinsicEntry::new(
"_mm_ceil_sd",
"__m128d _mm_ceil_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse41,
"ROUNDSD",
"Round the lower double-precision FP up toward +infinity (ceiling).",
),
X86IntrinsicEntry::new(
"_mm_floor_ps",
"__m128 _mm_floor_ps(__m128 a)",
X86IsaExtension::Sse41,
"ROUNDPS",
"Round packed single-precision FP down toward -infinity (floor).",
),
X86IntrinsicEntry::new(
"_mm_floor_pd",
"__m128d _mm_floor_pd(__m128d a)",
X86IsaExtension::Sse41,
"ROUNDPD",
"Round packed double-precision FP down toward -infinity (floor).",
),
X86IntrinsicEntry::new(
"_mm_floor_ss",
"__m128 _mm_floor_ss(__m128 a, __m128 b)",
X86IsaExtension::Sse41,
"ROUNDSS",
"Round the lower single-precision FP down toward -infinity (floor).",
),
X86IntrinsicEntry::new(
"_mm_floor_sd",
"__m128d _mm_floor_sd(__m128d a, __m128d b)",
X86IsaExtension::Sse41,
"ROUNDSD",
"Round the lower double-precision FP down toward -infinity (floor).",
),
X86IntrinsicEntry::new(
"_mm_dp_ps",
"__m128 _mm_dp_ps(__m128 a, __m128 b, const int imm8)",
X86IsaExtension::Sse41,
"DPPS",
"Compute dot product of packed single-precision FP with selectable elements.",
),
X86IntrinsicEntry::new(
"_mm_dp_pd",
"__m128d _mm_dp_pd(__m128d a, __m128d b, const int imm8)",
X86IsaExtension::Sse41,
"DPPD",
"Compute dot product of packed double-precision FP with selectable elements.",
),
X86IntrinsicEntry::new(
"_mm_extract_ps",
"int _mm_extract_ps(__m128 a, const int imm8)",
X86IsaExtension::Sse41,
"EXTRACTPS",
"Extract a single-precision FP value or the FP representation of an integer.",
),
X86IntrinsicEntry::new(
"_mm_insert_ps",
"__m128 _mm_insert_ps(__m128 a, __m128 b, const int imm8)",
X86IsaExtension::Sse41,
"INSERTPS",
"Insert a single-precision FP value into a packed FP vector with selectable zeroing.",
),
X86IntrinsicEntry::new(
"_mm_mullo_epi32",
"__m128i _mm_mullo_epi32(__m128i a, __m128i b)",
X86IsaExtension::Sse41,
"PMULLD",
"Multiply packed 32-bit integers and store the low 32 bits of the product.",
),
X86IntrinsicEntry::new(
"_mm_mul_epi32",
"__m128i _mm_mul_epi32(__m128i a, __m128i b)",
X86IsaExtension::Sse41,
"PMULDQ",
"Multiply two pairs of signed 32-bit integers into 64-bit products.",
),
X86IntrinsicEntry::new(
"_mm_mullo_epi16",
"__m128i _mm_mullo_epi16(__m128i a, __m128i b)",
X86IsaExtension::Sse41,
"PMULLW",
"Multiply packed 16-bit integers, store low result (alias for SSE2).",
),
X86IntrinsicEntry::new(
"_mm_min_epi8",
"__m128i _mm_min_epi8(__m128i a, __m128i b)",
X86IsaExtension::Sse41,
"PMINSB",
"Compare packed signed 8-bit integers and return the minimum.",
),
X86IntrinsicEntry::new(
"_mm_min_epi32",
"__m128i _mm_min_epi32(__m128i a, __m128i b)",
X86IsaExtension::Sse41,
"PMINSD",
"Compare packed signed 32-bit integers and return the minimum.",
),
X86IntrinsicEntry::new(
"_mm_min_epu16",
"__m128i _mm_min_epu16(__m128i a, __m128i b)",
X86IsaExtension::Sse41,
"PMINUW",
"Compare packed unsigned 16-bit integers and return the minimum.",
),
X86IntrinsicEntry::new(
"_mm_min_epu32",
"__m128i _mm_min_epu32(__m128i a, __m128i b)",
X86IsaExtension::Sse41,
"PMINUD",
"Compare packed unsigned 32-bit integers and return the minimum.",
),
X86IntrinsicEntry::new(
"_mm_max_epi8",
"__m128i _mm_max_epi8(__m128i a, __m128i b)",
X86IsaExtension::Sse41,
"PMAXSB",
"Compare packed signed 8-bit integers and return the maximum.",
),
X86IntrinsicEntry::new(
"_mm_max_epi32",
"__m128i _mm_max_epi32(__m128i a, __m128i b)",
X86IsaExtension::Sse41,
"PMAXSD",
"Compare packed signed 32-bit integers and return the maximum.",
),
X86IntrinsicEntry::new(
"_mm_max_epu16",
"__m128i _mm_max_epu16(__m128i a, __m128i b)",
X86IsaExtension::Sse41,
"PMAXUW",
"Compare packed unsigned 16-bit integers and return the maximum.",
),
X86IntrinsicEntry::new(
"_mm_max_epu32",
"__m128i _mm_max_epu32(__m128i a, __m128i b)",
X86IsaExtension::Sse41,
"PMAXUD",
"Compare packed unsigned 32-bit integers and return the maximum.",
),
X86IntrinsicEntry::new(
"_mm_cmpeq_epi64",
"__m128i _mm_cmpeq_epi64(__m128i a, __m128i b)",
X86IsaExtension::Sse41,
"PCMPEQQ",
"Compare packed 64-bit integers for equality.",
),
X86IntrinsicEntry::new(
"_mm_packus_epi32",
"__m128i _mm_packus_epi32(__m128i a, __m128i b)",
X86IsaExtension::Sse41,
"PACKUSDW",
"Pack signed 32-bit integers into unsigned 16-bit with saturation.",
),
X86IntrinsicEntry::new(
"_mm_mpsadbw_epu8",
"__m128i _mm_mpsadbw_epu8(__m128i a, __m128i b, const int imm8)",
X86IsaExtension::Sse41,
"MPSADBW",
"Compute multiple packed sums of absolute differences on unsigned bytes.",
),
X86IntrinsicEntry::new(
"_mm_testz_si128",
"int _mm_testz_si128(__m128i a, __m128i mask)",
X86IsaExtension::Sse41,
"PTEST",
"Compute bitwise AND, set ZF if all bits are zero.",
),
X86IntrinsicEntry::new(
"_mm_testc_si128",
"int _mm_testc_si128(__m128i a, __m128i mask)",
X86IsaExtension::Sse41,
"PTEST",
"Compute bitwise AND-NOT, set CF if all bits are zero.",
),
X86IntrinsicEntry::new(
"_mm_testnzc_si128",
"int _mm_testnzc_si128(__m128i a, __m128i mask)",
X86IsaExtension::Sse41,
"PTEST",
"Compute AND and AND-NOT, set ZF=0 and CF=0 if any bit true.",
),
X86IntrinsicEntry::new(
"_mm_test_all_zeros",
"int _mm_test_all_zeros(__m128i mask, __m128i val)",
X86IsaExtension::Sse41,
"PTEST",
"Return 1 if (val & mask) == 0, else return 0.",
),
X86IntrinsicEntry::new(
"_mm_test_all_ones",
"int _mm_test_all_ones(__m128i val)",
X86IsaExtension::Sse41,
"PTEST",
"Return 1 if val is all ones, else return 0.",
),
X86IntrinsicEntry::new(
"_mm_test_mix_ones_zeros",
"int _mm_test_mix_ones_zeros(__m128i mask, __m128i val)",
X86IsaExtension::Sse41,
"PTEST",
"Return 1 if neither all-zeros nor all-ones condition holds.",
),
X86IntrinsicEntry::new(
"_mm_stream_load_si128",
"__m128i _mm_stream_load_si128(__m128i *mem_addr)",
X86IsaExtension::Sse41,
"MOVNTDQA",
"Load 128-bits of integer data from memory using a non-temporal hint.",
),
X86IntrinsicEntry::new(
"_mm_extract_epi8",
"int _mm_extract_epi8(__m128i a, const int imm8)",
X86IsaExtension::Sse41,
"PEXTRB",
"Extract an 8-bit integer from the 128-bit register at immediate index.",
),
X86IntrinsicEntry::new(
"_mm_extract_epi32",
"int _mm_extract_epi32(__m128i a, const int imm8)",
X86IsaExtension::Sse41,
"PEXTRD",
"Extract a 32-bit integer from the 128-bit register at immediate index.",
),
X86IntrinsicEntry::new(
"_mm_extract_epi64",
"int64_t _mm_extract_epi64(__m128i a, const int imm8)",
X86IsaExtension::Sse41,
"PEXTRQ",
"Extract a 64-bit integer from the 128-bit register at immediate index.",
),
X86IntrinsicEntry::new(
"_mm_insert_epi8",
"__m128i _mm_insert_epi8(__m128i a, int i, const int imm8)",
X86IsaExtension::Sse41,
"PINSRB",
"Insert an 8-bit integer into the 128-bit register at immediate index.",
),
X86IntrinsicEntry::new(
"_mm_insert_epi32",
"__m128i _mm_insert_epi32(__m128i a, int i, const int imm8)",
X86IsaExtension::Sse41,
"PINSRD",
"Insert a 32-bit integer into the 128-bit register at immediate index.",
),
X86IntrinsicEntry::new(
"_mm_insert_epi64",
"__m128i _mm_insert_epi64(__m128i a, int64_t i, const int imm8)",
X86IsaExtension::Sse41,
"PINSRQ",
"Insert a 64-bit integer into the 128-bit register at immediate index.",
),
X86IntrinsicEntry::new(
"_mm_cvtepi8_epi16",
"__m128i _mm_cvtepi8_epi16(__m128i a)",
X86IsaExtension::Sse41,
"PMOVSXBW",
"Sign-extend packed 8-bit integers to packed 16-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_cvtepi8_epi32",
"__m128i _mm_cvtepi8_epi32(__m128i a)",
X86IsaExtension::Sse41,
"PMOVSXBD",
"Sign-extend packed 8-bit integers to packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_cvtepi16_epi32",
"__m128i _mm_cvtepi16_epi32(__m128i a)",
X86IsaExtension::Sse41,
"PMOVSXWD",
"Sign-extend packed 16-bit integers to packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_cvtepu8_epi16",
"__m128i _mm_cvtepu8_epi16(__m128i a)",
X86IsaExtension::Sse41,
"PMOVZXBW",
"Zero-extend packed 8-bit integers to packed 16-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_cvtepu8_epi32",
"__m128i _mm_cvtepu8_epi32(__m128i a)",
X86IsaExtension::Sse41,
"PMOVZXBD",
"Zero-extend packed 8-bit integers to packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_cvtepu16_epi32",
"__m128i _mm_cvtepu16_epi32(__m128i a)",
X86IsaExtension::Sse41,
"PMOVZXWD",
"Zero-extend packed 16-bit integers to packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_cvtepi32_epi64",
"__m128i _mm_cvtepi32_epi64(__m128i a)",
X86IsaExtension::Sse41,
"PMOVSXDQ",
"Sign-extend packed 32-bit integers to packed 64-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_cvtepu32_epi64",
"__m128i _mm_cvtepu32_epi64(__m128i a)",
X86IsaExtension::Sse41,
"PMOVZXDQ",
"Zero-extend packed 32-bit integers to packed 64-bit integers.",
),
]
}
fn sse42_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm_cmpistri",
"int _mm_cmpistri(__m128i a, __m128i b, const int imm8)",
X86IsaExtension::Sse42,
"PCMPISTRI",
"Compare packed strings with implicit lengths, return index in ECX.",
),
X86IntrinsicEntry::new(
"_mm_cmpistrm",
"__m128i _mm_cmpistrm(__m128i a, __m128i b, const int imm8)",
X86IsaExtension::Sse42,
"PCMPISTRM",
"Compare packed strings with implicit lengths, return mask in XMM0.",
),
X86IntrinsicEntry::new(
"_mm_cmpestri",
"int _mm_cmpestri(__m128i a, int la, __m128i b, int lb, const int imm8)",
X86IsaExtension::Sse42,
"PCMPESTRI",
"Compare packed strings with explicit lengths, return index in ECX.",
),
X86IntrinsicEntry::new(
"_mm_cmpestrm",
"__m128i _mm_cmpestrm(__m128i a, int la, __m128i b, int lb, const int imm8)",
X86IsaExtension::Sse42,
"PCMPESTRM",
"Compare packed strings with explicit lengths, return mask in XMM0.",
),
X86IntrinsicEntry::new(
"_mm_crc32_u8",
"unsigned int _mm_crc32_u8(unsigned int crc, unsigned char v)",
X86IsaExtension::Sse42,
"CRC32",
"Accumulate CRC32C (Castagnoli) value for an 8-bit data element.",
),
X86IntrinsicEntry::new(
"_mm_crc32_u16",
"unsigned int _mm_crc32_u16(unsigned int crc, unsigned short v)",
X86IsaExtension::Sse42,
"CRC32",
"Accumulate CRC32C (Castagnoli) value for a 16-bit data element.",
),
X86IntrinsicEntry::new(
"_mm_crc32_u32",
"unsigned int _mm_crc32_u32(unsigned int crc, unsigned int v)",
X86IsaExtension::Sse42,
"CRC32",
"Accumulate CRC32C (Castagnoli) value for a 32-bit data element.",
),
X86IntrinsicEntry::new(
"_mm_crc32_u64",
"unsigned int64_t _mm_crc32_u64(unsigned int64_t crc, unsigned int64_t v)",
X86IsaExtension::Sse42,
"CRC32",
"Accumulate CRC32C (Castagnoli) value for a 64-bit data element.",
),
X86IntrinsicEntry::new(
"_mm_popcnt_u32",
"int _mm_popcnt_u32(unsigned int v)",
X86IsaExtension::Sse42,
"POPCNT",
"Count the number of bits set to 1 in a 32-bit integer.",
),
X86IntrinsicEntry::new(
"_mm_popcnt_u64",
"int64_t _mm_popcnt_u64(unsigned int64_t v)",
X86IsaExtension::Sse42,
"POPCNT",
"Count the number of bits set to 1 in a 64-bit integer.",
),
]
}
fn avx_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm256_load_ps",
"__m256 _mm256_load_ps(float const *mem_addr)",
X86IsaExtension::Avx,
"VMOVAPS",
"Load 256-bits (eight packed single-precision FP values) from aligned memory.",
),
X86IntrinsicEntry::new(
"_mm256_loadu_ps",
"__m256 _mm256_loadu_ps(float const *mem_addr)",
X86IsaExtension::Avx,
"VMOVUPS",
"Load 256-bits (eight packed single-precision FP values) from unaligned memory.",
),
X86IntrinsicEntry::new(
"_mm256_load_pd",
"__m256d _mm256_load_pd(double const *mem_addr)",
X86IsaExtension::Avx,
"VMOVAPD",
"Load 256-bits (four packed double-precision FP values) from aligned memory.",
),
X86IntrinsicEntry::new(
"_mm256_loadu_pd",
"__m256d _mm256_loadu_pd(double const *mem_addr)",
X86IsaExtension::Avx,
"VMOVUPD",
"Load 256-bits (four packed double-precision FP values) from unaligned memory.",
),
X86IntrinsicEntry::new(
"_mm256_load_si256",
"__m256i _mm256_load_si256(__m256i const *mem_addr)",
X86IsaExtension::Avx,
"VMOVDQA",
"Load 256-bits of integer data from aligned memory.",
),
X86IntrinsicEntry::new(
"_mm256_loadu_si256",
"__m256i _mm256_loadu_si256(__m256i const *mem_addr)",
X86IsaExtension::Avx,
"VMOVDQU",
"Load 256-bits of integer data from unaligned memory.",
),
X86IntrinsicEntry::new(
"_mm256_store_ps",
"void _mm256_store_ps(float *mem_addr, __m256 a)",
X86IsaExtension::Avx,
"VMOVAPS",
"Store 256-bits (eight packed single-precision FP values) to aligned memory.",
),
X86IntrinsicEntry::new(
"_mm256_storeu_ps",
"void _mm256_storeu_ps(float *mem_addr, __m256 a)",
X86IsaExtension::Avx,
"VMOVUPS",
"Store 256-bits (eight packed single-precision FP values) to unaligned memory.",
),
X86IntrinsicEntry::new(
"_mm256_store_pd",
"void _mm256_store_pd(double *mem_addr, __m256d a)",
X86IsaExtension::Avx,
"VMOVAPD",
"Store 256-bits (four packed double-precision FP values) to aligned memory.",
),
X86IntrinsicEntry::new(
"_mm256_storeu_pd",
"void _mm256_storeu_pd(double *mem_addr, __m256d a)",
X86IsaExtension::Avx,
"VMOVUPD",
"Store 256-bits (four packed double-precision FP values) to unaligned memory.",
),
X86IntrinsicEntry::new(
"_mm256_store_si256",
"void _mm256_store_si256(__m256i *mem_addr, __m256i a)",
X86IsaExtension::Avx,
"VMOVDQA",
"Store 256-bits of integer data to aligned memory.",
),
X86IntrinsicEntry::new(
"_mm256_storeu_si256",
"void _mm256_storeu_si256(__m256i *mem_addr, __m256i a)",
X86IsaExtension::Avx,
"VMOVDQU",
"Store 256-bits of integer data to unaligned memory.",
),
X86IntrinsicEntry::new(
"_mm256_setzero_ps",
"__m256 _mm256_setzero_ps(void)",
X86IsaExtension::Avx,
"VXORPS",
"Return a 256-bit vector with all single-precision FP elements set to zero.",
),
X86IntrinsicEntry::new(
"_mm256_setzero_pd",
"__m256d _mm256_setzero_pd(void)",
X86IsaExtension::Avx,
"VXORPD",
"Return a 256-bit vector with all double-precision FP elements set to zero.",
),
X86IntrinsicEntry::new(
"_mm256_setzero_si256",
"__m256i _mm256_setzero_si256(void)",
X86IsaExtension::Avx,
"VPXOR",
"Return a 256-bit vector with all integer elements set to zero.",
),
X86IntrinsicEntry::new(
"_mm256_set1_ps",
"__m256 _mm256_set1_ps(float a)",
X86IsaExtension::Avx,
"composite",
"Broadcast a single-precision FP value to all eight elements.",
),
X86IntrinsicEntry::new(
"_mm256_set1_pd",
"__m256d _mm256_set1_pd(double a)",
X86IsaExtension::Avx,
"composite",
"Broadcast a double-precision FP value to all four elements.",
),
X86IntrinsicEntry::new(
"_mm256_set_ps",
"__m256 _mm256_set_ps(float e7, float e6, ..., float e0)",
X86IsaExtension::Avx,
"composite",
"Set eight packed single-precision FP values with the supplied values.",
),
X86IntrinsicEntry::new(
"_mm256_set_pd",
"__m256d _mm256_set_pd(double e3, double e2, double e1, double e0)",
X86IsaExtension::Avx,
"composite",
"Set four packed double-precision FP values with the supplied values.",
),
X86IntrinsicEntry::new(
"_mm256_add_ps",
"__m256 _mm256_add_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VADDPS",
"Add packed single-precision FP (256-bit) values.",
),
X86IntrinsicEntry::new(
"_mm256_add_pd",
"__m256d _mm256_add_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VADDPD",
"Add packed double-precision FP (256-bit) values.",
),
X86IntrinsicEntry::new(
"_mm256_sub_ps",
"__m256 _mm256_sub_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VSUBPS",
"Subtract packed single-precision FP (256-bit) values.",
),
X86IntrinsicEntry::new(
"_mm256_sub_pd",
"__m256d _mm256_sub_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VSUBPD",
"Subtract packed double-precision FP (256-bit) values.",
),
X86IntrinsicEntry::new(
"_mm256_mul_ps",
"__m256 _mm256_mul_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VMULPS",
"Multiply packed single-precision FP (256-bit) values.",
),
X86IntrinsicEntry::new(
"_mm256_mul_pd",
"__m256d _mm256_mul_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VMULPD",
"Multiply packed double-precision FP (256-bit) values.",
),
X86IntrinsicEntry::new(
"_mm256_div_ps",
"__m256 _mm256_div_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VDIVPS",
"Divide packed single-precision FP (256-bit) values.",
),
X86IntrinsicEntry::new(
"_mm256_div_pd",
"__m256d _mm256_div_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VDIVPD",
"Divide packed double-precision FP (256-bit) values.",
),
X86IntrinsicEntry::new(
"_mm256_sqrt_ps",
"__m256 _mm256_sqrt_ps(__m256 a)",
X86IsaExtension::Avx,
"VSQRTPS",
"Compute the square root of packed single-precision FP (256-bit) values.",
),
X86IntrinsicEntry::new(
"_mm256_sqrt_pd",
"__m256d _mm256_sqrt_pd(__m256d a)",
X86IsaExtension::Avx,
"VSQRTPD",
"Compute the square root of packed double-precision FP (256-bit) values.",
),
X86IntrinsicEntry::new(
"_mm256_rcp_ps",
"__m256 _mm256_rcp_ps(__m256 a)",
X86IsaExtension::Avx,
"VRCPPS",
"Compute the approximate reciprocal of packed single-precision FP (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_rsqrt_ps",
"__m256 _mm256_rsqrt_ps(__m256 a)",
X86IsaExtension::Avx,
"VRSQRTPS",
"Compute the approximate reciprocal square root of packed single-precision FP (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_min_ps",
"__m256 _mm256_min_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VMINPS",
"Compare packed single-precision FP (256-bit) and return the minimum.",
),
X86IntrinsicEntry::new(
"_mm256_min_pd",
"__m256d _mm256_min_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VMINPD",
"Compare packed double-precision FP (256-bit) and return the minimum.",
),
X86IntrinsicEntry::new(
"_mm256_max_ps",
"__m256 _mm256_max_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VMAXPS",
"Compare packed single-precision FP (256-bit) and return the maximum.",
),
X86IntrinsicEntry::new(
"_mm256_max_pd",
"__m256d _mm256_max_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VMAXPD",
"Compare packed double-precision FP (256-bit) and return the maximum.",
),
X86IntrinsicEntry::new(
"_mm256_cmpeq_ps",
"__m256 _mm256_cmpeq_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VCMPPS",
"Compare packed single-precision FP (256-bit) for equality.",
),
X86IntrinsicEntry::new(
"_mm256_cmplt_ps",
"__m256 _mm256_cmplt_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VCMPPS",
"Compare packed single-precision FP (256-bit) for less-than.",
),
X86IntrinsicEntry::new(
"_mm256_cmp_ps",
"__m256 _mm256_cmp_ps(__m256 a, __m256 b, const int imm8)",
X86IsaExtension::Avx,
"VCMPPS",
"Compare packed single-precision FP (256-bit) using immediate predicate.",
),
X86IntrinsicEntry::new(
"_mm256_cmp_pd",
"__m256d _mm256_cmp_pd(__m256d a, __m256d b, const int imm8)",
X86IsaExtension::Avx,
"VCMPPD",
"Compare packed double-precision FP (256-bit) using immediate predicate.",
),
X86IntrinsicEntry::new(
"_mm256_and_ps",
"__m256 _mm256_and_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VANDPS",
"Compute the bitwise AND of two 256-bit single-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm256_and_pd",
"__m256d _mm256_and_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VANDPD",
"Compute the bitwise AND of two 256-bit double-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm256_andnot_ps",
"__m256 _mm256_andnot_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VANDNPS",
"Compute the bitwise AND-NOT of two 256-bit single-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm256_andnot_pd",
"__m256d _mm256_andnot_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VANDNPD",
"Compute the bitwise AND-NOT of two 256-bit double-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm256_or_ps",
"__m256 _mm256_or_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VORPS",
"Compute the bitwise OR of two 256-bit single-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm256_or_pd",
"__m256d _mm256_or_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VORPD",
"Compute the bitwise OR of two 256-bit double-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm256_xor_ps",
"__m256 _mm256_xor_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VXORPS",
"Compute the bitwise XOR of two 256-bit single-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm256_xor_pd",
"__m256d _mm256_xor_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VXORPD",
"Compute the bitwise XOR of two 256-bit double-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm256_shuffle_ps",
"__m256 _mm256_shuffle_ps(__m256 a, __m256 b, const int imm8)",
X86IsaExtension::Avx,
"VSHUFPS",
"Shuffle single-precision FP values in 128-bit lanes using immediate control.",
),
X86IntrinsicEntry::new(
"_mm256_shuffle_pd",
"__m256d _mm256_shuffle_pd(__m256d a, __m256d b, const int imm8)",
X86IsaExtension::Avx,
"VSHUFPD",
"Shuffle double-precision FP values in 128-bit lanes using immediate control.",
),
X86IntrinsicEntry::new(
"_mm256_unpackhi_ps",
"__m256 _mm256_unpackhi_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VUNPCKHPS",
"Unpack and interleave high single-precision FP (256-bit) in 128-bit lanes.",
),
X86IntrinsicEntry::new(
"_mm256_unpacklo_ps",
"__m256 _mm256_unpacklo_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VUNPCKLPS",
"Unpack and interleave low single-precision FP (256-bit) in 128-bit lanes.",
),
X86IntrinsicEntry::new(
"_mm256_unpackhi_pd",
"__m256d _mm256_unpackhi_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VUNPCKHPD",
"Unpack and interleave high double-precision FP (256-bit) in 128-bit lanes.",
),
X86IntrinsicEntry::new(
"_mm256_unpacklo_pd",
"__m256d _mm256_unpacklo_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VUNPCKLPD",
"Unpack and interleave low double-precision FP (256-bit) in 128-bit lanes.",
),
X86IntrinsicEntry::new(
"_mm256_blend_ps",
"__m256 _mm256_blend_ps(__m256 a, __m256 b, const int imm8)",
X86IsaExtension::Avx,
"VBLENDPS",
"Blend packed single-precision FP (256-bit) using immediate mask.",
),
X86IntrinsicEntry::new(
"_mm256_blend_pd",
"__m256d _mm256_blend_pd(__m256d a, __m256d b, const int imm8)",
X86IsaExtension::Avx,
"VBLENDPD",
"Blend packed double-precision FP (256-bit) using immediate mask.",
),
X86IntrinsicEntry::new(
"_mm256_blendv_ps",
"__m256 _mm256_blendv_ps(__m256 a, __m256 b, __m256 mask)",
X86IsaExtension::Avx,
"VBLENDVPS",
"Blend packed single-precision FP (256-bit) using variable mask.",
),
X86IntrinsicEntry::new(
"_mm256_blendv_pd",
"__m256d _mm256_blendv_pd(__m256d a, __m256d b, __m256d mask)",
X86IsaExtension::Avx,
"VBLENDVPD",
"Blend packed double-precision FP (256-bit) using variable mask.",
),
X86IntrinsicEntry::new(
"_mm256_permute_ps",
"__m256 _mm256_permute_ps(__m256 a, const int imm8)",
X86IsaExtension::Avx,
"VPERMILPS",
"Permute single-precision FP (256-bit) within 128-bit lanes using immediate.",
),
X86IntrinsicEntry::new(
"_mm256_permute_pd",
"__m256d _mm256_permute_pd(__m256d a, int imm8)",
X86IsaExtension::Avx,
"VPERMILPD",
"Permute double-precision FP (256-bit) within 128-bit lanes using immediate.",
),
X86IntrinsicEntry::new(
"_mm256_permutevar_ps",
"__m256 _mm256_permutevar_ps(__m256 a, __m256i b)",
X86IsaExtension::Avx,
"VPERMILPS",
"Permute single-precision FP (256-bit) within 128-bit lanes using vector control.",
),
X86IntrinsicEntry::new(
"_mm256_permutevar_pd",
"__m256d _mm256_permutevar_pd(__m256d a, __m256i b)",
X86IsaExtension::Avx,
"VPERMILPD",
"Permute double-precision FP (256-bit) within 128-bit lanes using vector control.",
),
X86IntrinsicEntry::new(
"_mm256_permute2f128_ps",
"__m256 _mm256_permute2f128_ps(__m256 a, __m256 b, int imm8)",
X86IsaExtension::Avx,
"VPERM2F128",
"Shuffle 128-bit lanes of two 256-bit single-precision FP sources.",
),
X86IntrinsicEntry::new(
"_mm256_permute2f128_pd",
"__m256d _mm256_permute2f128_pd(__m256d a, __m256d b, int imm8)",
X86IsaExtension::Avx,
"VPERM2F128",
"Shuffle 128-bit lanes of two 256-bit double-precision FP sources.",
),
X86IntrinsicEntry::new(
"_mm256_permute2f128_si256",
"__m256i _mm256_permute2f128_si256(__m256i a, __m256i b, int imm8)",
X86IsaExtension::Avx,
"VPERM2F128",
"Shuffle 128-bit lanes of two 256-bit integer sources.",
),
X86IntrinsicEntry::new(
"_mm256_castps128_ps256",
"__m256 _mm256_castps128_ps256(__m128 a)",
X86IsaExtension::Avx,
"composite",
"Cast a 128-bit single-precision FP vector to a 256-bit type (upper undefined).",
),
X86IntrinsicEntry::new(
"_mm256_castpd128_pd256",
"__m256d _mm256_castpd128_pd256(__m128d a)",
X86IsaExtension::Avx,
"composite",
"Cast a 128-bit double-precision FP vector to a 256-bit type (upper undefined).",
),
X86IntrinsicEntry::new(
"_mm256_castsi128_si256",
"__m256i _mm256_castsi128_si256(__m128i a)",
X86IsaExtension::Avx,
"composite",
"Cast a 128-bit integer vector to a 256-bit type (upper undefined).",
),
X86IntrinsicEntry::new(
"_mm256_castps256_ps128",
"__m128 _mm256_castps256_ps128(__m256 a)",
X86IsaExtension::Avx,
"composite",
"Cast the low 128 bits of a 256-bit single-precision FP vector to __m128.",
),
X86IntrinsicEntry::new(
"_mm256_castpd256_pd128",
"__m128d _mm256_castpd256_pd128(__m256d a)",
X86IsaExtension::Avx,
"composite",
"Cast the low 128 bits of a 256-bit double-precision FP vector to __m128d.",
),
X86IntrinsicEntry::new(
"_mm256_castsi256_si128",
"__m128i _mm256_castsi256_si128(__m256i a)",
X86IsaExtension::Avx,
"composite",
"Cast the low 128 bits of a 256-bit integer vector to __m128i.",
),
X86IntrinsicEntry::new(
"_mm256_cvtpd_ps",
"__m128 _mm256_cvtpd_ps(__m256d a)",
X86IsaExtension::Avx,
"VCVTPD2PS",
"Convert packed double-precision FP (256-bit) to single-precision FP (128-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cvtps_pd",
"__m256d _mm256_cvtps_pd(__m128 a)",
X86IsaExtension::Avx,
"VCVTPS2PD",
"Convert packed single-precision FP (128-bit) to double-precision FP (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cvtepi32_pd",
"__m256d _mm256_cvtepi32_pd(__m128i a)",
X86IsaExtension::Avx,
"VCVTDQ2PD",
"Convert packed 32-bit integers (128-bit) to double-precision FP (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cvtepi32_ps",
"__m256 _mm256_cvtepi32_ps(__m256i a)",
X86IsaExtension::Avx,
"VCVTDQ2PS",
"Convert packed 32-bit integers (256-bit) to single-precision FP (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cvtpd_epi32",
"__m128i _mm256_cvtpd_epi32(__m256d a)",
X86IsaExtension::Avx,
"VCVTPD2DQ",
"Convert packed double-precision FP (256-bit) to 32-bit integers (128-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cvtps_epi32",
"__m256i _mm256_cvtps_epi32(__m256 a)",
X86IsaExtension::Avx,
"VCVTPS2DQ",
"Convert packed single-precision FP (256-bit) to 32-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cvttpd_epi32",
"__m128i _mm256_cvttpd_epi32(__m256d a)",
X86IsaExtension::Avx,
"VCVTTPD2DQ",
"Convert with truncation packed double-precision FP (256-bit) to 32-bit integers (128-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cvttps_epi32",
"__m256i _mm256_cvttps_epi32(__m256 a)",
X86IsaExtension::Avx,
"VCVTTPS2DQ",
"Convert with truncation packed single-precision FP (256-bit) to 32-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_stream_ps",
"void _mm256_stream_ps(float *mem_addr, __m256 a)",
X86IsaExtension::Avx,
"VMOVNTPS",
"Store 256-bits to memory using a non-temporal hint.",
),
X86IntrinsicEntry::new(
"_mm256_stream_pd",
"void _mm256_stream_pd(double *mem_addr, __m256d a)",
X86IsaExtension::Avx,
"VMOVNTPD",
"Store 256-bits of double-precision FP using a non-temporal hint.",
),
X86IntrinsicEntry::new(
"_mm256_stream_si256",
"void _mm256_stream_si256(__m256i *mem_addr, __m256i a)",
X86IsaExtension::Avx,
"VMOVNTDQ",
"Store 256-bits of integer data using a non-temporal hint.",
),
X86IntrinsicEntry::new(
"_mm256_movemask_ps",
"int _mm256_movemask_ps(__m256 a)",
X86IsaExtension::Avx,
"VMOVMSKPS",
"Create an 8-bit mask from the most significant bit of each 32-bit FP element.",
),
X86IntrinsicEntry::new(
"_mm256_movemask_pd",
"int _mm256_movemask_pd(__m256d a)",
X86IsaExtension::Avx,
"VMOVMSKPD",
"Create a 4-bit mask from the most significant bit of each 64-bit FP element.",
),
X86IntrinsicEntry::new(
"_mm256_extractf128_ps",
"__m128 _mm256_extractf128_ps(__m256 a, const int imm8)",
X86IsaExtension::Avx,
"VEXTRACTF128",
"Extract a 128-bit lane of single-precision FP from a 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_extractf128_pd",
"__m128d _mm256_extractf128_pd(__m256d a, const int imm8)",
X86IsaExtension::Avx,
"VEXTRACTF128",
"Extract a 128-bit lane of double-precision FP from a 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_extractf128_si256",
"__m128i _mm256_extractf128_si256(__m256i a, const int imm8)",
X86IsaExtension::Avx,
"VEXTRACTF128",
"Extract a 128-bit lane of integer data from a 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_insertf128_ps",
"__m256 _mm256_insertf128_ps(__m256 a, __m128 b, int imm8)",
X86IsaExtension::Avx,
"VINSERTF128",
"Insert a 128-bit lane of single-precision FP into a 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_insertf128_pd",
"__m256d _mm256_insertf128_pd(__m256d a, __m128d b, int imm8)",
X86IsaExtension::Avx,
"VINSERTF128",
"Insert a 128-bit lane of double-precision FP into a 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_insertf128_si256",
"__m256i _mm256_insertf128_si256(__m256i a, __m128i b, int imm8)",
X86IsaExtension::Avx,
"VINSERTF128",
"Insert a 128-bit lane of integer data into a 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_broadcast_ss",
"__m256 _mm256_broadcast_ss(float const *mem_addr)",
X86IsaExtension::Avx,
"VBROADCASTSS",
"Broadcast a single-precision FP from memory to all elements of a 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_broadcast_sd",
"__m256d _mm256_broadcast_sd(double const *mem_addr)",
X86IsaExtension::Avx,
"VBROADCASTSD",
"Broadcast a double-precision FP from memory to all elements of a 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_broadcast_ps",
"__m256 _mm256_broadcast_ps(__m128 const *mem_addr)",
X86IsaExtension::Avx,
"VBROADCASTF128",
"Broadcast a 128-bit single-precision FP value from memory to both lanes.",
),
X86IntrinsicEntry::new(
"_mm256_dp_ps",
"__m256 _mm256_dp_ps(__m256 a, __m256 b, const int imm8)",
X86IsaExtension::Avx,
"VDPPS",
"Compute dot product of packed single-precision FP (256-bit) with selectable elements.",
),
X86IntrinsicEntry::new(
"_mm256_round_ps",
"__m256 _mm256_round_ps(__m256 a, int rounding)",
X86IsaExtension::Avx,
"VROUNDPS",
"Round packed single-precision FP (256-bit) using the specified rounding mode.",
),
X86IntrinsicEntry::new(
"_mm256_round_pd",
"__m256d _mm256_round_pd(__m256d a, int rounding)",
X86IsaExtension::Avx,
"VROUNDPD",
"Round packed double-precision FP (256-bit) using the specified rounding mode.",
),
X86IntrinsicEntry::new(
"_mm256_ceil_ps",
"__m256 _mm256_ceil_ps(__m256 a)",
X86IsaExtension::Avx,
"VROUNDPS",
"Round packed single-precision FP (256-bit) up toward +infinity (ceiling).",
),
X86IntrinsicEntry::new(
"_mm256_floor_ps",
"__m256 _mm256_floor_ps(__m256 a)",
X86IsaExtension::Avx,
"VROUNDPS",
"Round packed single-precision FP (256-bit) down toward -infinity (floor).",
),
X86IntrinsicEntry::new(
"_mm256_testz_ps",
"int _mm256_testz_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VTESTPS",
"Compute bitwise AND; set ZF if result is all zeros.",
),
X86IntrinsicEntry::new(
"_mm256_testz_pd",
"int _mm256_testz_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VTESTPD",
"Compute bitwise AND of packed double-precision FP; set ZF if all zeros.",
),
X86IntrinsicEntry::new(
"_mm256_testz_si256",
"int _mm256_testz_si256(__m256i a, __m256i b)",
X86IsaExtension::Avx,
"VPTEST",
"Compute bitwise AND of packed integers; set ZF if all zeros.",
),
X86IntrinsicEntry::new(
"_mm256_testc_ps",
"int _mm256_testc_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VTESTPS",
"Compute AND-NOT; set CF if result is all zeros.",
),
X86IntrinsicEntry::new(
"_mm256_testc_pd",
"int _mm256_testc_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VTESTPD",
"Compute AND-NOT of packed double-precision FP; set CF if all zeros.",
),
X86IntrinsicEntry::new(
"_mm256_maskload_ps",
"__m256 _mm256_maskload_ps(float const *mem_addr, __m256i mask)",
X86IsaExtension::Avx,
"VMASKMOVPS",
"Load packed single-precision FP values from memory using mask.",
),
X86IntrinsicEntry::new(
"_mm256_maskload_pd",
"__m256d _mm256_maskload_pd(double const *mem_addr, __m256i mask)",
X86IsaExtension::Avx,
"VMASKMOVPD",
"Load packed double-precision FP values from memory using mask.",
),
X86IntrinsicEntry::new(
"_mm256_maskstore_ps",
"void _mm256_maskstore_ps(float *mem_addr, __m256i mask, __m256 a)",
X86IsaExtension::Avx,
"VMASKMOVPS",
"Store packed single-precision FP values to memory using mask.",
),
X86IntrinsicEntry::new(
"_mm256_maskstore_pd",
"void _mm256_maskstore_pd(double *mem_addr, __m256i mask, __m256d a)",
X86IsaExtension::Avx,
"VMASKMOVPD",
"Store packed double-precision FP values to memory using mask.",
),
X86IntrinsicEntry::new(
"_mm256_hadd_ps",
"__m256 _mm256_hadd_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VHADDPS",
"Horizontally add adjacent pairs of single-precision FP (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_hsub_ps",
"__m256 _mm256_hsub_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VHSUBPS",
"Horizontally subtract adjacent pairs of single-precision FP (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_hadd_pd",
"__m256d _mm256_hadd_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VHADDPD",
"Horizontally add packed double-precision FP (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_hsub_pd",
"__m256d _mm256_hsub_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VHSUBPD",
"Horizontally subtract packed double-precision FP (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_addsub_ps",
"__m256 _mm256_addsub_ps(__m256 a, __m256 b)",
X86IsaExtension::Avx,
"VADDSUBPS",
"Alternately add and subtract packed single-precision FP (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_addsub_pd",
"__m256d _mm256_addsub_pd(__m256d a, __m256d b)",
X86IsaExtension::Avx,
"VADDSUBPD",
"Alternately add and subtract packed double-precision FP (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_movedup_pd",
"__m256d _mm256_movedup_pd(__m256d a)",
X86IsaExtension::Avx,
"VMOVDDUP",
"Duplicate the even-indexed double-precision FP values across 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_moveldup_ps",
"__m256 _mm256_moveldup_ps(__m256 a)",
X86IsaExtension::Avx,
"VMOVSLDUP",
"Duplicate even-indexed single-precision FP values into odd positions (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_movehdup_ps",
"__m256 _mm256_movehdup_ps(__m256 a)",
X86IsaExtension::Avx,
"VMOVSHDUP",
"Duplicate odd-indexed single-precision FP values into even positions (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_zeroall",
"void _mm256_zeroall(void)",
X86IsaExtension::Avx,
"VZEROALL",
"Zero all YMM registers and restore the FP state to non-AVX mode.",
),
X86IntrinsicEntry::new(
"_mm256_zeroupper",
"void _mm256_zeroupper(void)",
X86IsaExtension::Avx,
"VZEROUPPER",
"Zero the upper 128 bits of all YMM registers.",
),
X86IntrinsicEntry::new(
"_mm256_lddqu_si256",
"__m256i _mm256_lddqu_si256(__m256i const *mem_addr)",
X86IsaExtension::Avx,
"VLDDQU",
"Load 256-bits of integer data from unaligned memory with special handling.",
),
]
}
fn avx2_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm256_add_epi8",
"__m256i _mm256_add_epi8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPADDB",
"Add packed 8-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_add_epi16",
"__m256i _mm256_add_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPADDW",
"Add packed 16-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_add_epi32",
"__m256i _mm256_add_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPADDD",
"Add packed 32-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_add_epi64",
"__m256i _mm256_add_epi64(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPADDQ",
"Add packed 64-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_sub_epi8",
"__m256i _mm256_sub_epi8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPSUBB",
"Subtract packed 8-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_sub_epi16",
"__m256i _mm256_sub_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPSUBW",
"Subtract packed 16-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_sub_epi32",
"__m256i _mm256_sub_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPSUBD",
"Subtract packed 32-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_sub_epi64",
"__m256i _mm256_sub_epi64(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPSUBQ",
"Subtract packed 64-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_adds_epi8",
"__m256i _mm256_adds_epi8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPADDSB",
"Add packed signed 8-bit integers with saturation (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_adds_epi16",
"__m256i _mm256_adds_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPADDSW",
"Add packed signed 16-bit integers with saturation (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_adds_epu8",
"__m256i _mm256_adds_epu8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPADDUSB",
"Add packed unsigned 8-bit integers with saturation (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_adds_epu16",
"__m256i _mm256_adds_epu16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPADDUSW",
"Add packed unsigned 16-bit integers with saturation (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_subs_epi8",
"__m256i _mm256_subs_epi8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPSUBSB",
"Subtract packed signed 8-bit integers with saturation (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_subs_epi16",
"__m256i _mm256_subs_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPSUBSW",
"Subtract packed signed 16-bit integers with saturation (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_madd_epi16",
"__m256i _mm256_madd_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMADDWD",
"Multiply and add packed 16-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_maddubs_epi16",
"__m256i _mm256_maddubs_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMADDUBSW",
"Multiply unsigned/signed 8-bit integers and add adjacent pairs (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_mulhi_epi16",
"__m256i _mm256_mulhi_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMULHW",
"Multiply packed signed 16-bit integers and store high 16 bits (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_mullo_epi16",
"__m256i _mm256_mullo_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMULLW",
"Multiply packed signed 16-bit integers and store low 16 bits (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_mullo_epi32",
"__m256i _mm256_mullo_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMULLD",
"Multiply packed 32-bit integers and store low 32 bits (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_mul_epi32",
"__m256i _mm256_mul_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMULDQ",
"Multiply two pairs of signed 32-bit integers into 64-bit products (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_mul_epu32",
"__m256i _mm256_mul_epu32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMULUDQ",
"Multiply unsigned 32-bit integers into 64-bit products (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_mulhrs_epi16",
"__m256i _mm256_mulhrs_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMULHRSW",
"Multiply packed signed 16-bit integers and store rounded scaled high result.",
),
X86IntrinsicEntry::new(
"_mm256_cmpeq_epi8",
"__m256i _mm256_cmpeq_epi8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPCMPEQB",
"Compare packed 8-bit integers for equality (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cmpeq_epi16",
"__m256i _mm256_cmpeq_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPCMPEQW",
"Compare packed 16-bit integers for equality (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cmpeq_epi32",
"__m256i _mm256_cmpeq_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPCMPEQD",
"Compare packed 32-bit integers for equality (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cmpeq_epi64",
"__m256i _mm256_cmpeq_epi64(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPCMPEQQ",
"Compare packed 64-bit integers for equality (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cmpgt_epi8",
"__m256i _mm256_cmpgt_epi8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPCMPGTB",
"Compare packed signed 8-bit integers for greater-than (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cmpgt_epi16",
"__m256i _mm256_cmpgt_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPCMPGTW",
"Compare packed signed 16-bit integers for greater-than (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cmpgt_epi32",
"__m256i _mm256_cmpgt_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPCMPGTD",
"Compare packed signed 32-bit integers for greater-than (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cmpgt_epi64",
"__m256i _mm256_cmpgt_epi64(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPCMPGTQ",
"Compare packed signed 64-bit integers for greater-than (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_and_si256",
"__m256i _mm256_and_si256(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPAND",
"Compute the bitwise AND of two 256-bit integer vectors.",
),
X86IntrinsicEntry::new(
"_mm256_andnot_si256",
"__m256i _mm256_andnot_si256(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPANDN",
"Compute the bitwise AND-NOT of two 256-bit integer vectors.",
),
X86IntrinsicEntry::new(
"_mm256_or_si256",
"__m256i _mm256_or_si256(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPOR",
"Compute the bitwise OR of two 256-bit integer vectors.",
),
X86IntrinsicEntry::new(
"_mm256_xor_si256",
"__m256i _mm256_xor_si256(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPXOR",
"Compute the bitwise XOR of two 256-bit integer vectors.",
),
X86IntrinsicEntry::new(
"_mm256_slli_epi16",
"__m256i _mm256_slli_epi16(__m256i a, int imm8)",
X86IsaExtension::Avx2,
"VPSLLW",
"Shift packed 16-bit integers left by immediate (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_slli_epi32",
"__m256i _mm256_slli_epi32(__m256i a, int imm8)",
X86IsaExtension::Avx2,
"VPSLLD",
"Shift packed 32-bit integers left by immediate (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_slli_epi64",
"__m256i _mm256_slli_epi64(__m256i a, int imm8)",
X86IsaExtension::Avx2,
"VPSLLQ",
"Shift packed 64-bit integers left by immediate (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_srli_epi16",
"__m256i _mm256_srli_epi16(__m256i a, int imm8)",
X86IsaExtension::Avx2,
"VPSRLW",
"Shift packed 16-bit integers right logically by immediate (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_srli_epi32",
"__m256i _mm256_srli_epi32(__m256i a, int imm8)",
X86IsaExtension::Avx2,
"VPSRLD",
"Shift packed 32-bit integers right logically by immediate (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_srli_epi64",
"__m256i _mm256_srli_epi64(__m256i a, int imm8)",
X86IsaExtension::Avx2,
"VPSRLQ",
"Shift packed 64-bit integers right logically by immediate (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_srai_epi16",
"__m256i _mm256_srai_epi16(__m256i a, int imm8)",
X86IsaExtension::Avx2,
"VPSRAW",
"Shift packed 16-bit integers right arithmetically by immediate (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_srai_epi32",
"__m256i _mm256_srai_epi32(__m256i a, int imm8)",
X86IsaExtension::Avx2,
"VPSRAD",
"Shift packed 32-bit integers right arithmetically by immediate (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_sllv_epi32",
"__m256i _mm256_sllv_epi32(__m256i a, __m256i count)",
X86IsaExtension::Avx2,
"VPSLLVD",
"Shift packed 32-bit integers left by variable count (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_sllv_epi64",
"__m256i _mm256_sllv_epi64(__m256i a, __m256i count)",
X86IsaExtension::Avx2,
"VPSLLVQ",
"Shift packed 64-bit integers left by variable count (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_srlv_epi32",
"__m256i _mm256_srlv_epi32(__m256i a, __m256i count)",
X86IsaExtension::Avx2,
"VPSRLVD",
"Shift packed 32-bit integers right logically by variable count (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_srlv_epi64",
"__m256i _mm256_srlv_epi64(__m256i a, __m256i count)",
X86IsaExtension::Avx2,
"VPSRLVQ",
"Shift packed 64-bit integers right logically by variable count (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_srav_epi32",
"__m256i _mm256_srav_epi32(__m256i a, __m256i count)",
X86IsaExtension::Avx2,
"VPSRAVD",
"Shift packed 32-bit integers right arithmetically by variable count (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_packs_epi16",
"__m256i _mm256_packs_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPACKSSWB",
"Pack signed 16-bit integers into 8-bit with signed saturation (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_packs_epi32",
"__m256i _mm256_packs_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPACKSSDW",
"Pack signed 32-bit integers into 16-bit with signed saturation (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_packus_epi16",
"__m256i _mm256_packus_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPACKUSWB",
"Pack signed 16-bit integers into unsigned 8-bit with saturation (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_packus_epi32",
"__m256i _mm256_packus_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPACKUSDW",
"Pack signed 32-bit integers into unsigned 16-bit with saturation (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_unpackhi_epi8",
"__m256i _mm256_unpackhi_epi8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPUNPCKHBW",
"Unpack and interleave high-order 8-bit integers (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_unpackhi_epi16",
"__m256i _mm256_unpackhi_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPUNPCKHWD",
"Unpack and interleave high-order 16-bit integers (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_unpackhi_epi32",
"__m256i _mm256_unpackhi_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPUNPCKHDQ",
"Unpack and interleave high-order 32-bit integers (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_unpackhi_epi64",
"__m256i _mm256_unpackhi_epi64(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPUNPCKHQDQ",
"Unpack and interleave high-order 64-bit integers (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_unpacklo_epi8",
"__m256i _mm256_unpacklo_epi8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPUNPCKLBW",
"Unpack and interleave low-order 8-bit integers (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_unpacklo_epi16",
"__m256i _mm256_unpacklo_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPUNPCKLWD",
"Unpack and interleave low-order 16-bit integers (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_unpacklo_epi32",
"__m256i _mm256_unpacklo_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPUNPCKLDQ",
"Unpack and interleave low-order 32-bit integers (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_unpacklo_epi64",
"__m256i _mm256_unpacklo_epi64(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPUNPCKLQDQ",
"Unpack and interleave low-order 64-bit integers (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_shuffle_epi8",
"__m256i _mm256_shuffle_epi8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPSHUFB",
"Shuffle packed 8-bit integers according to b (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_shuffle_epi32",
"__m256i _mm256_shuffle_epi32(__m256i a, const int imm8)",
X86IsaExtension::Avx2,
"VPSHUFD",
"Shuffle 32-bit integers using immediate control (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_shufflehi_epi16",
"__m256i _mm256_shufflehi_epi16(__m256i a, const int imm8)",
X86IsaExtension::Avx2,
"VPSHUFHW",
"Shuffle high-order 16-bit integers using immediate, preserve low (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_shufflelo_epi16",
"__m256i _mm256_shufflelo_epi16(__m256i a, const int imm8)",
X86IsaExtension::Avx2,
"VPSHUFLW",
"Shuffle low-order 16-bit integers using immediate, preserve high (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_permute4x64_epi64",
"__m256i _mm256_permute4x64_epi64(__m256i a, const int imm8)",
X86IsaExtension::Avx2,
"VPERMQ",
"Permute 64-bit integers across 256-bit lanes using immediate control.",
),
X86IntrinsicEntry::new(
"_mm256_permutevar8x32_epi32",
"__m256i _mm256_permutevar8x32_epi32(__m256i a, __m256i idx)",
X86IsaExtension::Avx2,
"VPERMD",
"Permute 32-bit integers across 256-bit lanes using vector indexes.",
),
X86IntrinsicEntry::new(
"_mm256_permute4x64_pd",
"__m256d _mm256_permute4x64_pd(__m256d a, const int imm8)",
X86IsaExtension::Avx2,
"VPERMPD",
"Permute double-precision FP across 256-bit lanes using immediate control.",
),
X86IntrinsicEntry::new(
"_mm256_blend_epi32",
"__m256i _mm256_blend_epi32(__m256i a, __m256i b, const int imm8)",
X86IsaExtension::Avx2,
"VPBLENDD",
"Blend packed 32-bit integers using immediate mask (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_blend_epi16",
"__m256i _mm256_blend_epi16(__m256i a, __m256i b, const int imm8)",
X86IsaExtension::Avx2,
"VPBLENDW",
"Blend packed 16-bit integers using immediate mask (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_blendv_epi8",
"__m256i _mm256_blendv_epi8(__m256i a, __m256i b, __m256i mask)",
X86IsaExtension::Avx2,
"VPBLENDVB",
"Blend packed 8-bit integers using variable mask (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_broadcastb_epi8",
"__m256i _mm256_broadcastb_epi8(__m128i a)",
X86IsaExtension::Avx2,
"VPBROADCASTB",
"Broadcast a 8-bit integer to all elements of a 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_broadcastw_epi16",
"__m256i _mm256_broadcastw_epi16(__m128i a)",
X86IsaExtension::Avx2,
"VPBROADCASTW",
"Broadcast a 16-bit integer to all elements of a 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_broadcastd_epi32",
"__m256i _mm256_broadcastd_epi32(__m128i a)",
X86IsaExtension::Avx2,
"VPBROADCASTD",
"Broadcast a 32-bit integer to all elements of a 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_broadcastq_epi64",
"__m256i _mm256_broadcastq_epi64(__m128i a)",
X86IsaExtension::Avx2,
"VPBROADCASTQ",
"Broadcast a 64-bit integer to all elements of a 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_broadcastsi128_si256",
"__m256i _mm256_broadcastsi128_si256(__m128i a)",
X86IsaExtension::Avx2,
"VBROADCASTI128",
"Broadcast a 128-bit integer value from memory to both 128-bit lanes.",
),
X86IntrinsicEntry::new(
"_mm256_cvtepi8_epi16",
"__m256i _mm256_cvtepi8_epi16(__m128i a)",
X86IsaExtension::Avx2,
"VPMOVSXBW",
"Sign-extend packed 8-bit integers to packed 16-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cvtepi16_epi32",
"__m256i _mm256_cvtepi16_epi32(__m128i a)",
X86IsaExtension::Avx2,
"VPMOVSXWD",
"Sign-extend packed 16-bit integers to packed 32-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cvtepi32_epi64",
"__m256i _mm256_cvtepi32_epi64(__m128i a)",
X86IsaExtension::Avx2,
"VPMOVSXDQ",
"Sign-extend packed 32-bit integers to packed 64-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cvtepu8_epi16",
"__m256i _mm256_cvtepu8_epi16(__m128i a)",
X86IsaExtension::Avx2,
"VPMOVZXBW",
"Zero-extend packed 8-bit integers to packed 16-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cvtepu16_epi32",
"__m256i _mm256_cvtepu16_epi32(__m128i a)",
X86IsaExtension::Avx2,
"VPMOVZXWD",
"Zero-extend packed 16-bit integers to packed 32-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_cvtepu32_epi64",
"__m256i _mm256_cvtepu32_epi64(__m128i a)",
X86IsaExtension::Avx2,
"VPMOVZXDQ",
"Zero-extend packed 32-bit integers to packed 64-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_min_epi8",
"__m256i _mm256_min_epi8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMINSB",
"Compare packed signed 8-bit integers and return the minimum (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_min_epi16",
"__m256i _mm256_min_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMINSW",
"Compare packed signed 16-bit integers and return the minimum (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_min_epi32",
"__m256i _mm256_min_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMINSD",
"Compare packed signed 32-bit integers and return the minimum (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_min_epu8",
"__m256i _mm256_min_epu8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMINUB",
"Compare packed unsigned 8-bit integers and return the minimum (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_min_epu16",
"__m256i _mm256_min_epu16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMINUW",
"Compare packed unsigned 16-bit integers and return the minimum (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_min_epu32",
"__m256i _mm256_min_epu32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMINUD",
"Compare packed unsigned 32-bit integers and return the minimum (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_max_epi8",
"__m256i _mm256_max_epi8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMAXSB",
"Compare packed signed 8-bit integers and return the maximum (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_max_epi16",
"__m256i _mm256_max_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMAXSW",
"Compare packed signed 16-bit integers and return the maximum (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_max_epi32",
"__m256i _mm256_max_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMAXSD",
"Compare packed signed 32-bit integers and return the maximum (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_max_epu8",
"__m256i _mm256_max_epu8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMAXUB",
"Compare packed unsigned 8-bit integers and return the maximum (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_max_epu16",
"__m256i _mm256_max_epu16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMAXUW",
"Compare packed unsigned 16-bit integers and return the maximum (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_max_epu32",
"__m256i _mm256_max_epu32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPMAXUD",
"Compare packed unsigned 32-bit integers and return the maximum (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_i32gather_ps",
"__m256 _mm256_i32gather_ps(float const *base_addr, __m256i vindex, const int scale)",
X86IsaExtension::Avx2,
"VGATHERDPS",
"Gather single-precision FP values using 32-bit indices and scale.",
),
X86IntrinsicEntry::new(
"_mm256_i64gather_ps",
"__m128 _mm256_i64gather_ps(float const *base_addr, __m256i vindex, const int scale)",
X86IsaExtension::Avx2,
"VGATHERQPS",
"Gather single-precision FP values using 64-bit indices and scale.",
),
X86IntrinsicEntry::new(
"_mm256_i32gather_pd",
"__m256d _mm256_i32gather_pd(double const *base_addr, __m128i vindex, const int scale)",
X86IsaExtension::Avx2,
"VGATHERDPD",
"Gather double-precision FP values using 32-bit indices and scale.",
),
X86IntrinsicEntry::new(
"_mm256_i64gather_pd",
"__m256d _mm256_i64gather_pd(double const *base_addr, __m256i vindex, const int scale)",
X86IsaExtension::Avx2,
"VGATHERQPD",
"Gather double-precision FP values using 64-bit indices and scale.",
),
X86IntrinsicEntry::new(
"_mm256_i32gather_epi32",
"__m256i _mm256_i32gather_epi32(int const *base_addr, __m256i vindex, const int scale)",
X86IsaExtension::Avx2,
"VPGATHERDD",
"Gather 32-bit integers using 32-bit indices and scale.",
),
X86IntrinsicEntry::new(
"_mm256_i64gather_epi32",
"__m128i _mm256_i64gather_epi32(int const *base_addr, __m256i vindex, const int scale)",
X86IsaExtension::Avx2,
"VPGATHERQD",
"Gather 32-bit integers using 64-bit indices and scale.",
),
X86IntrinsicEntry::new(
"_mm256_i32gather_epi64",
"__m256i _mm256_i32gather_epi64(int64_t const *base_addr, __m128i vindex, const int scale)",
X86IsaExtension::Avx2,
"VPGATHERDQ",
"Gather 64-bit integers using 32-bit indices and scale.",
),
X86IntrinsicEntry::new(
"_mm256_i64gather_epi64",
"__m256i _mm256_i64gather_epi64(int64_t const *base_addr, __m256i vindex, const int scale)",
X86IsaExtension::Avx2,
"VPGATHERQQ",
"Gather 64-bit integers using 64-bit indices and scale.",
),
X86IntrinsicEntry::new(
"_mm256_movemask_epi8",
"int _mm256_movemask_epi8(__m256i a)",
X86IsaExtension::Avx2,
"VPMOVMSKB",
"Create a 32-bit mask from the most significant bit of each byte (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_extracti128_si256",
"__m128i _mm256_extracti128_si256(__m256i a, const int imm8)",
X86IsaExtension::Avx2,
"VEXTRACTI128",
"Extract a 128-bit lane of integer data from a 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_inserti128_si256",
"__m256i _mm256_inserti128_si256(__m256i a, __m128i b, const int imm8)",
X86IsaExtension::Avx2,
"VINSERTI128",
"Insert a 128-bit lane of integer data into a 256-bit vector.",
),
X86IntrinsicEntry::new(
"_mm256_abs_epi8",
"__m256i _mm256_abs_epi8(__m256i a)",
X86IsaExtension::Avx2,
"VPABSB",
"Compute the absolute value of packed 8-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_abs_epi16",
"__m256i _mm256_abs_epi16(__m256i a)",
X86IsaExtension::Avx2,
"VPABSW",
"Compute the absolute value of packed 16-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_abs_epi32",
"__m256i _mm256_abs_epi32(__m256i a)",
X86IsaExtension::Avx2,
"VPABSD",
"Compute the absolute value of packed 32-bit integers (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_sign_epi8",
"__m256i _mm256_sign_epi8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPSIGNB",
"Negate/zero/preserve packed 8-bit integers based on sign of b (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_sign_epi16",
"__m256i _mm256_sign_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPSIGNW",
"Negate/zero/preserve packed 16-bit integers based on sign of b (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_sign_epi32",
"__m256i _mm256_sign_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPSIGND",
"Negate/zero/preserve packed 32-bit integers based on sign of b (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_alignr_epi8",
"__m256i _mm256_alignr_epi8(__m256i a, __m256i b, const int imm8)",
X86IsaExtension::Avx2,
"VPALIGNR",
"Concatenate byte vectors and right-shift by byte offset (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_hadd_epi16",
"__m256i _mm256_hadd_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPHADDW",
"Horizontally add adjacent pairs of 16-bit integers (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_hadd_epi32",
"__m256i _mm256_hadd_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPHADDD",
"Horizontally add adjacent pairs of 32-bit integers (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_hadds_epi16",
"__m256i _mm256_hadds_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPHADDSW",
"Horizontally add adjacent pairs of 16-bit integers with saturation (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_hsub_epi16",
"__m256i _mm256_hsub_epi16(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPHSUBW",
"Horizontally subtract adjacent pairs of 16-bit integers (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_hsub_epi32",
"__m256i _mm256_hsub_epi32(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPHSUBD",
"Horizontally subtract adjacent pairs of 32-bit integers (256-bit) in lanes.",
),
X86IntrinsicEntry::new(
"_mm256_mpsadbw_epu8",
"__m256i _mm256_mpsadbw_epu8(__m256i a, __m256i b, const int imm8)",
X86IsaExtension::Avx2,
"VMPSADBW",
"Compute multiple packed sums of absolute differences (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_sad_epu8",
"__m256i _mm256_sad_epu8(__m256i a, __m256i b)",
X86IsaExtension::Avx2,
"VPSADBW",
"Compute sum of absolute differences of unsigned 8-bit integers (256-bit).",
),
]
}
fn fma_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm_fmadd_ps",
"__m128 _mm_fmadd_ps(__m128 a, __m128 b, __m128 c)",
X86IsaExtension::Fma,
"VFMADD132PS",
"Multiply a and b, add c: a * b + c.",
),
X86IntrinsicEntry::new(
"_mm_fmadd_ss",
"__m128 _mm_fmadd_ss(__m128 a, __m128 b, __m128 c)",
X86IsaExtension::Fma,
"VFMADD132SS",
"Multiply lower a and b, add lower c: a * b + c; pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_fmsub_ps",
"__m128 _mm_fmsub_ps(__m128 a, __m128 b, __m128 c)",
X86IsaExtension::Fma,
"VFMSUB132PS",
"Multiply a and b, subtract c: a * b - c.",
),
X86IntrinsicEntry::new(
"_mm_fmsub_ss",
"__m128 _mm_fmsub_ss(__m128 a, __m128 b, __m128 c)",
X86IsaExtension::Fma,
"VFMSUB132SS",
"Multiply lower a and b, subtract lower c: a * b - c; pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_fnmadd_ps",
"__m128 _mm_fnmadd_ps(__m128 a, __m128 b, __m128 c)",
X86IsaExtension::Fma,
"VFNMADD132PS",
"Multiply a and b, negate, add c: -(a * b) + c.",
),
X86IntrinsicEntry::new(
"_mm_fnmadd_ss",
"__m128 _mm_fnmadd_ss(__m128 a, __m128 b, __m128 c)",
X86IsaExtension::Fma,
"VFNMADD132SS",
"Multiply lower a and b, negate, add lower c; pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_fnmsub_ps",
"__m128 _mm_fnmsub_ps(__m128 a, __m128 b, __m128 c)",
X86IsaExtension::Fma,
"VFNMSUB132PS",
"Multiply a and b, negate, subtract c: -(a * b) - c.",
),
X86IntrinsicEntry::new(
"_mm_fnmsub_ss",
"__m128 _mm_fnmsub_ss(__m128 a, __m128 b, __m128 c)",
X86IsaExtension::Fma,
"VFNMSUB132SS",
"Multiply lower a and b, negate, subtract lower c; pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_fmadd_pd",
"__m128d _mm_fmadd_pd(__m128d a, __m128d b, __m128d c)",
X86IsaExtension::Fma,
"VFMADD132PD",
"Multiply a and b, add c (128-bit double): a * b + c.",
),
X86IntrinsicEntry::new(
"_mm_fmadd_sd",
"__m128d _mm_fmadd_sd(__m128d a, __m128d b, __m128d c)",
X86IsaExtension::Fma,
"VFMADD132SD",
"Multiply lower a and b, add lower c; pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_fmsub_pd",
"__m128d _mm_fmsub_pd(__m128d a, __m128d b, __m128d c)",
X86IsaExtension::Fma,
"VFMSUB132PD",
"Multiply a and b, subtract c (128-bit double): a * b - c.",
),
X86IntrinsicEntry::new(
"_mm_fmsub_sd",
"__m128d _mm_fmsub_sd(__m128d a, __m128d b, __m128d c)",
X86IsaExtension::Fma,
"VFMSUB132SD",
"Multiply lower a and b, subtract lower c; pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_fnmadd_pd",
"__m128d _mm_fnmadd_pd(__m128d a, __m128d b, __m128d c)",
X86IsaExtension::Fma,
"VFNMADD132PD",
"Multiply a and b, negate, add c (128-bit double): -(a * b) + c.",
),
X86IntrinsicEntry::new(
"_mm_fnmadd_sd",
"__m128d _mm_fnmadd_sd(__m128d a, __m128d b, __m128d c)",
X86IsaExtension::Fma,
"VFNMADD132SD",
"Multiply lower a and b, negate, add lower c; pass through upper.",
),
X86IntrinsicEntry::new(
"_mm_fnmsub_pd",
"__m128d _mm_fnmsub_pd(__m128d a, __m128d b, __m128d c)",
X86IsaExtension::Fma,
"VFNMSUB132PD",
"Multiply a and b, negate, subtract c (128-bit double): -(a * b) - c.",
),
X86IntrinsicEntry::new(
"_mm_fnmsub_sd",
"__m128d _mm_fnmsub_sd(__m128d a, __m128d b, __m128d c)",
X86IsaExtension::Fma,
"VFNMSUB132SD",
"Multiply lower a and b, negate, subtract lower c; pass through upper.",
),
X86IntrinsicEntry::new(
"_mm256_fmadd_ps",
"__m256 _mm256_fmadd_ps(__m256 a, __m256 b, __m256 c)",
X86IsaExtension::Fma,
"VFMADD132PS",
"Multiply a and b, add c (256-bit): a * b + c.",
),
X86IntrinsicEntry::new(
"_mm256_fmsub_ps",
"__m256 _mm256_fmsub_ps(__m256 a, __m256 b, __m256 c)",
X86IsaExtension::Fma,
"VFMSUB132PS",
"Multiply a and b, subtract c (256-bit): a * b - c.",
),
X86IntrinsicEntry::new(
"_mm256_fnmadd_ps",
"__m256 _mm256_fnmadd_ps(__m256 a, __m256 b, __m256 c)",
X86IsaExtension::Fma,
"VFNMADD132PS",
"Multiply a and b, negate, add c (256-bit): -(a * b) + c.",
),
X86IntrinsicEntry::new(
"_mm256_fnmsub_ps",
"__m256 _mm256_fnmsub_ps(__m256 a, __m256 b, __m256 c)",
X86IsaExtension::Fma,
"VFNMSUB132PS",
"Multiply a and b, negate, subtract c (256-bit): -(a * b) - c.",
),
X86IntrinsicEntry::new(
"_mm256_fmadd_pd",
"__m256d _mm256_fmadd_pd(__m256d a, __m256d b, __m256d c)",
X86IsaExtension::Fma,
"VFMADD132PD",
"Multiply a and b, add c (256-bit double): a * b + c.",
),
X86IntrinsicEntry::new(
"_mm256_fmsub_pd",
"__m256d _mm256_fmsub_pd(__m256d a, __m256d b, __m256d c)",
X86IsaExtension::Fma,
"VFMSUB132PD",
"Multiply a and b, subtract c (256-bit double): a * b - c.",
),
X86IntrinsicEntry::new(
"_mm256_fnmadd_pd",
"__m256d _mm256_fnmadd_pd(__m256d a, __m256d b, __m256d c)",
X86IsaExtension::Fma,
"VFNMADD132PD",
"Multiply a and b, negate, add c (256-bit double): -(a * b) + c.",
),
X86IntrinsicEntry::new(
"_mm256_fnmsub_pd",
"__m256d _mm256_fnmsub_pd(__m256d a, __m256d b, __m256d c)",
X86IsaExtension::Fma,
"VFNMSUB132PD",
"Multiply a and b, negate, subtract c (256-bit double): -(a * b) - c.",
),
X86IntrinsicEntry::new(
"_mm_fmaddsub_ps",
"__m128 _mm_fmaddsub_ps(__m128 a, __m128 b, __m128 c)",
X86IsaExtension::Fma,
"VFMADDSUB132PS",
"Multiply a and b, alternately add/subtract c: odd elements add, even subtract.",
),
X86IntrinsicEntry::new(
"_mm_fmaddsub_pd",
"__m128d _mm_fmaddsub_pd(__m128d a, __m128d b, __m128d c)",
X86IsaExtension::Fma,
"VFMADDSUB132PD",
"Multiply a and b, alternately add/subtract c (double-precision).",
),
X86IntrinsicEntry::new(
"_mm_fmsubadd_ps",
"__m128 _mm_fmsubadd_ps(__m128 a, __m128 b, __m128 c)",
X86IsaExtension::Fma,
"VFMSUBADD132PS",
"Multiply a and b, alternately subtract/add c.",
),
X86IntrinsicEntry::new(
"_mm_fmsubadd_pd",
"__m128d _mm_fmsubadd_pd(__m128d a, __m128d b, __m128d c)",
X86IsaExtension::Fma,
"VFMSUBADD132PD",
"Multiply a and b, alternately subtract/add c (double-precision).",
),
X86IntrinsicEntry::new(
"_mm256_fmaddsub_ps",
"__m256 _mm256_fmaddsub_ps(__m256 a, __m256 b, __m256 c)",
X86IsaExtension::Fma,
"VFMADDSUB132PS",
"Multiply a and b, alternately add/subtract c (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_fmaddsub_pd",
"__m256d _mm256_fmaddsub_pd(__m256d a, __m256d b, __m256d c)",
X86IsaExtension::Fma,
"VFMADDSUB132PD",
"Multiply a and b, alternately add/subtract c (256-bit double).",
),
X86IntrinsicEntry::new(
"_mm256_fmsubadd_ps",
"__m256 _mm256_fmsubadd_ps(__m256 a, __m256 b, __m256 c)",
X86IsaExtension::Fma,
"VFMSUBADD132PS",
"Multiply a and b, alternately subtract/add c (256-bit).",
),
X86IntrinsicEntry::new(
"_mm256_fmsubadd_pd",
"__m256d _mm256_fmsubadd_pd(__m256d a, __m256d b, __m256d c)",
X86IsaExtension::Fma,
"VFMSUBADD132PD",
"Multiply a and b, alternately subtract/add c (256-bit double).",
),
]
}
fn avx512f_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm512_load_ps",
"__m512 _mm512_load_ps(void const *mem_addr)",
X86IsaExtension::Avx512f,
"VMOVAPS",
"Load 512-bits (16 packed single-precision FP values) from aligned memory.",
),
X86IntrinsicEntry::new(
"_mm512_load_pd",
"__m512d _mm512_load_pd(void const *mem_addr)",
X86IsaExtension::Avx512f,
"VMOVAPD",
"Load 512-bits (8 packed double-precision FP values) from aligned memory.",
),
X86IntrinsicEntry::new(
"_mm512_load_si512",
"__m512i _mm512_load_si512(void const *mem_addr)",
X86IsaExtension::Avx512f,
"VMOVDQA32",
"Load 512-bits of integer data from aligned memory.",
),
X86IntrinsicEntry::new(
"_mm512_store_ps",
"void _mm512_store_ps(void *mem_addr, __m512 a)",
X86IsaExtension::Avx512f,
"VMOVAPS",
"Store 512-bits (16 packed single-precision FP values) to aligned memory.",
),
X86IntrinsicEntry::new(
"_mm512_store_pd",
"void _mm512_store_pd(void *mem_addr, __m512d a)",
X86IsaExtension::Avx512f,
"VMOVAPD",
"Store 512-bits (8 packed double-precision FP values) to aligned memory.",
),
X86IntrinsicEntry::new(
"_mm512_store_si512",
"void _mm512_store_si512(void *mem_addr, __m512i a)",
X86IsaExtension::Avx512f,
"VMOVDQA32",
"Store 512-bits of integer data to aligned memory.",
),
X86IntrinsicEntry::new(
"_mm512_setzero_ps",
"__m512 _mm512_setzero_ps(void)",
X86IsaExtension::Avx512f,
"VXORPS",
"Return a 512-bit vector with all single-precision FP set to zero.",
),
X86IntrinsicEntry::new(
"_mm512_setzero_pd",
"__m512d _mm512_setzero_pd(void)",
X86IsaExtension::Avx512f,
"VXORPD",
"Return a 512-bit vector with all double-precision FP set to zero.",
),
X86IntrinsicEntry::new(
"_mm512_setzero_si512",
"__m512i _mm512_setzero_si512(void)",
X86IsaExtension::Avx512f,
"VPXORD",
"Return a 512-bit vector with all integer elements set to zero.",
),
X86IntrinsicEntry::new(
"_mm512_set1_ps",
"__m512 _mm512_set1_ps(float a)",
X86IsaExtension::Avx512f,
"VBROADCASTSS",
"Broadcast a single-precision FP value to all 16 elements.",
),
X86IntrinsicEntry::new(
"_mm512_set1_pd",
"__m512d _mm512_set1_pd(double a)",
X86IsaExtension::Avx512f,
"VBROADCASTSD",
"Broadcast a double-precision FP value to all 8 elements.",
),
X86IntrinsicEntry::new(
"_mm512_add_ps",
"__m512 _mm512_add_ps(__m512 a, __m512 b)",
X86IsaExtension::Avx512f,
"VADDPS",
"Add packed single-precision FP (512-bit) values.",
),
X86IntrinsicEntry::new(
"_mm512_add_pd",
"__m512d _mm512_add_pd(__m512d a, __m512d b)",
X86IsaExtension::Avx512f,
"VADDPD",
"Add packed double-precision FP (512-bit) values.",
),
X86IntrinsicEntry::new(
"_mm512_sub_ps",
"__m512 _mm512_sub_ps(__m512 a, __m512 b)",
X86IsaExtension::Avx512f,
"VSUBPS",
"Subtract packed single-precision FP (512-bit) values.",
),
X86IntrinsicEntry::new(
"_mm512_sub_pd",
"__m512d _mm512_sub_pd(__m512d a, __m512d b)",
X86IsaExtension::Avx512f,
"VSUBPD",
"Subtract packed double-precision FP (512-bit) values.",
),
X86IntrinsicEntry::new(
"_mm512_mul_ps",
"__m512 _mm512_mul_ps(__m512 a, __m512 b)",
X86IsaExtension::Avx512f,
"VMULPS",
"Multiply packed single-precision FP (512-bit) values.",
),
X86IntrinsicEntry::new(
"_mm512_mul_pd",
"__m512d _mm512_mul_pd(__m512d a, __m512d b)",
X86IsaExtension::Avx512f,
"VMULPD",
"Multiply packed double-precision FP (512-bit) values.",
),
X86IntrinsicEntry::new(
"_mm512_div_ps",
"__m512 _mm512_div_ps(__m512 a, __m512 b)",
X86IsaExtension::Avx512f,
"VDIVPS",
"Divide packed single-precision FP (512-bit) values.",
),
X86IntrinsicEntry::new(
"_mm512_div_pd",
"__m512d _mm512_div_pd(__m512d a, __m512d b)",
X86IsaExtension::Avx512f,
"VDIVPD",
"Divide packed double-precision FP (512-bit) values.",
),
X86IntrinsicEntry::new(
"_mm512_sqrt_ps",
"__m512 _mm512_sqrt_ps(__m512 a)",
X86IsaExtension::Avx512f,
"VSQRTPS",
"Compute the square root of packed single-precision FP (512-bit) values.",
),
X86IntrinsicEntry::new(
"_mm512_sqrt_pd",
"__m512d _mm512_sqrt_pd(__m512d a)",
X86IsaExtension::Avx512f,
"VSQRTPD",
"Compute the square root of packed double-precision FP (512-bit) values.",
),
X86IntrinsicEntry::new(
"_mm512_min_ps",
"__m512 _mm512_min_ps(__m512 a, __m512 b)",
X86IsaExtension::Avx512f,
"VMINPS",
"Compare packed single-precision FP (512-bit) and return the minimum.",
),
X86IntrinsicEntry::new(
"_mm512_min_pd",
"__m512d _mm512_min_pd(__m512d a, __m512d b)",
X86IsaExtension::Avx512f,
"VMINPD",
"Compare packed double-precision FP (512-bit) and return the minimum.",
),
X86IntrinsicEntry::new(
"_mm512_max_ps",
"__m512 _mm512_max_ps(__m512 a, __m512 b)",
X86IsaExtension::Avx512f,
"VMAXPS",
"Compare packed single-precision FP (512-bit) and return the maximum.",
),
X86IntrinsicEntry::new(
"_mm512_max_pd",
"__m512d _mm512_max_pd(__m512d a, __m512d b)",
X86IsaExtension::Avx512f,
"VMAXPD",
"Compare packed double-precision FP (512-bit) and return the maximum.",
),
X86IntrinsicEntry::new(
"_mm512_mask_add_ps",
"__m512 _mm512_mask_add_ps(__m512 src, __mmask16 k, __m512 a, __m512 b)",
X86IsaExtension::Avx512f,
"VADDPS",
"Masked add of packed single-precision FP (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_maskz_add_ps",
"__m512 _mm512_maskz_add_ps(__mmask16 k, __m512 a, __m512 b)",
X86IsaExtension::Avx512f,
"VADDPS",
"Zero-masked add of packed single-precision FP (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_mask_add_pd",
"__m512d _mm512_mask_add_pd(__m512d src, __mmask8 k, __m512d a, __m512d b)",
X86IsaExtension::Avx512f,
"VADDPD",
"Masked add of packed double-precision FP (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_fmadd_ps",
"__m512 _mm512_fmadd_ps(__m512 a, __m512 b, __m512 c)",
X86IsaExtension::Avx512f,
"VFMADD132PS",
"Fused multiply-add (512-bit single-precision): a * b + c.",
),
X86IntrinsicEntry::new(
"_mm512_fmadd_pd",
"__m512d _mm512_fmadd_pd(__m512d a, __m512d b, __m512d c)",
X86IsaExtension::Avx512f,
"VFMADD132PD",
"Fused multiply-add (512-bit double-precision): a * b + c.",
),
X86IntrinsicEntry::new(
"_mm512_mask_compress_ps",
"__m512 _mm512_mask_compress_ps(__m512 src, __mmask16 k, __m512 a)",
X86IsaExtension::Avx512f,
"VCOMPRESSPS",
"Contiguously store active single-precision FP elements selected by mask.",
),
X86IntrinsicEntry::new(
"_mm512_mask_expand_ps",
"__m512 _mm512_mask_expand_ps(__m512 src, __mmask16 k, __m512 a)",
X86IsaExtension::Avx512f,
"VEXPANDPS",
"Load sparse single-precision FP elements into active positions.",
),
X86IntrinsicEntry::new(
"_mm512_permutevar_ps",
"__m512 _mm512_permutevar_ps(__m512 a, __m512i idx)",
X86IsaExtension::Avx512f,
"VPERMPS",
"Permute single-precision FP across lanes using 32-bit indexes.",
),
X86IntrinsicEntry::new(
"_mm512_permutevar_pd",
"__m512d _mm512_permutevar_pd(__m512d a, __m512i idx)",
X86IsaExtension::Avx512f,
"VPERMPD",
"Permute double-precision FP across lanes using 64-bit indexes.",
),
X86IntrinsicEntry::new(
"_mm512_permutexvar_ps",
"__m512 _mm512_permutexvar_ps(__m512i idx, __m512 a)",
X86IsaExtension::Avx512f,
"VPERMPS",
"Permute single-precision FP across all 16 elements using indexes.",
),
X86IntrinsicEntry::new(
"_mm512_shuffle_ps",
"__m512 _mm512_shuffle_ps(__m512 a, __m512 b, int imm8)",
X86IsaExtension::Avx512f,
"VSHUFPS",
"Shuffle single-precision FP in 128-bit lanes using immediate control.",
),
X86IntrinsicEntry::new(
"_mm512_shuffle_pd",
"__m512d _mm512_shuffle_pd(__m512d a, __m512d b, int imm8)",
X86IsaExtension::Avx512f,
"VSHUFPD",
"Shuffle double-precision FP in 128-bit lanes using immediate control.",
),
X86IntrinsicEntry::new(
"_mm512_alignr_epi32",
"__m512i _mm512_alignr_epi32(__m512i a, __m512i b, int count)",
X86IsaExtension::Avx512f,
"VALIGND",
"Concatenate a and b, right-shift by 32-bit dword count, extract 512-bit result.",
),
X86IntrinsicEntry::new(
"_mm512_alignr_epi64",
"__m512i _mm512_alignr_epi64(__m512i a, __m512i b, int count)",
X86IsaExtension::Avx512f,
"VALIGNQ",
"Concatenate a and b, right-shift by 64-bit qword count, extract 512-bit result.",
),
X86IntrinsicEntry::new(
"_mm512_extractf32x4_ps",
"__m128 _mm512_extractf32x4_ps(__m512 a, int imm8)",
X86IsaExtension::Avx512f,
"VEXTRACTF32X4",
"Extract a 128-bit lane of single-precision FP from a 512-bit vector.",
),
X86IntrinsicEntry::new(
"_mm512_extractf64x4_pd",
"__m256d _mm512_extractf64x4_pd(__m512d a, int imm8)",
X86IsaExtension::Avx512f,
"VEXTRACTF64X4",
"Extract a 256-bit lane of double-precision FP from a 512-bit vector.",
),
X86IntrinsicEntry::new(
"_mm512_insertf32x4",
"__m512 _mm512_insertf32x4(__m512 a, __m128 b, int imm8)",
X86IsaExtension::Avx512f,
"VINSERTF32X4",
"Insert a 128-bit lane of single-precision FP into a 512-bit vector.",
),
X86IntrinsicEntry::new(
"_mm512_insertf64x4",
"__m512d _mm512_insertf64x4(__m512d a, __m256d b, int imm8)",
X86IsaExtension::Avx512f,
"VINSERTF64X4",
"Insert a 256-bit lane of double-precision FP into a 512-bit vector.",
),
X86IntrinsicEntry::new(
"_mm512_broadcastss_ps",
"__m512 _mm512_broadcastss_ps(__m128 a)",
X86IsaExtension::Avx512f,
"VBROADCASTSS",
"Broadcast a single-precision FP from the low element to all 16 elements.",
),
X86IntrinsicEntry::new(
"_mm512_broadcastsd_pd",
"__m512d _mm512_broadcastsd_pd(__m128d a)",
X86IsaExtension::Avx512f,
"VBROADCASTSD",
"Broadcast a double-precision FP from the low element to all 8 elements.",
),
X86IntrinsicEntry::new(
"_mm512_reduce_ps",
"__m512 _mm512_reduce_ps(__m512 a, int imm8)",
X86IsaExtension::Avx512f,
"VREDUCEPS",
"Perform reduction transformation on packed single-precision FP (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_reduce_pd",
"__m512d _mm512_reduce_pd(__m512d a, int imm8)",
X86IsaExtension::Avx512f,
"VREDUCEPD",
"Perform reduction transformation on packed double-precision FP (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_getexp_ps",
"__m512 _mm512_getexp_ps(__m512 a)",
X86IsaExtension::Avx512f,
"VGETEXPPS",
"Extract the exponent of packed single-precision FP (512-bit) as FP values.",
),
X86IntrinsicEntry::new(
"_mm512_getexp_pd",
"__m512d _mm512_getexp_pd(__m512d a)",
X86IsaExtension::Avx512f,
"VGETEXPPD",
"Extract the exponent of packed double-precision FP (512-bit) as FP values.",
),
X86IntrinsicEntry::new(
"_mm512_scalef_ps",
"__m512 _mm512_scalef_ps(__m512 a, __m512 b)",
X86IsaExtension::Avx512f,
"VSCALEFPS",
"Scale the single-precision FP values by floor(b) powers of 2.",
),
X86IntrinsicEntry::new(
"_mm512_scalef_pd",
"__m512d _mm512_scalef_pd(__m512d a, __m512d b)",
X86IsaExtension::Avx512f,
"VSCALEFPD",
"Scale the double-precision FP values by floor(b) powers of 2.",
),
X86IntrinsicEntry::new(
"_mm512_getmant_ps",
"__m512 _mm512_getmant_ps(__m512 a, _MM_MANTISSA_NORM_ENUM norm, _MM_MANTISSA_SIGN_ENUM sign)",
X86IsaExtension::Avx512f,
"VGETMANTPS",
"Extract mantissa from packed single-precision FP (512-bit) values.",
),
X86IntrinsicEntry::new(
"_mm512_getmant_pd",
"__m512d _mm512_getmant_pd(__m512d a, _MM_MANTISSA_NORM_ENUM norm, _MM_MANTISSA_SIGN_ENUM sign)",
X86IsaExtension::Avx512f,
"VGETMANTPD",
"Extract mantissa from packed double-precision FP (512-bit) values.",
),
X86IntrinsicEntry::new(
"_mm512_rcp14_ps",
"__m512 _mm512_rcp14_ps(__m512 a)",
X86IsaExtension::Avx512f,
"VRCP14PS",
"Compute approximate reciprocal (14-bit precision) of packed single-precision FP.",
),
X86IntrinsicEntry::new(
"_mm512_rsqrt14_ps",
"__m512 _mm512_rsqrt14_ps(__m512 a)",
X86IsaExtension::Avx512f,
"VRSQRT14PS",
"Compute approximate reciprocal square root (14-bit) of packed single-precision FP.",
),
X86IntrinsicEntry::new(
"_mm512_roundscale_ps",
"__m512 _mm512_roundscale_ps(__m512 a, int imm8)",
X86IsaExtension::Avx512f,
"VRNDSCALEPS",
"Round packed single-precision FP (512-bit) with scale and rounding control.",
),
X86IntrinsicEntry::new(
"_mm512_roundscale_pd",
"__m512d _mm512_roundscale_pd(__m512d a, int imm8)",
X86IsaExtension::Avx512f,
"VRNDSCALEPD",
"Round packed double-precision FP (512-bit) with scale and rounding control.",
),
X86IntrinsicEntry::new(
"_mm512_fixupimm_ps",
"__m512 _mm512_fixupimm_ps(__m512 a, __m512 b, __m512i c, int imm8)",
X86IsaExtension::Avx512f,
"VFIXUPIMMPS",
"Fix up special values in packed single-precision FP (512-bit) using table in c.",
),
X86IntrinsicEntry::new(
"_mm512_fixupimm_pd",
"__m512d _mm512_fixupimm_pd(__m512d a, __m512d b, __m512i c, int imm8)",
X86IsaExtension::Avx512f,
"VFIXUPIMMPD",
"Fix up special values in packed double-precision FP (512-bit) using table in c.",
),
X86IntrinsicEntry::new(
"_mm512_movepi32_mask",
"__mmask16 _mm512_movepi32_mask(__m512i a)",
X86IsaExtension::Avx512f,
"VPMOVD2M",
"Create a 16-bit mask from the most significant bit of each 32-bit integer element.",
),
X86IntrinsicEntry::new(
"_mm512_movepi64_mask",
"__mmask8 _mm512_movepi64_mask(__m512i a)",
X86IsaExtension::Avx512f,
"VPMOVQ2M",
"Create an 8-bit mask from the most significant bit of each 64-bit integer element.",
),
X86IntrinsicEntry::new(
"_mm512_add_epi32",
"__m512i _mm512_add_epi32(__m512i a, __m512i b)",
X86IsaExtension::Avx512f,
"VPADDD",
"Add packed 32-bit integers (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_add_epi64",
"__m512i _mm512_add_epi64(__m512i a, __m512i b)",
X86IsaExtension::Avx512f,
"VPADDQ",
"Add packed 64-bit integers (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_sub_epi32",
"__m512i _mm512_sub_epi32(__m512i a, __m512i b)",
X86IsaExtension::Avx512f,
"VPSUBD",
"Subtract packed 32-bit integers (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_sub_epi64",
"__m512i _mm512_sub_epi64(__m512i a, __m512i b)",
X86IsaExtension::Avx512f,
"VPSUBQ",
"Subtract packed 64-bit integers (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_mullo_epi32",
"__m512i _mm512_mullo_epi32(__m512i a, __m512i b)",
X86IsaExtension::Avx512f,
"VPMULLD",
"Multiply packed 32-bit integers and store low result (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_and_epi32",
"__m512i _mm512_and_epi32(__m512i a, __m512i b)",
X86IsaExtension::Avx512f,
"VPANDD",
"Compute the bitwise AND of two 512-bit integer vectors.",
),
X86IntrinsicEntry::new(
"_mm512_or_epi32",
"__m512i _mm512_or_epi32(__m512i a, __m512i b)",
X86IsaExtension::Avx512f,
"VPORD",
"Compute the bitwise OR of two 512-bit integer vectors.",
),
X86IntrinsicEntry::new(
"_mm512_xor_epi32",
"__m512i _mm512_xor_epi32(__m512i a, __m512i b)",
X86IsaExtension::Avx512f,
"VPXORD",
"Compute the bitwise XOR of two 512-bit integer vectors.",
),
X86IntrinsicEntry::new(
"_mm512_andnot_epi32",
"__m512i _mm512_andnot_epi32(__m512i a, __m512i b)",
X86IsaExtension::Avx512f,
"VPANDND",
"Compute the bitwise AND-NOT of two 512-bit integer vectors.",
),
X86IntrinsicEntry::new(
"_mm512_abs_ps",
"__m512 _mm512_abs_ps(__m512 a)",
X86IsaExtension::Avx512f,
"VPANDD",
"Compute the absolute value of packed single-precision FP (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_abs_pd",
"__m512d _mm512_abs_pd(__m512d a)",
X86IsaExtension::Avx512f,
"VPANDQ",
"Compute the absolute value of packed double-precision FP (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_cmp_ps_mask",
"__mmask16 _mm512_cmp_ps_mask(__m512 a, __m512 b, const int imm8)",
X86IsaExtension::Avx512f,
"VCMPPS",
"Compare packed single-precision FP (512-bit) and return a mask.",
),
X86IntrinsicEntry::new(
"_mm512_cmp_pd_mask",
"__mmask8 _mm512_cmp_pd_mask(__m512d a, __m512d b, const int imm8)",
X86IsaExtension::Avx512f,
"VCMPPD",
"Compare packed double-precision FP (512-bit) and return a mask.",
),
X86IntrinsicEntry::new(
"_mm512_test_epi32_mask",
"__mmask16 _mm512_test_epi32_mask(__m512i a, __m512i b)",
X86IsaExtension::Avx512f,
"VPTESTMD",
"Compute bitwise AND of 32-bit integer vectors and return a mask.",
),
X86IntrinsicEntry::new(
"_mm512_test_epi64_mask",
"__mmask8 _mm512_test_epi64_mask(__m512i a, __m512i b)",
X86IsaExtension::Avx512f,
"VPTESTMQ",
"Compute bitwise AND of 64-bit integer vectors and return a mask.",
),
]
}
fn avx512cd_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm512_conflict_epi32",
"__m512i _mm512_conflict_epi32(__m512i a)",
X86IsaExtension::Avx512cd,
"VPCONFLICTD",
"Test each 32-bit element for equality with all earlier elements; return conflict mask.",
),
X86IntrinsicEntry::new(
"_mm512_conflict_epi64",
"__m512i _mm512_conflict_epi64(__m512i a)",
X86IsaExtension::Avx512cd,
"VPCONFLICTQ",
"Test each 64-bit element for equality with all earlier elements; return conflict mask.",
),
X86IntrinsicEntry::new(
"_mm512_lzcnt_epi32",
"__m512i _mm512_lzcnt_epi32(__m512i a)",
X86IsaExtension::Avx512cd,
"VPLZCNTD",
"Count the number of leading zero bits in each packed 32-bit integer.",
),
X86IntrinsicEntry::new(
"_mm512_lzcnt_epi64",
"__m512i _mm512_lzcnt_epi64(__m512i a)",
X86IsaExtension::Avx512cd,
"VPLZCNTQ",
"Count the number of leading zero bits in each packed 64-bit integer.",
),
X86IntrinsicEntry::new(
"_mm512_broadcastmb_epi64",
"__m512i _mm512_broadcastmb_epi64(__mmask8 k)",
X86IsaExtension::Avx512cd,
"VPBROADCASTMB2Q",
"Broadcast an 8-bit mask to each 64-bit element of a 512-bit vector.",
),
X86IntrinsicEntry::new(
"_mm512_broadcastmw_epi32",
"__m512i _mm512_broadcastmw_epi32(__mmask16 k)",
X86IsaExtension::Avx512cd,
"VPBROADCASTMW2D",
"Broadcast a 16-bit mask to each 32-bit element of a 512-bit vector.",
),
]
}
fn avx512er_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm512_exp2a23_ps",
"__m512 _mm512_exp2a23_ps(__m512 a)",
X86IsaExtension::Avx512er,
"VEXP2PS",
"Compute approximate 2^x for packed single-precision FP (23-bit mantissa precision).",
),
X86IntrinsicEntry::new(
"_mm512_rcp28_ps",
"__m512 _mm512_rcp28_ps(__m512 a)",
X86IsaExtension::Avx512er,
"VRCP28PS",
"Compute approximate reciprocal (28-bit precision) of packed single-precision FP.",
),
X86IntrinsicEntry::new(
"_mm512_rsqrt28_ps",
"__m512 _mm512_rsqrt28_ps(__m512 a)",
X86IsaExtension::Avx512er,
"VRSQRT28PS",
"Compute approximate reciprocal square root (28-bit) of packed single-precision FP.",
),
X86IntrinsicEntry::new(
"_mm512_rcp28_pd",
"__m512d _mm512_rcp28_pd(__m512d a)",
X86IsaExtension::Avx512er,
"VRCP28PD",
"Compute approximate reciprocal (28-bit precision) of packed double-precision FP.",
),
X86IntrinsicEntry::new(
"_mm512_rsqrt28_pd",
"__m512d _mm512_rsqrt28_pd(__m512d a)",
X86IsaExtension::Avx512er,
"VRSQRT28PD",
"Compute approximate reciprocal square root (28-bit) of packed double-precision FP.",
),
]
}
fn avx512pf_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm512_prefetch_i32gather_ps",
"void _mm512_prefetch_i32gather_ps(__m512i vindex, void const *base_addr, int scale, int hint)",
X86IsaExtension::Avx512pf,
"VGATHERPF0DPS",
"Prefetch single-precision FP using 32-bit gather indices and hint.",
),
X86IntrinsicEntry::new(
"_mm512_prefetch_i64gather_ps",
"void _mm512_prefetch_i64gather_ps(__m512i vindex, void const *base_addr, int scale, int hint)",
X86IsaExtension::Avx512pf,
"VGATHERPF0QPS",
"Prefetch single-precision FP using 64-bit gather indices and hint.",
),
X86IntrinsicEntry::new(
"_mm512_prefetch_i32gather_pd",
"void _mm512_prefetch_i32gather_pd(__m256i vindex, void const *base_addr, int scale, int hint)",
X86IsaExtension::Avx512pf,
"VGATHERPF0DPD",
"Prefetch double-precision FP using 32-bit gather indices and hint.",
),
X86IntrinsicEntry::new(
"_mm512_prefetch_i64gather_pd",
"void _mm512_prefetch_i64gather_pd(__m512i vindex, void const *base_addr, int scale, int hint)",
X86IsaExtension::Avx512pf,
"VGATHERPF0QPD",
"Prefetch double-precision FP using 64-bit gather indices and hint.",
),
X86IntrinsicEntry::new(
"_mm512_prefetch_i32scatter_ps",
"void _mm512_prefetch_i32scatter_ps(void *base_addr, __m512i vindex, int scale, int hint)",
X86IsaExtension::Avx512pf,
"VSCATTERPF0DPS",
"Prefetch single-precision FP using 32-bit scatter indices and hint.",
),
X86IntrinsicEntry::new(
"_mm512_prefetch_i64scatter_ps",
"void _mm512_prefetch_i64scatter_ps(void *base_addr, __m512i vindex, int scale, int hint)",
X86IsaExtension::Avx512pf,
"VSCATTERPF0QPS",
"Prefetch single-precision FP using 64-bit scatter indices and hint.",
),
]
}
fn avx512bw_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm512_add_epi8",
"__m512i _mm512_add_epi8(__m512i a, __m512i b)",
X86IsaExtension::Avx512bw,
"VPADDB",
"Add packed 8-bit integers (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_add_epi16",
"__m512i _mm512_add_epi16(__m512i a, __m512i b)",
X86IsaExtension::Avx512bw,
"VPADDW",
"Add packed 16-bit integers (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_sub_epi8",
"__m512i _mm512_sub_epi8(__m512i a, __m512i b)",
X86IsaExtension::Avx512bw,
"VPSUBB",
"Subtract packed 8-bit integers (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_sub_epi16",
"__m512i _mm512_sub_epi16(__m512i a, __m512i b)",
X86IsaExtension::Avx512bw,
"VPSUBW",
"Subtract packed 16-bit integers (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_cmpeq_epi8_mask",
"__mmask64 _mm512_cmpeq_epi8_mask(__m512i a, __m512i b)",
X86IsaExtension::Avx512bw,
"VPCMPEQB",
"Compare packed 8-bit integers for equality and return a 64-bit mask.",
),
X86IntrinsicEntry::new(
"_mm512_cmpeq_epi16_mask",
"__mmask32 _mm512_cmpeq_epi16_mask(__m512i a, __m512i b)",
X86IsaExtension::Avx512bw,
"VPCMPEQW",
"Compare packed 16-bit integers for equality and return a 32-bit mask.",
),
X86IntrinsicEntry::new(
"_mm512_shuffle_epi8",
"__m512i _mm512_shuffle_epi8(__m512i a, __m512i b)",
X86IsaExtension::Avx512bw,
"VPSHUFB",
"Shuffle packed 8-bit integers according to b (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_slli_epi16",
"__m512i _mm512_slli_epi16(__m512i a, unsigned int imm8)",
X86IsaExtension::Avx512bw,
"VPSLLW",
"Shift packed 16-bit integers left by immediate (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_srai_epi16",
"__m512i _mm512_srai_epi16(__m512i a, unsigned int imm8)",
X86IsaExtension::Avx512bw,
"VPSRAW",
"Shift packed 16-bit integers right arithmetically by immediate (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_sllv_epi16",
"__m512i _mm512_sllv_epi16(__m512i a, __m512i count)",
X86IsaExtension::Avx512bw,
"VPSLLVW",
"Shift packed 16-bit integers left by variable count (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_srlv_epi16",
"__m512i _mm512_srlv_epi16(__m512i a, __m512i count)",
X86IsaExtension::Avx512bw,
"VPSRLVW",
"Shift packed 16-bit integers right logically by variable count (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_mask_blend_epi8",
"__m512i _mm512_mask_blend_epi8(__mmask64 k, __m512i a, __m512i b)",
X86IsaExtension::Avx512bw,
"VPBLENDMB",
"Blend packed 8-bit integers using 64-bit mask.",
),
X86IntrinsicEntry::new(
"_mm512_mask_blend_epi16",
"__m512i _mm512_mask_blend_epi16(__mmask32 k, __m512i a, __m512i b)",
X86IsaExtension::Avx512bw,
"VPBLENDMW",
"Blend packed 16-bit integers using 32-bit mask.",
),
X86IntrinsicEntry::new(
"_mm512_permutexvar_epi16",
"__m512i _mm512_permutexvar_epi16(__m512i idx, __m512i a)",
X86IsaExtension::Avx512bw,
"VPERMW",
"Permute 16-bit integers across all lanes using vector indexes.",
),
]
}
fn avx512dq_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm512_mullo_epi64",
"__m512i _mm512_mullo_epi64(__m512i a, __m512i b)",
X86IsaExtension::Avx512dq,
"VPMULLQ",
"Multiply packed 64-bit integers and store low 64-bit result (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_and_ps",
"__m512 _mm512_and_ps(__m512 a, __m512 b)",
X86IsaExtension::Avx512dq,
"VANDPS",
"Compute the bitwise AND of two 512-bit single-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm512_and_pd",
"__m512d _mm512_and_pd(__m512d a, __m512d b)",
X86IsaExtension::Avx512dq,
"VANDPD",
"Compute the bitwise AND of two 512-bit double-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm512_or_ps",
"__m512 _mm512_or_ps(__m512 a, __m512 b)",
X86IsaExtension::Avx512dq,
"VORPS",
"Compute the bitwise OR of two 512-bit single-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm512_xor_ps",
"__m512 _mm512_xor_ps(__m512 a, __m512 b)",
X86IsaExtension::Avx512dq,
"VXORPS",
"Compute the bitwise XOR of two 512-bit single-precision FP vectors.",
),
X86IntrinsicEntry::new(
"_mm512_extractf64x2_pd",
"__m128d _mm512_extractf64x2_pd(__m512d a, int imm8)",
X86IsaExtension::Avx512dq,
"VEXTRACTF64X2",
"Extract a 128-bit lane of double-precision FP from a 512-bit vector.",
),
X86IntrinsicEntry::new(
"_mm512_extracti64x2_epi64",
"__m128i _mm512_extracti64x2_epi64(__m512i a, int imm8)",
X86IsaExtension::Avx512dq,
"VEXTRACTI64X2",
"Extract a 128-bit lane of 64-bit integers from a 512-bit vector.",
),
X86IntrinsicEntry::new(
"_mm512_insertf64x2",
"__m512d _mm512_insertf64x2(__m512d a, __m128d b, int imm8)",
X86IsaExtension::Avx512dq,
"VINSERTF64X2",
"Insert a 128-bit lane of double-precision FP into a 512-bit vector.",
),
X86IntrinsicEntry::new(
"_mm512_range_pd",
"__m512d _mm512_range_pd(__m512d a, __m512d b, int imm8)",
X86IsaExtension::Avx512dq,
"VRANGEPD",
"Calculate range operation on packed double-precision FP (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_range_ps",
"__m512 _mm512_range_ps(__m512 a, __m512 b, int imm8)",
X86IsaExtension::Avx512dq,
"VRANGEPS",
"Calculate range operation on packed single-precision FP (512-bit).",
),
]
}
fn avx512vl_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm_mask_add_ps",
"__m128 _mm_mask_add_ps(__m128 src, __mmask8 k, __m128 a, __m128 b)",
X86IsaExtension::Avx512vl,
"VADDPS",
"Masked add of packed single-precision FP (128-bit).",
),
X86IntrinsicEntry::new(
"_mm256_mask_add_ps",
"__m256 _mm256_mask_add_ps(__m256 src, __mmask8 k, __m256 a, __m256 b)",
X86IsaExtension::Avx512vl,
"VADDPS",
"Masked add of packed single-precision FP (256-bit).",
),
X86IntrinsicEntry::new(
"_mm_maskz_add_ps",
"__m128 _mm_maskz_add_ps(__mmask8 k, __m128 a, __m128 b)",
X86IsaExtension::Avx512vl,
"VADDPS",
"Zero-masked add of packed single-precision FP (128-bit).",
),
X86IntrinsicEntry::new(
"_mm256_maskz_add_ps",
"__m256 _mm256_maskz_add_ps(__mmask8 k, __m256 a, __m256 b)",
X86IsaExtension::Avx512vl,
"VADDPS",
"Zero-masked add of packed single-precision FP (256-bit).",
),
X86IntrinsicEntry::new(
"_mm_mask_compress_ps",
"__m128 _mm_mask_compress_ps(__m128 src, __mmask8 k, __m128 a)",
X86IsaExtension::Avx512vl,
"VCOMPRESSPS",
"Contiguously store active single-precision FP elements (128-bit) selected by mask.",
),
X86IntrinsicEntry::new(
"_mm256_mask_compress_ps",
"__m256 _mm256_mask_compress_ps(__m256 src, __mmask8 k, __m256 a)",
X86IsaExtension::Avx512vl,
"VCOMPRESSPS",
"Contiguously store active single-precision FP elements (256-bit) selected by mask.",
),
X86IntrinsicEntry::new(
"_mm_mask_expand_ps",
"__m128 _mm_mask_expand_ps(__m128 src, __mmask8 k, __m128 a)",
X86IsaExtension::Avx512vl,
"VEXPANDPS",
"Load sparse single-precision FP elements (128-bit) into active positions.",
),
X86IntrinsicEntry::new(
"_mm256_mask_expand_ps",
"__m256 _mm256_mask_expand_ps(__m256 src, __mmask8 k, __m256 a)",
X86IsaExtension::Avx512vl,
"VEXPANDPS",
"Load sparse single-precision FP elements (256-bit) into active positions.",
),
]
}
fn avx512vbmi_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm512_permutexvar_epi8",
"__m512i _mm512_permutexvar_epi8(__m512i idx, __m512i a)",
X86IsaExtension::Avx512vbmi,
"VPERMB",
"Permute 8-bit integers across all 64 elements using vector indexes.",
),
X86IntrinsicEntry::new(
"_mm512_multishift_epi64_epi8",
"__m512i _mm512_multishift_epi64_epi8(__m512i a, __m512i b)",
X86IsaExtension::Avx512vbmi,
"VPMULTISHIFTQB",
"Select unaligned 8-bit values from 64-bit packed data using shift control.",
),
]
}
fn avx512vbmi2_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm512_mask_compress_epi8",
"__m512i _mm512_mask_compress_epi8(__m512i src, __mmask64 k, __m512i a)",
X86IsaExtension::Avx512vbmi2,
"VPCOMPRESSB",
"Contiguously store active 8-bit integer elements selected by mask (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_mask_expand_epi8",
"__m512i _mm512_mask_expand_epi8(__m512i src, __mmask64 k, __m512i a)",
X86IsaExtension::Avx512vbmi2,
"VPEXPANDB",
"Load sparse 8-bit integer elements into active positions (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_shrdi_epi16",
"__m512i _mm512_shrdi_epi16(__m512i a, __m512i b, int imm8)",
X86IsaExtension::Avx512vbmi2,
"VPSHRDW",
"Concatenate and right-shift 16-bit integers by immediate (512-bit).",
),
]
}
fn avx512vnni_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm512_dpbusd_epi32",
"__m512i _mm512_dpbusd_epi32(__m512i src, __m512i a, __m512i b)",
X86IsaExtension::Avx512vnni,
"VPDPBUSD",
"Multiply unsigned 8-bit integers by signed 8-bit, add to 32-bit accumulator.",
),
X86IntrinsicEntry::new(
"_mm512_dpbusds_epi32",
"__m512i _mm512_dpbusds_epi32(__m512i src, __m512i a, __m512i b)",
X86IsaExtension::Avx512vnni,
"VPDPBUSDS",
"Multiply unsigned 8-bit by signed 8-bit, add to 32-bit accumulator with saturation.",
),
X86IntrinsicEntry::new(
"_mm512_dpwssd_epi32",
"__m512i _mm512_dpwssd_epi32(__m512i src, __m512i a, __m512i b)",
X86IsaExtension::Avx512vnni,
"VPDPWSSD",
"Multiply signed 16-bit integers and add to 32-bit accumulator.",
),
X86IntrinsicEntry::new(
"_mm512_dpwssds_epi32",
"__m512i _mm512_dpwssds_epi32(__m512i src, __m512i a, __m512i b)",
X86IsaExtension::Avx512vnni,
"VPDPWSSDS",
"Multiply signed 16-bit integers and add to 32-bit accumulator with saturation.",
),
]
}
fn avx512bitalg_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm512_popcnt_epi8",
"__m512i _mm512_popcnt_epi8(__m512i a)",
X86IsaExtension::Avx512bitalg,
"VPOPCNTB",
"Count the number of bits set to 1 in each packed 8-bit integer.",
),
X86IntrinsicEntry::new(
"_mm512_popcnt_epi16",
"__m512i _mm512_popcnt_epi16(__m512i a)",
X86IsaExtension::Avx512bitalg,
"VPOPCNTW",
"Count the number of bits set to 1 in each packed 16-bit integer.",
),
X86IntrinsicEntry::new(
"_mm512_mask_bitshuffle_epi64_mask",
"__mmask64 _mm512_mask_bitshuffle_epi64_mask(__mmask64 k, __m512i a, __m512i b)",
X86IsaExtension::Avx512bitalg,
"VPSHUFBITQMB",
"Bit shuffle 64-bit integers and generate a mask from selected bits.",
),
]
}
fn avx512vpopcntdq_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm512_popcnt_epi32",
"__m512i _mm512_popcnt_epi32(__m512i a)",
X86IsaExtension::Avx512vpopcntdq,
"VPOPCNTD",
"Count the number of bits set to 1 in each packed 32-bit integer (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_popcnt_epi64",
"__m512i _mm512_popcnt_epi64(__m512i a)",
X86IsaExtension::Avx512vpopcntdq,
"VPOPCNTQ",
"Count the number of bits set to 1 in each packed 64-bit integer (512-bit).",
),
]
}
fn avx512bf16_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm512_cvtne2ps_pbh",
"__m512bh _mm512_cvtne2ps_pbh(__m512 a, __m512 b)",
X86IsaExtension::Avx512bf16,
"VCVTNE2PS2BF16",
"Convert two vectors of packed single-precision FP to packed BF16.",
),
X86IntrinsicEntry::new(
"_mm512_cvtneps_pbh",
"__m256bh _mm512_cvtneps_pbh(__m512 a)",
X86IsaExtension::Avx512bf16,
"VCVTNEPS2BF16",
"Convert packed single-precision FP (512-bit) to packed BF16 (256-bit).",
),
X86IntrinsicEntry::new(
"_mm512_dpbf16_ps",
"__m512 _mm512_dpbf16_ps(__m512 src, __m512bh a, __m512bh b)",
X86IsaExtension::Avx512bf16,
"VDPBF16PS",
"Dot product of BF16 pairs accumulated into single-precision FP.",
),
]
}
fn avx512fp16_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm512_add_ph",
"__m512h _mm512_add_ph(__m512h a, __m512h b)",
X86IsaExtension::Avx512fp16,
"VADDPH",
"Add packed half-precision FP (512-bit) values.",
),
X86IntrinsicEntry::new(
"_mm512_mul_ph",
"__m512h _mm512_mul_ph(__m512h a, __m512h b)",
X86IsaExtension::Avx512fp16,
"VMULPH",
"Multiply packed half-precision FP (512-bit) values.",
),
X86IntrinsicEntry::new(
"_mm512_fmadd_ph",
"__m512h _mm512_fmadd_ph(__m512h a, __m512h b, __m512h c)",
X86IsaExtension::Avx512fp16,
"VFMADD132PH",
"Fused multiply-add of packed half-precision FP (512-bit): a * b + c.",
),
X86IntrinsicEntry::new(
"_mm512_cvtph_ps",
"__m512 _mm512_cvtph_ps(__m256h a)",
X86IsaExtension::Avx512fp16,
"VCVTPH2PS",
"Convert packed half-precision FP (256-bit) to single-precision FP (512-bit).",
),
X86IntrinsicEntry::new(
"_mm512_cvtps_ph",
"__m256h _mm512_cvtps_ph(__m512 a, int rounding)",
X86IsaExtension::Avx512fp16,
"VCVTPS2PH",
"Convert packed single-precision FP (512-bit) to half-precision FP (256-bit).",
),
X86IntrinsicEntry::new(
"_mm512_sqrt_ph",
"__m512h _mm512_sqrt_ph(__m512h a)",
X86IsaExtension::Avx512fp16,
"VSQRTPH",
"Compute the square root of packed half-precision FP (512-bit) values.",
),
]
}
fn bmi_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_andn_u32",
"unsigned int _andn_u32(unsigned int a, unsigned int b)",
X86IsaExtension::Bmi,
"ANDN",
"Compute bitwise AND of inverted a with b: (~a) & b.",
),
X86IntrinsicEntry::new(
"_andn_u64",
"unsigned int64_t _andn_u64(unsigned int64_t a, unsigned int64_t b)",
X86IsaExtension::Bmi,
"ANDN",
"Compute bitwise AND of inverted a with b (64-bit): (~a) & b.",
),
X86IntrinsicEntry::new(
"_bextr_u32",
"unsigned int _bextr_u32(unsigned int a, unsigned int start, unsigned int len)",
X86IsaExtension::Bmi,
"BEXTR",
"Extract contiguous bits from a starting at 'start' with length 'len'.",
),
X86IntrinsicEntry::new(
"_bextr_u64",
"unsigned int64_t _bextr_u64(unsigned int64_t a, unsigned int start, unsigned int len)",
X86IsaExtension::Bmi,
"BEXTR",
"Extract contiguous bits from a (64-bit) starting at 'start' with length 'len'.",
),
X86IntrinsicEntry::new(
"_blsi_u32",
"unsigned int _blsi_u32(unsigned int a)",
X86IsaExtension::Bmi,
"BLSI",
"Extract the lowest set bit of a: a & (-a).",
),
X86IntrinsicEntry::new(
"_blsi_u64",
"unsigned int64_t _blsi_u64(unsigned int64_t a)",
X86IsaExtension::Bmi,
"BLSI",
"Extract the lowest set bit of a (64-bit): a & (-a).",
),
X86IntrinsicEntry::new(
"_blsmsk_u32",
"unsigned int _blsmsk_u32(unsigned int a)",
X86IsaExtension::Bmi,
"BLSMSK",
"Set all bits up to (but not including) the lowest set bit: a ^ (a - 1).",
),
X86IntrinsicEntry::new(
"_blsmsk_u64",
"unsigned int64_t _blsmsk_u64(unsigned int64_t a)",
X86IsaExtension::Bmi,
"BLSMSK",
"Set all bits up to (but not including) the lowest set bit (64-bit).",
),
X86IntrinsicEntry::new(
"_blsr_u32",
"unsigned int _blsr_u32(unsigned int a)",
X86IsaExtension::Bmi,
"BLSR",
"Reset the lowest set bit of a: a & (a - 1).",
),
X86IntrinsicEntry::new(
"_blsr_u64",
"unsigned int64_t _blsr_u64(unsigned int64_t a)",
X86IsaExtension::Bmi,
"BLSR",
"Reset the lowest set bit of a (64-bit): a & (a - 1).",
),
X86IntrinsicEntry::new(
"_tzcnt_u32",
"unsigned int _tzcnt_u32(unsigned int a)",
X86IsaExtension::Bmi,
"TZCNT",
"Count the number of trailing zero bits in a 32-bit integer.",
),
X86IntrinsicEntry::new(
"_tzcnt_u64",
"unsigned int64_t _tzcnt_u64(unsigned int64_t a)",
X86IsaExtension::Bmi,
"TZCNT",
"Count the number of trailing zero bits in a 64-bit integer.",
),
]
}
fn bmi2_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_bzhi_u32",
"unsigned int _bzhi_u32(unsigned int a, unsigned int index)",
X86IsaExtension::Bmi2,
"BZHI",
"Zero the high bits of a starting at position 'index'.",
),
X86IntrinsicEntry::new(
"_bzhi_u64",
"unsigned int64_t _bzhi_u64(unsigned int64_t a, unsigned int index)",
X86IsaExtension::Bmi2,
"BZHI",
"Zero the high bits of a (64-bit) starting at position 'index'.",
),
X86IntrinsicEntry::new(
"_mulx_u32",
"unsigned int _mulx_u32(unsigned int a, unsigned int b, unsigned int *hi)",
X86IsaExtension::Bmi2,
"MULX",
"Unsigned multiply of 32-bit operands without affecting flags, return lo/hi pair.",
),
X86IntrinsicEntry::new(
"_mulx_u64",
"unsigned int64_t _mulx_u64(unsigned int64_t a, unsigned int64_t b, unsigned int64_t *hi)",
X86IsaExtension::Bmi2,
"MULX",
"Unsigned multiply of 64-bit operands without affecting flags, return lo/hi pair.",
),
X86IntrinsicEntry::new(
"_pdep_u32",
"unsigned int _pdep_u32(unsigned int a, unsigned int mask)",
X86IsaExtension::Bmi2,
"PDEP",
"Deposit bits from a into result at positions indicated by mask.",
),
X86IntrinsicEntry::new(
"_pdep_u64",
"unsigned int64_t _pdep_u64(unsigned int64_t a, unsigned int64_t mask)",
X86IsaExtension::Bmi2,
"PDEP",
"Deposit bits from a (64-bit) into result at positions indicated by mask.",
),
X86IntrinsicEntry::new(
"_pext_u32",
"unsigned int _pext_u32(unsigned int a, unsigned int mask)",
X86IsaExtension::Bmi2,
"PEXT",
"Extract bits from a at positions indicated by mask, compact into result.",
),
X86IntrinsicEntry::new(
"_pext_u64",
"unsigned int64_t _pext_u64(unsigned int64_t a, unsigned int64_t mask)",
X86IsaExtension::Bmi2,
"PEXT",
"Extract bits from a (64-bit) at positions indicated by mask, compact into result.",
),
X86IntrinsicEntry::new(
"_rorx_u32",
"unsigned int _rorx_u32(unsigned int a, const unsigned int imm8)",
X86IsaExtension::Bmi2,
"RORX",
"Rotate right a 32-bit integer by an immediate value without affecting flags.",
),
X86IntrinsicEntry::new(
"_rorx_u64",
"unsigned int64_t _rorx_u64(unsigned int64_t a, const unsigned int imm8)",
X86IsaExtension::Bmi2,
"RORX",
"Rotate right a 64-bit integer by an immediate value without affecting flags.",
),
X86IntrinsicEntry::new(
"_sarx_u32",
"unsigned int _sarx_u32(unsigned int a, unsigned int count)",
X86IsaExtension::Bmi2,
"SARX",
"Arithmetic shift right a 32-bit integer by variable count without affecting flags.",
),
X86IntrinsicEntry::new(
"_sarx_u64",
"unsigned int64_t _sarx_u64(unsigned int64_t a, unsigned int count)",
X86IsaExtension::Bmi2,
"SARX",
"Arithmetic shift right a 64-bit integer by variable count without affecting flags.",
),
X86IntrinsicEntry::new(
"_shlx_u32",
"unsigned int _shlx_u32(unsigned int a, unsigned int count)",
X86IsaExtension::Bmi2,
"SHLX",
"Logical shift left a 32-bit integer by variable count without affecting flags.",
),
X86IntrinsicEntry::new(
"_shlx_u64",
"unsigned int64_t _shlx_u64(unsigned int64_t a, unsigned int count)",
X86IsaExtension::Bmi2,
"SHLX",
"Logical shift left a 64-bit integer by variable count without affecting flags.",
),
X86IntrinsicEntry::new(
"_shrx_u32",
"unsigned int _shrx_u32(unsigned int a, unsigned int count)",
X86IsaExtension::Bmi2,
"SHRX",
"Logical shift right a 32-bit integer by variable count without affecting flags.",
),
X86IntrinsicEntry::new(
"_shrx_u64",
"unsigned int64_t _shrx_u64(unsigned int64_t a, unsigned int count)",
X86IsaExtension::Bmi2,
"SHRX",
"Logical shift right a 64-bit integer by variable count without affecting flags.",
),
]
}
fn aes_sha_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm_aesenc_si128",
"__m128i _mm_aesenc_si128(__m128i a, __m128i round_key)",
X86IsaExtension::Aes,
"AESENC",
"Perform one round of AES encryption on a 128-bit block using a round key.",
),
X86IntrinsicEntry::new(
"_mm_aesenclast_si128",
"__m128i _mm_aesenclast_si128(__m128i a, __m128i round_key)",
X86IsaExtension::Aes,
"AESENCLAST",
"Perform the last round of AES encryption on a 128-bit block.",
),
X86IntrinsicEntry::new(
"_mm_aesdec_si128",
"__m128i _mm_aesdec_si128(__m128i a, __m128i round_key)",
X86IsaExtension::Aes,
"AESDEC",
"Perform one round of AES decryption on a 128-bit block using a round key.",
),
X86IntrinsicEntry::new(
"_mm_aesdeclast_si128",
"__m128i _mm_aesdeclast_si128(__m128i a, __m128i round_key)",
X86IsaExtension::Aes,
"AESDECLAST",
"Perform the last round of AES decryption on a 128-bit block.",
),
X86IntrinsicEntry::new(
"_mm_aesimc_si128",
"__m128i _mm_aesimc_si128(__m128i a)",
X86IsaExtension::Aes,
"AESIMC",
"Perform the InvMixColumns transformation for AES decryption key schedule.",
),
X86IntrinsicEntry::new(
"_mm_aeskeygenassist_si128",
"__m128i _mm_aeskeygenassist_si128(__m128i a, const int imm8)",
X86IsaExtension::Aes,
"AESKEYGENASSIST",
"Assist in generating the AES round key schedule.",
),
X86IntrinsicEntry::new(
"_mm_sha1rnds4_epu32",
"__m128i _mm_sha1rnds4_epu32(__m128i a, __m128i b, const int imm8)",
X86IsaExtension::Sha,
"SHA1RNDS4",
"Perform four rounds of SHA-1 operation on packed 32-bit integers.",
),
X86IntrinsicEntry::new(
"_mm_sha1nexte_epu32",
"__m128i _mm_sha1nexte_epu32(__m128i a, __m128i b)",
X86IsaExtension::Sha,
"SHA1NEXTE",
"Calculate the SHA-1 state variable E after four rounds.",
),
X86IntrinsicEntry::new(
"_mm_sha1msg1_epu32",
"__m128i _mm_sha1msg1_epu32(__m128i a, __m128i b)",
X86IsaExtension::Sha,
"SHA1MSG1",
"Perform an intermediate calculation of the next SHA-1 message schedule word.",
),
X86IntrinsicEntry::new(
"_mm_sha1msg2_epu32",
"__m128i _mm_sha1msg2_epu32(__m128i a, __m128i b)",
X86IsaExtension::Sha,
"SHA1MSG2",
"Perform the final calculation of the next SHA-1 message schedule word.",
),
X86IntrinsicEntry::new(
"_mm_sha256rnds2_epu32",
"__m128i _mm_sha256rnds2_epu32(__m128i a, __m128i b, __m128i k)",
X86IsaExtension::Sha,
"SHA256RNDS2",
"Perform two rounds of SHA-256 operation using a round key.",
),
X86IntrinsicEntry::new(
"_mm_sha256msg1_epu32",
"__m128i _mm_sha256msg1_epu32(__m128i a, __m128i b)",
X86IsaExtension::Sha,
"SHA256MSG1",
"Perform an intermediate calculation of the next SHA-256 message schedule word.",
),
X86IntrinsicEntry::new(
"_mm_sha256msg2_epu32",
"__m128i _mm_sha256msg2_epu32(__m128i a, __m128i b)",
X86IsaExtension::Sha,
"SHA256MSG2",
"Perform the final calculation of the next SHA-256 message schedule word.",
),
]
}
fn rdrand_rdseed_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_rdrand16_step",
"int _rdrand16_step(unsigned short *val)",
X86IsaExtension::Rdrand,
"RDRAND",
"Generate a 16-bit hardware random number. Returns 1 on success.",
),
X86IntrinsicEntry::new(
"_rdrand32_step",
"int _rdrand32_step(unsigned int *val)",
X86IsaExtension::Rdrand,
"RDRAND",
"Generate a 32-bit hardware random number. Returns 1 on success.",
),
X86IntrinsicEntry::new(
"_rdrand64_step",
"int _rdrand64_step(unsigned int64_t *val)",
X86IsaExtension::Rdrand,
"RDRAND",
"Generate a 64-bit hardware random number. Returns 1 on success.",
),
X86IntrinsicEntry::new(
"_rdseed16_step",
"int _rdseed16_step(unsigned short *val)",
X86IsaExtension::Rdseed,
"RDSEED",
"Generate a 16-bit hardware random seed. Returns 1 on success.",
),
X86IntrinsicEntry::new(
"_rdseed32_step",
"int _rdseed32_step(unsigned int *val)",
X86IsaExtension::Rdseed,
"RDSEED",
"Generate a 32-bit hardware random seed. Returns 1 on success.",
),
X86IntrinsicEntry::new(
"_rdseed64_step",
"int _rdseed64_step(unsigned int64_t *val)",
X86IsaExtension::Rdseed,
"RDSEED",
"Generate a 64-bit hardware random seed. Returns 1 on success.",
),
]
}
fn adx_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_addcarry_u32",
"unsigned char _addcarry_u32(unsigned char c_in, unsigned int a, unsigned int b, unsigned int *out)",
X86IsaExtension::Adx,
"ADCX",
"Add two 32-bit integers plus carry-in; set carry-out flag.",
),
X86IntrinsicEntry::new(
"_addcarry_u64",
"unsigned char _addcarry_u64(unsigned char c_in, unsigned int64_t a, unsigned int64_t b, unsigned int64_t *out)",
X86IsaExtension::Adx,
"ADCX",
"Add two 64-bit integers plus carry-in; set carry-out flag.",
),
X86IntrinsicEntry::new(
"_addcarryx_u32",
"unsigned char _addcarryx_u32(unsigned char c_in, unsigned int a, unsigned int b, unsigned int *out)",
X86IsaExtension::Adx,
"ADOX",
"Add two 32-bit integers plus carry-in using overflow flag; set OF.",
),
X86IntrinsicEntry::new(
"_addcarryx_u64",
"unsigned char _addcarryx_u64(unsigned char c_in, unsigned int64_t a, unsigned int64_t b, unsigned int64_t *out)",
X86IsaExtension::Adx,
"ADOX",
"Add two 64-bit integers plus carry-in using overflow flag; set OF.",
),
X86IntrinsicEntry::new(
"_subborrow_u32",
"unsigned char _subborrow_u32(unsigned char b_in, unsigned int a, unsigned int b, unsigned int *out)",
X86IsaExtension::Adx,
"SBB",
"Subtract two 32-bit integers plus borrow-in; set borrow flag.",
),
X86IntrinsicEntry::new(
"_subborrow_u64",
"unsigned char _subborrow_u64(unsigned char b_in, unsigned int64_t a, unsigned int64_t b, unsigned int64_t *out)",
X86IsaExtension::Adx,
"SBB",
"Subtract two 64-bit integers plus borrow-in; set borrow flag.",
),
]
}
fn gfni_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm_gf2p8affine_epi64_epi8",
"__m128i _mm_gf2p8affine_epi64_epi8(__m128i a, __m128i b, const int imm8)",
X86IsaExtension::Gfni,
"GF2P8AFFINEQB",
"Affine transformation in GF(2^8) on packed bytes using a 8x8 matrix.",
),
X86IntrinsicEntry::new(
"_mm_gf2p8affineinv_epi64_epi8",
"__m128i _mm_gf2p8affineinv_epi64_epi8(__m128i a, __m128i b, const int imm8)",
X86IsaExtension::Gfni,
"GF2P8AFFINEINVQB",
"Inverse affine transformation in GF(2^8) on packed bytes.",
),
X86IntrinsicEntry::new(
"_mm_gf2p8mul_epi8",
"__m128i _mm_gf2p8mul_epi8(__m128i a, __m128i b)",
X86IsaExtension::Gfni,
"GF2P8MULB",
"Multiply packed bytes in GF(2^8) finite field.",
),
X86IntrinsicEntry::new(
"_mm256_gf2p8affine_epi64_epi8",
"__m256i _mm256_gf2p8affine_epi64_epi8(__m256i a, __m256i b, const int imm8)",
X86IsaExtension::Gfni,
"GF2P8AFFINEQB",
"Affine transformation in GF(2^8) on packed bytes (256-bit).",
),
X86IntrinsicEntry::new(
"_mm512_gf2p8affine_epi64_epi8",
"__m512i _mm512_gf2p8affine_epi64_epi8(__m512i a, __m512i b, const int imm8)",
X86IsaExtension::Gfni,
"GF2P8AFFINEQB",
"Affine transformation in GF(2^8) on packed bytes (512-bit).",
),
]
}
fn vpclmulqdq_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_mm_clmulepi64_si128",
"__m128i _mm_clmulepi64_si128(__m128i a, __m128i b, const int imm8)",
X86IsaExtension::Vpclmulqdq,
"PCLMULQDQ",
"Carry-less multiply of two 64-bit integers selected by imm8.",
),
X86IntrinsicEntry::new(
"_mm256_clmulepi64_epi128",
"__m256i _mm256_clmulepi64_epi128(__m256i a, __m256i b, const int imm8)",
X86IsaExtension::Vpclmulqdq,
"VPCLMULQDQ",
"Carry-less multiply of 64-bit integers (256-bit) selected by imm8.",
),
X86IntrinsicEntry::new(
"_mm512_clmulepi64_epi128",
"__m512i _mm512_clmulepi64_epi128(__m512i a, __m512i b, const int imm8)",
X86IsaExtension::Vpclmulqdq,
"VPCLMULQDQ",
"Carry-less multiply of 64-bit integers (512-bit) selected by imm8.",
),
]
}
fn amx_intrinsics() -> Vec<X86IntrinsicEntry> {
vec![
X86IntrinsicEntry::new(
"_tile_loadd",
"void _tile_loadd(int tile, const void *base, int64_t stride)",
X86IsaExtension::Amx,
"TILELOADD",
"Load a tile register from memory with specified stride.",
),
X86IntrinsicEntry::new(
"_tile_stored",
"void _tile_stored(int tile, void *base, int64_t stride)",
X86IsaExtension::Amx,
"TILESTORED",
"Store a tile register to memory with specified stride.",
),
X86IntrinsicEntry::new(
"_tile_dpbssd",
"void _tile_dpbssd(int tdest, int tsrc1, int tsrc2)",
X86IsaExtension::Amx,
"TDPBSSD",
"Compute dot product of signed bytes with signed dword accumulation.",
),
X86IntrinsicEntry::new(
"_tile_dpbsud",
"void _tile_dpbsud(int tdest, int tsrc1, int tsrc2)",
X86IsaExtension::Amx,
"TDPBSUD",
"Compute dot product of signed bytes with unsigned dword accumulation.",
),
X86IntrinsicEntry::new(
"_tile_dpbusd",
"void _tile_dpbusd(int tdest, int tsrc1, int tsrc2)",
X86IsaExtension::Amx,
"TDPBUSD",
"Compute dot product of unsigned bytes with signed dword accumulation.",
),
X86IntrinsicEntry::new(
"_tile_dpbuud",
"void _tile_dpbuud(int tdest, int tsrc1, int tsrc2)",
X86IsaExtension::Amx,
"TDPBUUD",
"Compute dot product of unsigned bytes with unsigned dword accumulation.",
),
X86IntrinsicEntry::new(
"_tile_dpbf16ps",
"void _tile_dpbf16ps(int tdest, int tsrc1, int tsrc2)",
X86IsaExtension::Amx,
"TDPBF16PS",
"Compute dot product of BF16 pairs accumulated into single-precision FP.",
),
X86IntrinsicEntry::new(
"_tile_dpfp16ps",
"void _tile_dpfp16ps(int tdest, int tsrc1, int tsrc2)",
X86IsaExtension::Amx,
"TDPFP16PS",
"Compute dot product of FP16 pairs accumulated into single-precision FP.",
),
X86IntrinsicEntry::new(
"_tile_zero",
"void _tile_zero(int tile)",
X86IsaExtension::Amx,
"TILEZERO",
"Zero the contents of the specified tile register.",
),
X86IntrinsicEntry::new(
"_tile_release",
"void _tile_release(void)",
X86IsaExtension::Amx,
"TILERELEASE",
"Release the AMX tile register state.",
),
X86IntrinsicEntry::new(
"_tile_loadconfig",
"void _tile_loadconfig(const void *mem_addr)",
X86IsaExtension::Amx,
"LDTILECFG",
"Load the AMX tile configuration from a 64-byte memory location.",
),
X86IntrinsicEntry::new(
"_tile_storeconfig",
"void _tile_storeconfig(void *mem_addr)",
X86IsaExtension::Amx,
"STTILECFG",
"Store the AMX tile configuration to a 64-byte memory location.",
),
X86IntrinsicEntry::new(
"_tile_stream_loadd",
"void _tile_stream_loadd(int tile, const void *base, int64_t stride)",
X86IsaExtension::Amx,
"TILELOADDT1",
"Load a tile register from memory with streaming hint.",
),
X86IntrinsicEntry::new(
"_tile_dpssd",
"void _tile_dpssd(int tdest, int tsrc1, int tsrc2)",
X86IsaExtension::Amx,
"TDPSSD",
"Compute dot product of signed words with signed dword accumulation.",
),
X86IntrinsicEntry::new(
"_tile_dpssud",
"void _tile_dpssud(int tdest, int tsrc1, int tsrc2)",
X86IsaExtension::Amx,
"TDPSSUD",
"Compute dot product of signed words with unsigned dword accumulation.",
),
X86IntrinsicEntry::new(
"_tile_dpsusd",
"void _tile_dpsusd(int tdest, int tsrc1, int tsrc2)",
X86IsaExtension::Amx,
"TDPSUSD",
"Compute dot product of unsigned words with signed dword accumulation.",
),
X86IntrinsicEntry::new(
"_tile_dpsuud",
"void _tile_dpsuud(int tdest, int tsrc1, int tsrc2)",
X86IsaExtension::Amx,
"TDPSUUD",
"Compute dot product of unsigned words with unsigned dword accumulation.",
),
]
}
}
impl Default for X86IntrinsicsCatalog {
fn default() -> Self {
Self::new()
}
}
#[derive(Debug, Clone)]
pub struct X86IntrinsicLookup {
pub catalog: X86IntrinsicsCatalog,
name_index: HashMap<String, usize>,
isa_index: HashMap<X86IsaExtension, Vec<usize>>,
instruction_index: HashMap<String, Vec<usize>>,
}
impl X86IntrinsicLookup {
pub fn new(catalog: X86IntrinsicsCatalog) -> Self {
let mut name_index = HashMap::with_capacity(catalog.len());
let mut isa_index: HashMap<X86IsaExtension, Vec<usize>> = HashMap::new();
let mut instruction_index: HashMap<String, Vec<usize>> = HashMap::new();
for (i, entry) in catalog.all().iter().enumerate() {
name_index.insert(entry.name.to_string(), i);
isa_index.entry(entry.isa).or_default().push(i);
instruction_index.entry(entry.instruction.to_string()).or_default().push(i);
}
X86IntrinsicLookup { catalog, name_index, isa_index, instruction_index }
}
pub fn by_name(&self, name: &str) -> Option<&X86IntrinsicEntry> {
self.name_index.get(name).map(|&idx| &self.catalog.all()[idx])
}
pub fn by_isa(&self, isa: X86IsaExtension) -> Vec<&X86IntrinsicEntry> {
self.isa_index
.get(&isa)
.map(|indices| indices.iter().map(|&i| &self.catalog.all()[i]).collect())
.unwrap_or_default()
}
pub fn by_instruction(&self, instruction: &str) -> Vec<&X86IntrinsicEntry> {
self.instruction_index
.get(instruction)
.map(|indices| indices.iter().map(|&i| &self.catalog.all()[i]).collect())
.unwrap_or_default()
}
pub fn contains(&self, name: &str) -> bool {
self.name_index.contains_key(name)
}
pub fn len(&self) -> usize {
self.catalog.len()
}
pub fn is_empty(&self) -> bool {
self.catalog.is_empty()
}
pub fn all_isa_extensions(&self) -> Vec<X86IsaExtension> {
let mut exts: Vec<X86IsaExtension> = self.isa_index.keys().copied().collect();
exts.sort();
exts
}
pub fn count_by_isa(&self) -> HashMap<X86IsaExtension, usize> {
let mut counts = HashMap::new();
for (isa, indices) in &self.isa_index {
counts.insert(*isa, indices.len());
}
counts
}
pub fn find_by_prefix(&self, prefix: &str) -> Vec<&X86IntrinsicEntry> {
self.name_index
.keys()
.filter(|name| name.starts_with(prefix))
.filter_map(|name| self.name_index.get(name).map(|&idx| &self.catalog.all()[idx]))
.collect()
}
pub fn all_instructions(&self) -> Vec<(&str, usize)> {
let mut pairs: Vec<(&str, usize)> = self.instruction_index
.iter()
.map(|(k, v)| (k.as_str(), v.len()))
.collect();
pairs.sort_by_key(|(_, count)| std::cmp::Reverse(*count));
pairs
}
}
impl Default for X86IntrinsicLookup {
fn default() -> Self {
Self::new(X86IntrinsicsCatalog::new())
}
}
#[cfg(test)]
mod tests {
use super::*;
fn test_catalog() -> X86IntrinsicsCatalog {
X86IntrinsicsCatalog::new()
}
fn test_lookup() -> X86IntrinsicLookup {
X86IntrinsicLookup::new(test_catalog())
}
#[test]
fn test_catalog_is_non_empty() {
let cat = test_catalog();
assert!(!cat.is_empty(), "Catalog should contain intrinsics");
assert!(cat.len() > 800, "Catalog should have at least 800 entries");
}
#[test]
fn test_catalog_each_entry_valid() {
let cat = test_catalog();
for entry in cat.all() {
assert!(!entry.name.is_empty(), "Entry must have a name");
assert!(!entry.prototype.is_empty(), "Entry must have a prototype: {}", entry.name);
assert!(!entry.instruction.is_empty(), "Entry must have an instruction: {}", entry.name);
assert!(!entry.description.is_empty(), "Entry must have a description: {}", entry.name);
}
}
#[test]
fn test_catalog_no_duplicate_names() {
let cat = test_catalog();
let mut names: Vec<&str> = cat.all().iter().map(|e| e.name).collect();
let total = names.len();
names.sort_unstable();
names.dedup();
assert_eq!(names.len(), total, "Catalog has duplicate intrinsic names");
}
#[test]
fn test_each_isa_has_entries() {
let cat = test_catalog();
let counts = cat.count_by_isa();
let isas = [
X86IsaExtension::Mmx,
X86IsaExtension::Sse,
X86IsaExtension::Sse2,
X86IsaExtension::Sse3,
X86IsaExtension::Ssse3,
X86IsaExtension::Sse41,
X86IsaExtension::Sse42,
X86IsaExtension::Avx,
X86IsaExtension::Avx2,
X86IsaExtension::Fma,
X86IsaExtension::Avx512f,
X86IsaExtension::Bmi,
X86IsaExtension::Bmi2,
X86IsaExtension::Aes,
X86IsaExtension::Sha,
X86IsaExtension::Adx,
X86IsaExtension::Amx,
];
for isa in &isas {
let count = counts.get(isa).copied().unwrap_or(0);
assert!(count > 0, "ISA {:?} should have at least one entry", isa);
}
}
#[test]
fn test_mmx_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Mmx);
assert!(entries.len() >= 50, "MMX should have at least 50 intrinsics, got {}", entries.len());
}
#[test]
fn test_sse_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Sse);
assert!(entries.len() >= 80, "SSE should have at least 80 intrinsics, got {}", entries.len());
}
#[test]
fn test_sse2_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Sse2);
assert!(entries.len() >= 100, "SSE2 should have at least 100 intrinsics, got {}", entries.len());
}
#[test]
fn test_sse3_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Sse3);
assert!(entries.len() >= 12, "SSE3 should have at least 12 intrinsics, got {}", entries.len());
}
#[test]
fn test_ssse3_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Ssse3);
assert!(entries.len() >= 25, "SSSE3 should have at least 25 intrinsics, got {}", entries.len());
}
#[test]
fn test_sse41_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Sse41);
assert!(entries.len() >= 45, "SSE4.1 should have at least 45 intrinsics, got {}", entries.len());
}
#[test]
fn test_sse42_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Sse42);
assert!(entries.len() >= 9, "SSE4.2 should have at least 9 intrinsics, got {}", entries.len());
}
#[test]
fn test_avx_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Avx);
assert!(entries.len() >= 100, "AVX should have at least 100 intrinsics, got {}", entries.len());
}
#[test]
fn test_avx2_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Avx2);
assert!(entries.len() >= 80, "AVX2 should have at least 80 intrinsics, got {}", entries.len());
}
#[test]
fn test_fma_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Fma);
assert!(entries.len() >= 30, "FMA should have at least 30 intrinsics, got {}", entries.len());
}
#[test]
fn test_avx512f_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Avx512f);
assert!(entries.len() >= 50, "AVX-512F should have at least 50 intrinsics, got {}", entries.len());
}
#[test]
fn test_avx512_total_count() {
let cat = test_catalog();
let avx512_isas = [
X86IsaExtension::Avx512f,
X86IsaExtension::Avx512cd,
X86IsaExtension::Avx512er,
X86IsaExtension::Avx512pf,
X86IsaExtension::Avx512bw,
X86IsaExtension::Avx512dq,
X86IsaExtension::Avx512vl,
X86IsaExtension::Avx512vbmi,
X86IsaExtension::Avx512vbmi2,
X86IsaExtension::Avx512vnni,
X86IsaExtension::Avx512bitalg,
X86IsaExtension::Avx512vpopcntdq,
X86IsaExtension::Avx512bf16,
X86IsaExtension::Avx512fp16,
];
let total: usize = avx512_isas.iter().map(|isa| cat.by_isa(*isa).len()).sum();
assert!(total >= 100, "All AVX-512 combined should have at least 100 intrinsics, got {}", total);
}
#[test]
fn test_bmi_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Bmi);
assert!(entries.len() >= 10, "BMI should have at least 10 intrinsics, got {}", entries.len());
}
#[test]
fn test_bmi2_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Bmi2);
assert!(entries.len() >= 14, "BMI2 should have at least 14 intrinsics, got {}", entries.len());
}
#[test]
fn test_aes_sha_count() {
let cat = test_catalog();
let aes_count = cat.by_isa(X86IsaExtension::Aes).len();
let sha_count = cat.by_isa(X86IsaExtension::Sha).len();
assert!(aes_count >= 6, "AES should have at least 6 intrinsics, got {}", aes_count);
assert!(sha_count >= 6, "SHA should have at least 6 intrinsics, got {}", sha_count);
}
#[test]
fn test_adx_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Adx);
assert!(entries.len() >= 6, "ADX should have at least 6 intrinsics, got {}", entries.len());
}
#[test]
fn test_amx_count() {
let cat = test_catalog();
let entries = cat.by_isa(X86IsaExtension::Amx);
assert!(entries.len() >= 15, "AMX should have at least 15 intrinsics, got {}", entries.len());
}
#[test]
fn test_lookup_by_name_found() {
let lookup = test_lookup();
assert!(lookup.by_name("_mm_add_ps").is_some());
assert!(lookup.by_name("_mm_add_pd").is_some());
assert!(lookup.by_name("_mm_add_epi32").is_some());
assert!(lookup.by_name("_mm_addsub_ps").is_some());
assert!(lookup.by_name("_mm_abs_epi8").is_some());
assert!(lookup.by_name("_mm_blend_ps").is_some());
assert!(lookup.by_name("_mm_cmpistri").is_some());
assert!(lookup.by_name("_mm256_add_ps").is_some());
assert!(lookup.by_name("_mm256_add_epi32").is_some());
assert!(lookup.by_name("_mm_fmadd_ps").is_some());
assert!(lookup.by_name("_mm_aesenc_si128").is_some());
assert!(lookup.by_name("_rdrand32_step").is_some());
assert!(lookup.by_name("_tile_loadd").is_some());
}
#[test]
fn test_lookup_by_name_not_found() {
let lookup = test_lookup();
assert!(lookup.by_name("_mm_nonexistent_intrinsic").is_none());
assert!(lookup.by_name("").is_none());
}
#[test]
fn test_lookup_by_isa() {
let lookup = test_lookup();
let sse = lookup.by_isa(X86IsaExtension::Sse);
assert!(!sse.is_empty());
for entry in &sse {
assert_eq!(entry.isa, X86IsaExtension::Sse);
}
}
#[test]
fn test_lookup_by_instruction() {
let lookup = test_lookup();
let adds = lookup.by_instruction("ADDPS");
assert!(!adds.is_empty());
for entry in &adds {
assert_eq!(entry.instruction, "ADDPS");
}
}
#[test]
fn test_lookup_contains() {
let lookup = test_lookup();
assert!(lookup.contains("_mm_empty"));
assert!(lookup.contains("_mm512_add_ps"));
assert!(!lookup.contains("nonexistent"));
}
#[test]
fn test_lookup_find_by_prefix() {
let lookup = test_lookup();
let mm_adds = lookup.find_by_prefix("_mm_add");
assert!(!mm_adds.is_empty(), "Should find _mm_add_* intrinsics");
for entry in &mm_adds {
assert!(entry.name.starts_with("_mm_add"));
}
}
#[test]
fn test_lookup_all_isa_extensions() {
let lookup = test_lookup();
let exts = lookup.all_isa_extensions();
assert!(exts.len() >= 25, "Should have at least 25 ISA extensions, got {}", exts.len());
}
#[test]
fn test_lookup_count_by_isa() {
let lookup = test_lookup();
let counts = lookup.count_by_isa();
let total: usize = counts.values().sum();
assert_eq!(total, lookup.len(), "Sum of per-ISA counts should equal total");
}
#[test]
fn test_lookup_len() {
let lookup = test_lookup();
assert_eq!(lookup.len(), lookup.catalog.len());
assert!(!lookup.is_empty());
}
#[test]
fn test_lookup_all_instructions() {
let lookup = test_lookup();
let instructions = lookup.all_instructions();
assert!(!instructions.is_empty(), "Should have at least one instruction");
if instructions.len() >= 2 {
assert!(instructions[0].1 >= instructions[1].1);
}
}
#[test]
fn test_sse_intrinsic_mm_load_ps() {
let lookup = test_lookup();
let entry = lookup.by_name("_mm_load_ps").expect("_mm_load_ps should exist");
assert_eq!(entry.isa, X86IsaExtension::Sse);
assert_eq!(entry.instruction, "MOVAPS");
assert!(entry.prototype.contains("__m128"));
assert!(entry.prototype.contains("float const"));
}
#[test]
fn test_sse2_intrinsic_mm_add_pd() {
let lookup = test_lookup();
let entry = lookup.by_name("_mm_add_pd").expect("_mm_add_pd should exist");
assert_eq!(entry.isa, X86IsaExtension::Sse2);
assert_eq!(entry.instruction, "ADDPD");
}
#[test]
fn test_sse3_intrinsic_mm_hadd_ps() {
let lookup = test_lookup();
let entry = lookup.by_name("_mm_hadd_ps").expect("_mm_hadd_ps should exist");
assert_eq!(entry.isa, X86IsaExtension::Sse3);
assert_eq!(entry.instruction, "HADDPS");
}
#[test]
fn test_ssse3_intrinsic_mm_shuffle_epi8() {
let lookup = test_lookup();
let entry = lookup.by_name("_mm_shuffle_epi8").expect("_mm_shuffle_epi8 should exist");
assert_eq!(entry.isa, X86IsaExtension::Ssse3);
assert_eq!(entry.instruction, "PSHUFB");
}
#[test]
fn test_sse41_intrinsic_mm_blendv_ps() {
let lookup = test_lookup();
let entry = lookup.by_name("_mm_blendv_ps").expect("_mm_blendv_ps should exist");
assert_eq!(entry.isa, X86IsaExtension::Sse41);
assert_eq!(entry.instruction, "BLENDVPS");
}
#[test]
fn test_sse42_intrinsic_mm_crc32_u8() {
let lookup = test_lookup();
let entry = lookup.by_name("_mm_crc32_u8").expect("_mm_crc32_u8 should exist");
assert_eq!(entry.isa, X86IsaExtension::Sse42);
assert_eq!(entry.instruction, "CRC32");
}
#[test]
fn test_avx_intrinsic_mm256_add_ps() {
let lookup = test_lookup();
let entry = lookup.by_name("_mm256_add_ps").expect("_mm256_add_ps should exist");
assert_eq!(entry.isa, X86IsaExtension::Avx);
assert_eq!(entry.instruction, "VADDPS");
}
#[test]
fn test_avx2_intrinsic_mm256_i32gather_ps() {
let lookup = test_lookup();
let entry = lookup.by_name("_mm256_i32gather_ps").expect("_mm256_i32gather_ps should exist");
assert_eq!(entry.isa, X86IsaExtension::Avx2);
assert_eq!(entry.instruction, "VGATHERDPS");
}
#[test]
fn test_fma_intrinsic_mm256_fmadd_pd() {
let lookup = test_lookup();
let entry = lookup.by_name("_mm256_fmadd_pd").expect("_mm256_fmadd_pd should exist");
assert_eq!(entry.isa, X86IsaExtension::Fma);
assert_eq!(entry.instruction, "VFMADD132PD");
}
#[test]
fn test_avx512f_intrinsic_mm512_add_ps() {
let lookup = test_lookup();
let entry = lookup.by_name("_mm512_add_ps").expect("_mm512_add_ps should exist");
assert_eq!(entry.isa, X86IsaExtension::Avx512f);
assert_eq!(entry.instruction, "VADDPS");
}
#[test]
fn test_bmi_intrinsic_andn_u32() {
let lookup = test_lookup();
let entry = lookup.by_name("_andn_u32").expect("_andn_u32 should exist");
assert_eq!(entry.isa, X86IsaExtension::Bmi);
assert_eq!(entry.instruction, "ANDN");
}
#[test]
fn test_bmi2_intrinsic_pdep_u64() {
let lookup = test_lookup();
let entry = lookup.by_name("_pdep_u64").expect("_pdep_u64 should exist");
assert_eq!(entry.isa, X86IsaExtension::Bmi2);
assert_eq!(entry.instruction, "PDEP");
}
#[test]
fn test_aes_intrinsic_mm_aesenc_si128() {
let lookup = test_lookup();
let entry = lookup.by_name("_mm_aesenc_si128").expect("_mm_aesenc_si128 should exist");
assert_eq!(entry.isa, X86IsaExtension::Aes);
assert_eq!(entry.instruction, "AESENC");
}
#[test]
fn test_sha_intrinsic_mm_sha1rnds4_epu32() {
let lookup = test_lookup();
let entry = lookup.by_name("_mm_sha1rnds4_epu32").expect("_mm_sha1rnds4_epu32 should exist");
assert_eq!(entry.isa, X86IsaExtension::Sha);
assert_eq!(entry.instruction, "SHA1RNDS4");
}
#[test]
fn test_adx_intrinsic_addcarry_u32() {
let lookup = test_lookup();
let entry = lookup.by_name("_addcarry_u32").expect("_addcarry_u32 should exist");
assert_eq!(entry.isa, X86IsaExtension::Adx);
assert_eq!(entry.instruction, "ADCX");
}
#[test]
fn test_amx_intrinsic_tile_dpbssd() {
let lookup = test_lookup();
let entry = lookup.by_name("_tile_dpbssd").expect("_tile_dpbssd should exist");
assert_eq!(entry.isa, X86IsaExtension::Amx);
assert_eq!(entry.instruction, "TDPBSSD");
}
#[test]
fn test_isa_display_name_not_empty() {
let exts = [
X86IsaExtension::Mmx,
X86IsaExtension::Sse,
X86IsaExtension::Avx,
X86IsaExtension::Avx512f,
X86IsaExtension::Amx,
];
for ext in &exts {
assert!(!ext.display_name().is_empty(), "{} display name should not be empty", ext.display_name());
}
}
#[test]
fn test_isa_introduced_in_not_empty() {
let exts = [
X86IsaExtension::Sse,
X86IsaExtension::Sse2,
X86IsaExtension::Avx,
X86IsaExtension::Fma,
];
for ext in &exts {
assert!(!ext.introduced_in().is_empty(), "{} introduced_in should not be empty", ext.display_name());
}
}
#[test]
fn test_isa_cpuid_feature_not_empty() {
let exts = [
X86IsaExtension::Sse,
X86IsaExtension::Avx2,
X86IsaExtension::Bmi,
];
for ext in &exts {
assert!(!ext.cpuid_feature().is_empty(), "{} cpuid_feature should not be empty", ext.display_name());
}
}
#[test]
fn test_isa_display_format() {
assert_eq!(format!("{}", X86IsaExtension::Avx2), "AVX2");
assert_eq!(format!("{}", X86IsaExtension::Avx512bw), "AVX-512BW");
}
#[test]
fn test_isa_ordering() {
assert!(X86IsaExtension::Sse < X86IsaExtension::Sse2);
assert!(X86IsaExtension::Avx < X86IsaExtension::Avx2);
}
#[test]
fn test_isa_hash_consistency() {
use std::collections::hash_map::DefaultHasher;
use std::hash::{Hash, Hasher};
let mut h1 = DefaultHasher::new();
X86IsaExtension::Sse.hash(&mut h1);
let hash1 = h1.finish();
let mut h2 = DefaultHasher::new();
X86IsaExtension::Sse.hash(&mut h2);
let hash2 = h2.finish();
assert_eq!(hash1, hash2, "Same ISA extension should hash to same value");
}
#[test]
fn test_catalog_find_by_name_case_sensitive() {
let cat = test_catalog();
assert!(cat.find_by_name("_MM_ADD_PS").is_none(), "Lookup should be case-sensitive");
}
#[test]
fn test_catalog_find_by_instruction_nonexistent() {
let cat = test_catalog();
let results = cat.find_by_instruction("NONEXISTENT");
assert!(results.is_empty());
}
#[test]
fn test_catalog_can_be_cloned() {
let cat = test_catalog();
let cloned = cat.clone();
assert_eq!(cat.len(), cloned.len());
}
#[test]
fn test_catalog_all_returns_complete() {
let cat = test_catalog();
assert_eq!(cat.all().len(), cat.len());
}
#[test]
fn test_lookup_by_isa_empty_extension() {
let cat = X86IntrinsicsCatalog { entries: vec![] };
let lookup = X86IntrinsicLookup::new(cat);
let results = lookup.by_isa(X86IsaExtension::Sse);
assert!(results.is_empty());
}
#[test]
fn test_lookup_empty_catalog() {
let cat = X86IntrinsicsCatalog { entries: vec![] };
let lookup = X86IntrinsicLookup::new(cat);
assert!(lookup.is_empty());
assert_eq!(lookup.len(), 0);
assert!(lookup.find_by_prefix("_mm").is_empty());
assert!(lookup.all_instructions().is_empty());
}
#[test]
fn test_default_catalog_and_lookup() {
let cat = X86IntrinsicsCatalog::default();
assert!(!cat.is_empty());
let lookup = X86IntrinsicLookup::default();
assert!(!lookup.is_empty());
}
#[test]
fn test_specific_mmx_intrinsics_exist() {
let lookup = test_lookup();
let required = [
"_mm_empty", "_mm_setzero_si64", "_m_pextrw", "_m_pinsrw",
"_m_pmaxsw", "_m_pmaxub", "_m_pminsw", "_m_pminub",
"_m_pavgb", "_m_pavgw", "_m_pmulhuw", "_m_psadbw",
"_m_pmovmskb", "_m_pshufw", "_m_paddb", "_m_paddw",
"_m_psubw", "_m_pand", "_m_por", "_m_pxor",
"_m_packsswb", "_m_punpckhbw", "_m_punpcklbw",
];
for name in &required {
assert!(lookup.contains(name), "Missing MMX intrinsic: {}", name);
}
}
#[test]
fn test_specific_avx512_intrinsics_exist() {
let lookup = test_lookup();
let required = [
"_mm512_conflict_epi32",
"_mm512_lzcnt_epi32",
"_mm512_exp2a23_ps",
"_mm512_rcp28_ps",
"_mm512_add_epi8",
"_mm512_add_epi16",
"_mm512_mullo_epi64",
"_mm_mask_add_ps",
"_mm256_mask_add_ps",
"_mm512_permutexvar_epi8",
"_mm512_mask_compress_epi8",
"_mm512_dpbusd_epi32",
"_mm512_popcnt_epi8",
"_mm512_popcnt_epi32",
"_mm512_cvtne2ps_pbh",
"_mm512_add_ph",
];
for name in &required {
assert!(lookup.contains(name), "Missing AVX-512 intrinsic: {}", name);
}
}
#[test]
fn test_all_entries_have_unique_isa_specific_name_pattern() {
let cat = test_catalog();
for entry in cat.all() {
if entry.isa == X86IsaExtension::Mmx {
assert!(
entry.name.starts_with("_m_") || entry.name.starts_with("_mm_"),
"MMX intrinsic {} has unexpected prefix", entry.name
);
}
if entry.isa == X86IsaExtension::Avx512f
|| entry.isa == X86IsaExtension::Avx512cd
|| entry.isa == X86IsaExtension::Avx512bw
|| entry.isa == X86IsaExtension::Avx512dq
|| entry.isa == X86IsaExtension::Avx512vl
{
assert!(
entry.name.starts_with("_mm512") || entry.name.starts_with("_mm_") || entry.name.starts_with("_mm256_"),
"AVX-512 intrinsic {} has unexpected prefix for {:?}", entry.name, entry.isa
);
}
}
}
#[test]
fn test_lookup_by_name_then_verify_fields() {
let lookup = test_lookup();
let entry = lookup.by_name("_mm_sqrt_ps").expect("_mm_sqrt_ps should exist");
assert_eq!(entry.isa, X86IsaExtension::Sse);
assert_eq!(entry.instruction, "SQRTPS");
assert!(entry.prototype.contains("__m128"));
assert!(entry.description.contains("square root"));
}
#[test]
fn test_catalog_len_vs_name_index_len() {
let lookup = test_lookup();
assert_eq!(lookup.len(), lookup.name_index.len(), "name_index should have one entry per intrinsic");
}
#[test]
fn test_total_intrinsic_count() {
let cat = test_catalog();
let count = cat.len();
assert!(count >= 800, "Catalog should have at least 800 intrinsics (has {})", count);
println!("Total intrinsic count: {}", count);
}
}