libipt-sys 0.1.1

raw bindings to the libipt intel processor tracing library
Documentation
; Copyright (c) 2015-2019, Intel Corporation
;
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;
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; Test COMM.EXEC in perf_event sideband.
;
; Variant: ring-3 tracing
;          perfect timing information
;
; opt:ptdump --sb:compact --sb:offset
; opt:ptxed --sb:compact --sb:offset
;

org 0x1000
bits 64


; @sb primary(pevent)
; @sb pevent-sample_type(time)
; @sb s0: pevent-mmap-section(text_1, 1, 1, 0x0)
; @sb s1: pevent-itrace-start(1, 1, 0x0)

section text_1 vstart=0x1000 start=0x1000
; @pt p0: psb()
; @pt p1: mode.exec(64bit)
; @pt p2: tsc(0x1)
; @pt p3: fup(3: %l0)
; @pt p4: psbend()
l0: nop

; @pt p5: tip.pgd(0: %l2)
l1: syscall
l2: hlt

; @sb s2: pevent-comm.exec(1, 1, "foo", 0x2)
; @sb s3: pevent-mmap-section(text_2, 1, 1, 0x2)

section text_2 vstart=0x2000 start=0x1010
; @pt p6: tsc(0x3)
; @pt p7: tip.pge(3: %l3)
l3: nop

; @pt p8: fup(1: %l4)
; @pt p9: tip.pgd(0: %l5)
l4: nop
l5: hlt


; @pt .exp(ptdump)
;%0p0  psb
;%0p1  mode.exec    cs.l
;%0s0  PERF_RECORD_MMAP 1/1, 1000, 4,  0, pevent-tip_pgd-comm_exec-mmap-tsc-tip_pge.bin { 0 }
;%0s1  PERF_RECORD_ITRACE_START 1/1 { 0 }
;%0p2  tsc            1
;%0p3  fup          3: %?l0
;%0p4  psbend
;%0p5  tip.pgd      0: %?l2.0
;%0s2  PERF_RECORD_COMM.EXEC 1/1, "foo" { 2 }
;%0s3  PERF_RECORD_MMAP 1/1, 2000, 3, 10, pevent-tip_pgd-comm_exec-mmap-tsc-tip_pge.bin { 2 }
;%0p6  tsc          3
;%0p7  tip.pge      3: %?l3
;%0p8  fup          1: %?l4.2
;%0p9  tip.pgd      0: %?l5.0


; @pt .exp(ptxed)
;%0s0  PERF_RECORD_MMAP 1/1, 1000, 4,  0, pevent-tip_pgd-comm_exec-mmap-tsc-tip_pge.bin { 0 }
;%0s1  PERF_RECORD_ITRACE_START 1/1 { 0 }
;%0l0 # nop
;%0l1 # syscall
;[disabled]
;[enabled]
;%0s2  PERF_RECORD_COMM.EXEC 1/1, "foo" { 2 }
;%0s3  PERF_RECORD_MMAP 1/1, 2000, 3, 10, pevent-tip_pgd-comm_exec-mmap-tsc-tip_pge.bin { 2 }
;%0l3 # nop
;[disabled]