libipt-sys 0.1.1

raw bindings to the libipt intel processor tracing library
Documentation
; Copyright (c) 2017-2019, Intel Corporation
;
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; modification, are permitted provided that the following conditions are met:
;
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;
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; Test FORK in perf_event sideband.
;
; opt:ptdump --sb:compact --sb:offset
; opt:ptxed --event:tick --sb:compact --sb:offset --pevent:kernel-start 0xffffffff80000000
;

org 0x1000
bits 64


; @sb primary(pevent)
; @sb pevent-sample_type(time)
; @sb s0: pevent-mmap-section(kernel, 1, 1, 0x0)
; @sb s1: pevent-mmap-section(text, 1, 1, 0x0)
; @sb s2: pevent-itrace-start(1, 1, 0x0)

section kernel vstart=0xffffffff80000000 start=0x1000
; @pt p0: psb()
; @pt p1: mode.exec(64bit)
; @pt p2: tsc(1)
; @pt p3: fup(3: %l0)
; @pt p4: psbend()
l0: nop

; @sb s3: pevent-fork(2, 1, 2, 1, 2, 2)

; @pt p5: tsc(3)
; @pt p6: tip(3: %l3)
l1: iret
l2: hlt

section text vstart=0x1000 start=0x1010
l3: nop

; @pt p7: fup(1: %l4)
; @pt p8: tip.pgd(0: %l4)
l4: hlt


; @pt .exp(ptdump)
;%0p0  psb
;%0p1  mode.exec    cs.l
;%0s0  PERF_RECORD_MMAP 1/1, ffffffff80000000, 3, 0, pevent-fork.bin  { 0 }
;%0s1  PERF_RECORD_MMAP 1/1, 1000, 2, 10, pevent-fork.bin  { 0 }
;%0s2  PERF_RECORD_ITRACE_START 1/1  { 0 }
;%0p2  tsc            1
;%0p3  fup          3: %?l0
;%0p4  psbend
;%0s3  PERF_RECORD_FORK 2/2, 1/1, 2  { 2 }
;%0p5  tsc          3
;%0p6  tip          3: %?l3
;%0p7  fup          1: %?l4.2
;%0p8  tip.pgd      0: %?l4.0


; @pt .exp(ptxed)
;%0s0  PERF_RECORD_MMAP 1/1, ffffffff80000000, 3, 0, pevent-fork.bin  { 0 }
;%0s1  PERF_RECORD_MMAP 1/1, 1000, 2, 10, pevent-fork.bin  { 0 }
;%0s2  PERF_RECORD_ITRACE_START 1/1  { 0 }
;%0l0 # nop
;%0l1 # iret
;[tick]
;%0s3  PERF_RECORD_FORK 2/2, 1/1, 2  { 2 }
;%0l3 # nop
;[disabled]