#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::SCGC1 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `I2C2`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum I2C2R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl I2C2R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
I2C2R::_0 => false,
I2C2R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> I2C2R {
match value {
false => I2C2R::_0,
true => I2C2R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == I2C2R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == I2C2R::_1
}
}
#[doc = "Possible values of the field `I2C3`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum I2C3R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl I2C3R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
I2C3R::_0 => false,
I2C3R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> I2C3R {
match value {
false => I2C3R::_0,
true => I2C3R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == I2C3R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == I2C3R::_1
}
}
#[doc = "Possible values of the field `UART4`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UART4R {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl UART4R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
UART4R::_0 => false,
UART4R::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> UART4R {
match value {
false => UART4R::_0,
true => UART4R::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == UART4R::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == UART4R::_1
}
}
#[doc = "Values that can be written to the field `I2C2`"]
pub enum I2C2W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl I2C2W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
I2C2W::_0 => false,
I2C2W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _I2C2W<'a> {
w: &'a mut W,
}
impl<'a> _I2C2W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: I2C2W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(I2C2W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(I2C2W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 6;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `I2C3`"]
pub enum I2C3W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl I2C3W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
I2C3W::_0 => false,
I2C3W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _I2C3W<'a> {
w: &'a mut W,
}
impl<'a> _I2C3W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: I2C3W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(I2C3W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(I2C3W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 7;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `UART4`"]
pub enum UART4W {
#[doc = "Clock disabled"]
_0,
#[doc = "Clock enabled"]
_1,
}
impl UART4W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
UART4W::_0 => false,
UART4W::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _UART4W<'a> {
w: &'a mut W,
}
impl<'a> _UART4W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: UART4W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Clock disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(UART4W::_0)
}
#[doc = "Clock enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(UART4W::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 10;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 6 - I2C2 Clock Gate Control"]
#[inline]
pub fn i2c2(&self) -> I2C2R {
I2C2R::_from({
const MASK: bool = true;
const OFFSET: u8 = 6;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 7 - I2C3 Clock Gate Control"]
#[inline]
pub fn i2c3(&self) -> I2C3R {
I2C3R::_from({
const MASK: bool = true;
const OFFSET: u8 = 7;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 10 - UART4 Clock Gate Control"]
#[inline]
pub fn uart4(&self) -> UART4R {
UART4R::_from({
const MASK: bool = true;
const OFFSET: u8 = 10;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 6 - I2C2 Clock Gate Control"]
#[inline]
pub fn i2c2(&mut self) -> _I2C2W {
_I2C2W { w: self }
}
#[doc = "Bit 7 - I2C3 Clock Gate Control"]
#[inline]
pub fn i2c3(&mut self) -> _I2C3W {
_I2C3W { w: self }
}
#[doc = "Bit 10 - UART4 Clock Gate Control"]
#[inline]
pub fn uart4(&mut self) -> _UART4W {
_UART4W { w: self }
}
}