esp32c5 0.2.2

Peripheral access crate for the ESP32-C5
Documentation 
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#[doc = "Register `ICACHE_CTRL` reader"]
pub type R = crate::R<ICACHE_CTRL_SPEC>;
#[doc = "Register `ICACHE_CTRL` writer"]
pub type W = crate::W<ICACHE_CTRL_SPEC>;
#[doc = "Field `ICACHE_SHUT_IBUS2` reader - Reserved"]
pub type ICACHE_SHUT_IBUS2_R = crate::BitReader;
#[doc = "Field `ICACHE_SHUT_IBUS2` writer - Reserved"]
pub type ICACHE_SHUT_IBUS2_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ICACHE_SHUT_IBUS3` reader - Reserved"]
pub type ICACHE_SHUT_IBUS3_R = crate::BitReader;
#[doc = "Field `ICACHE_SHUT_IBUS3` writer - Reserved"]
pub type ICACHE_SHUT_IBUS3_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bit 2 - Reserved"]
    #[inline(always)]
    pub fn icache_shut_ibus2(&self) -> ICACHE_SHUT_IBUS2_R {
        ICACHE_SHUT_IBUS2_R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3 - Reserved"]
    #[inline(always)]
    pub fn icache_shut_ibus3(&self) -> ICACHE_SHUT_IBUS3_R {
        ICACHE_SHUT_IBUS3_R::new(((self.bits >> 3) & 1) != 0)
    }
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("ICACHE_CTRL")
            .field("icache_shut_ibus2", &self.icache_shut_ibus2())
            .field("icache_shut_ibus3", &self.icache_shut_ibus3())
            .finish()
    }
}
impl W {
    #[doc = "Bit 2 - Reserved"]
    #[inline(always)]
    pub fn icache_shut_ibus2(&mut self) -> ICACHE_SHUT_IBUS2_W<'_, ICACHE_CTRL_SPEC> {
        ICACHE_SHUT_IBUS2_W::new(self, 2)
    }
    #[doc = "Bit 3 - Reserved"]
    #[inline(always)]
    pub fn icache_shut_ibus3(&mut self) -> ICACHE_SHUT_IBUS3_W<'_, ICACHE_CTRL_SPEC> {
        ICACHE_SHUT_IBUS3_W::new(self, 3)
    }
}
#[doc = "Instruction cache (ICache) control register\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct ICACHE_CTRL_SPEC;
impl crate::RegisterSpec for ICACHE_CTRL_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [`icache_ctrl::R`](R) reader structure"]
impl crate::Readable for ICACHE_CTRL_SPEC {}
#[doc = "`write(|w| ..)` method takes [`icache_ctrl::W`](W) writer structure"]
impl crate::Writable for ICACHE_CTRL_SPEC {
    type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets ICACHE_CTRL to value 0"]
impl crate::Resettable for ICACHE_CTRL_SPEC {}