esp32 0.5.0

Peripheral access crate for the ESP32
Documentation 
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#[doc = "Reader of register SLAVE2"]
pub type R = crate::R<u32, super::SLAVE2>;
#[doc = "Writer for register SLAVE2"]
pub type W = crate::W<u32, super::SLAVE2>;
#[doc = "Register SLAVE2 `reset()`'s with value 0"]
impl crate::ResetValue for super::SLAVE2 {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}
#[doc = "Reader of field `SLV_WRBUF_DUMMY_CYCLELEN`"]
pub type SLV_WRBUF_DUMMY_CYCLELEN_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `SLV_WRBUF_DUMMY_CYCLELEN`"]
pub struct SLV_WRBUF_DUMMY_CYCLELEN_W<'a> {
    w: &'a mut W,
}
impl<'a> SLV_WRBUF_DUMMY_CYCLELEN_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0xff << 24)) | (((value as u32) & 0xff) << 24);
        self.w
    }
}
#[doc = "Reader of field `SLV_RDBUF_DUMMY_CYCLELEN`"]
pub type SLV_RDBUF_DUMMY_CYCLELEN_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `SLV_RDBUF_DUMMY_CYCLELEN`"]
pub struct SLV_RDBUF_DUMMY_CYCLELEN_W<'a> {
    w: &'a mut W,
}
impl<'a> SLV_RDBUF_DUMMY_CYCLELEN_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0xff << 16)) | (((value as u32) & 0xff) << 16);
        self.w
    }
}
#[doc = "Reader of field `SLV_WRSTA_DUMMY_CYCLELEN`"]
pub type SLV_WRSTA_DUMMY_CYCLELEN_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `SLV_WRSTA_DUMMY_CYCLELEN`"]
pub struct SLV_WRSTA_DUMMY_CYCLELEN_W<'a> {
    w: &'a mut W,
}
impl<'a> SLV_WRSTA_DUMMY_CYCLELEN_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0xff << 8)) | (((value as u32) & 0xff) << 8);
        self.w
    }
}
#[doc = "Reader of field `SLV_RDSTA_DUMMY_CYCLELEN`"]
pub type SLV_RDSTA_DUMMY_CYCLELEN_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `SLV_RDSTA_DUMMY_CYCLELEN`"]
pub struct SLV_RDSTA_DUMMY_CYCLELEN_W<'a> {
    w: &'a mut W,
}
impl<'a> SLV_RDSTA_DUMMY_CYCLELEN_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff);
        self.w
    }
}
impl R {
    #[doc = "Bits 24:31"]
    #[inline(always)]
    pub fn slv_wrbuf_dummy_cyclelen(&self) -> SLV_WRBUF_DUMMY_CYCLELEN_R {
        SLV_WRBUF_DUMMY_CYCLELEN_R::new(((self.bits >> 24) & 0xff) as u8)
    }
    #[doc = "Bits 16:23"]
    #[inline(always)]
    pub fn slv_rdbuf_dummy_cyclelen(&self) -> SLV_RDBUF_DUMMY_CYCLELEN_R {
        SLV_RDBUF_DUMMY_CYCLELEN_R::new(((self.bits >> 16) & 0xff) as u8)
    }
    #[doc = "Bits 8:15"]
    #[inline(always)]
    pub fn slv_wrsta_dummy_cyclelen(&self) -> SLV_WRSTA_DUMMY_CYCLELEN_R {
        SLV_WRSTA_DUMMY_CYCLELEN_R::new(((self.bits >> 8) & 0xff) as u8)
    }
    #[doc = "Bits 0:7"]
    #[inline(always)]
    pub fn slv_rdsta_dummy_cyclelen(&self) -> SLV_RDSTA_DUMMY_CYCLELEN_R {
        SLV_RDSTA_DUMMY_CYCLELEN_R::new((self.bits & 0xff) as u8)
    }
}
impl W {
    #[doc = "Bits 24:31"]
    #[inline(always)]
    pub fn slv_wrbuf_dummy_cyclelen(&mut self) -> SLV_WRBUF_DUMMY_CYCLELEN_W {
        SLV_WRBUF_DUMMY_CYCLELEN_W { w: self }
    }
    #[doc = "Bits 16:23"]
    #[inline(always)]
    pub fn slv_rdbuf_dummy_cyclelen(&mut self) -> SLV_RDBUF_DUMMY_CYCLELEN_W {
        SLV_RDBUF_DUMMY_CYCLELEN_W { w: self }
    }
    #[doc = "Bits 8:15"]
    #[inline(always)]
    pub fn slv_wrsta_dummy_cyclelen(&mut self) -> SLV_WRSTA_DUMMY_CYCLELEN_W {
        SLV_WRSTA_DUMMY_CYCLELEN_W { w: self }
    }
    #[doc = "Bits 0:7"]
    #[inline(always)]
    pub fn slv_rdsta_dummy_cyclelen(&mut self) -> SLV_RDSTA_DUMMY_CYCLELEN_W {
        SLV_RDSTA_DUMMY_CYCLELEN_W { w: self }
    }
}