#[doc = "Reader of register CH0CONF0"]
pub type R = crate::R<u32, super::CH0CONF0>;
#[doc = "Writer for register CH0CONF0"]
pub type W = crate::W<u32, super::CH0CONF0>;
#[doc = "Register CH0CONF0 `reset()`'s with value 0"]
impl crate::ResetValue for super::CH0CONF0 {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Reader of field `CLK_EN`"]
pub type CLK_EN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `CLK_EN`"]
pub struct CLK_EN_W<'a> {
w: &'a mut W,
}
impl<'a> CLK_EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
self.w
}
}
#[doc = "Reader of field `MEM_PD`"]
pub type MEM_PD_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `MEM_PD`"]
pub struct MEM_PD_W<'a> {
w: &'a mut W,
}
impl<'a> MEM_PD_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
self.w
}
}
#[doc = "Reader of field `CARRIER_OUT_LV_CH0`"]
pub type CARRIER_OUT_LV_CH0_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `CARRIER_OUT_LV_CH0`"]
pub struct CARRIER_OUT_LV_CH0_W<'a> {
w: &'a mut W,
}
impl<'a> CARRIER_OUT_LV_CH0_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29);
self.w
}
}
#[doc = "Reader of field `CARRIER_EN_CH0`"]
pub type CARRIER_EN_CH0_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `CARRIER_EN_CH0`"]
pub struct CARRIER_EN_CH0_W<'a> {
w: &'a mut W,
}
impl<'a> CARRIER_EN_CH0_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
self.w
}
}
#[doc = "Reader of field `MEM_SIZE_CH0`"]
pub type MEM_SIZE_CH0_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `MEM_SIZE_CH0`"]
pub struct MEM_SIZE_CH0_W<'a> {
w: &'a mut W,
}
impl<'a> MEM_SIZE_CH0_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x0f << 24)) | (((value as u32) & 0x0f) << 24);
self.w
}
}
#[doc = "Reader of field `IDLE_THRES_CH0`"]
pub type IDLE_THRES_CH0_R = crate::R<u16, u16>;
#[doc = "Write proxy for field `IDLE_THRES_CH0`"]
pub struct IDLE_THRES_CH0_W<'a> {
w: &'a mut W,
}
impl<'a> IDLE_THRES_CH0_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u16) -> &'a mut W {
self.w.bits = (self.w.bits & !(0xffff << 8)) | (((value as u32) & 0xffff) << 8);
self.w
}
}
#[doc = "Reader of field `DIV_CNT_CH0`"]
pub type DIV_CNT_CH0_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `DIV_CNT_CH0`"]
pub struct DIV_CNT_CH0_W<'a> {
w: &'a mut W,
}
impl<'a> DIV_CNT_CH0_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff);
self.w
}
}
impl R {
#[doc = "Bit 31"]
#[inline(always)]
pub fn clk_en(&self) -> CLK_EN_R {
CLK_EN_R::new(((self.bits >> 31) & 0x01) != 0)
}
#[doc = "Bit 30"]
#[inline(always)]
pub fn mem_pd(&self) -> MEM_PD_R {
MEM_PD_R::new(((self.bits >> 30) & 0x01) != 0)
}
#[doc = "Bit 29"]
#[inline(always)]
pub fn carrier_out_lv_ch0(&self) -> CARRIER_OUT_LV_CH0_R {
CARRIER_OUT_LV_CH0_R::new(((self.bits >> 29) & 0x01) != 0)
}
#[doc = "Bit 28"]
#[inline(always)]
pub fn carrier_en_ch0(&self) -> CARRIER_EN_CH0_R {
CARRIER_EN_CH0_R::new(((self.bits >> 28) & 0x01) != 0)
}
#[doc = "Bits 24:27"]
#[inline(always)]
pub fn mem_size_ch0(&self) -> MEM_SIZE_CH0_R {
MEM_SIZE_CH0_R::new(((self.bits >> 24) & 0x0f) as u8)
}
#[doc = "Bits 8:23"]
#[inline(always)]
pub fn idle_thres_ch0(&self) -> IDLE_THRES_CH0_R {
IDLE_THRES_CH0_R::new(((self.bits >> 8) & 0xffff) as u16)
}
#[doc = "Bits 0:7"]
#[inline(always)]
pub fn div_cnt_ch0(&self) -> DIV_CNT_CH0_R {
DIV_CNT_CH0_R::new((self.bits & 0xff) as u8)
}
}
impl W {
#[doc = "Bit 31"]
#[inline(always)]
pub fn clk_en(&mut self) -> CLK_EN_W {
CLK_EN_W { w: self }
}
#[doc = "Bit 30"]
#[inline(always)]
pub fn mem_pd(&mut self) -> MEM_PD_W {
MEM_PD_W { w: self }
}
#[doc = "Bit 29"]
#[inline(always)]
pub fn carrier_out_lv_ch0(&mut self) -> CARRIER_OUT_LV_CH0_W {
CARRIER_OUT_LV_CH0_W { w: self }
}
#[doc = "Bit 28"]
#[inline(always)]
pub fn carrier_en_ch0(&mut self) -> CARRIER_EN_CH0_W {
CARRIER_EN_CH0_W { w: self }
}
#[doc = "Bits 24:27"]
#[inline(always)]
pub fn mem_size_ch0(&mut self) -> MEM_SIZE_CH0_W {
MEM_SIZE_CH0_W { w: self }
}
#[doc = "Bits 8:23"]
#[inline(always)]
pub fn idle_thres_ch0(&mut self) -> IDLE_THRES_CH0_W {
IDLE_THRES_CH0_W { w: self }
}
#[doc = "Bits 0:7"]
#[inline(always)]
pub fn div_cnt_ch0(&mut self) -> DIV_CNT_CH0_W {
DIV_CNT_CH0_W { w: self }
}
}