#[doc = "Register `CPU_PER_CONF` reader"]
pub struct R(crate::R<CPU_PER_CONF_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<CPU_PER_CONF_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<CPU_PER_CONF_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<CPU_PER_CONF_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `CPU_PER_CONF` writer"]
pub struct W(crate::W<CPU_PER_CONF_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<CPU_PER_CONF_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<CPU_PER_CONF_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<CPU_PER_CONF_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `FAST_CLK_RTC_SEL` reader - "]
pub struct FAST_CLK_RTC_SEL_R(crate::FieldReader<bool, bool>);
impl FAST_CLK_RTC_SEL_R {
pub(crate) fn new(bits: bool) -> Self {
FAST_CLK_RTC_SEL_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for FAST_CLK_RTC_SEL_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `FAST_CLK_RTC_SEL` writer - "]
pub struct FAST_CLK_RTC_SEL_W<'a> {
w: &'a mut W,
}
impl<'a> FAST_CLK_RTC_SEL_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
self.w
}
}
#[doc = "Field `LOWSPEED_CLK_SEL` reader - "]
pub struct LOWSPEED_CLK_SEL_R(crate::FieldReader<bool, bool>);
impl LOWSPEED_CLK_SEL_R {
pub(crate) fn new(bits: bool) -> Self {
LOWSPEED_CLK_SEL_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for LOWSPEED_CLK_SEL_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `LOWSPEED_CLK_SEL` writer - "]
pub struct LOWSPEED_CLK_SEL_W<'a> {
w: &'a mut W,
}
impl<'a> LOWSPEED_CLK_SEL_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
self.w
}
}
#[doc = "\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum CPUPERIOD_SEL_A {
#[doc = "0: Select 80 MHz clock"]
SEL_80 = 0,
#[doc = "1: Select 160 MHz clock"]
SEL_160 = 1,
#[doc = "2: Select 240 MHz clock"]
SEL_240 = 2,
}
impl From<CPUPERIOD_SEL_A> for u8 {
#[inline(always)]
fn from(variant: CPUPERIOD_SEL_A) -> Self {
variant as _
}
}
#[doc = "Field `CPUPERIOD_SEL` reader - "]
pub struct CPUPERIOD_SEL_R(crate::FieldReader<u8, CPUPERIOD_SEL_A>);
impl CPUPERIOD_SEL_R {
pub(crate) fn new(bits: u8) -> Self {
CPUPERIOD_SEL_R(crate::FieldReader::new(bits))
}
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<CPUPERIOD_SEL_A> {
match self.bits {
0 => Some(CPUPERIOD_SEL_A::SEL_80),
1 => Some(CPUPERIOD_SEL_A::SEL_160),
2 => Some(CPUPERIOD_SEL_A::SEL_240),
_ => None,
}
}
#[doc = "Checks if the value of the field is `SEL_80`"]
#[inline(always)]
pub fn is_sel_80(&self) -> bool {
**self == CPUPERIOD_SEL_A::SEL_80
}
#[doc = "Checks if the value of the field is `SEL_160`"]
#[inline(always)]
pub fn is_sel_160(&self) -> bool {
**self == CPUPERIOD_SEL_A::SEL_160
}
#[doc = "Checks if the value of the field is `SEL_240`"]
#[inline(always)]
pub fn is_sel_240(&self) -> bool {
**self == CPUPERIOD_SEL_A::SEL_240
}
}
impl core::ops::Deref for CPUPERIOD_SEL_R {
type Target = crate::FieldReader<u8, CPUPERIOD_SEL_A>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `CPUPERIOD_SEL` writer - "]
pub struct CPUPERIOD_SEL_W<'a> {
w: &'a mut W,
}
impl<'a> CPUPERIOD_SEL_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CPUPERIOD_SEL_A) -> &'a mut W {
unsafe { self.bits(variant.into()) }
}
#[doc = "Select 80 MHz clock"]
#[inline(always)]
pub fn sel_80(self) -> &'a mut W {
self.variant(CPUPERIOD_SEL_A::SEL_80)
}
#[doc = "Select 160 MHz clock"]
#[inline(always)]
pub fn sel_160(self) -> &'a mut W {
self.variant(CPUPERIOD_SEL_A::SEL_160)
}
#[doc = "Select 240 MHz clock"]
#[inline(always)]
pub fn sel_240(self) -> &'a mut W {
self.variant(CPUPERIOD_SEL_A::SEL_240)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03);
self.w
}
}
impl R {
#[doc = "Bit 3"]
#[inline(always)]
pub fn fast_clk_rtc_sel(&self) -> FAST_CLK_RTC_SEL_R {
FAST_CLK_RTC_SEL_R::new(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 2"]
#[inline(always)]
pub fn lowspeed_clk_sel(&self) -> LOWSPEED_CLK_SEL_R {
LOWSPEED_CLK_SEL_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bits 0:1"]
#[inline(always)]
pub fn cpuperiod_sel(&self) -> CPUPERIOD_SEL_R {
CPUPERIOD_SEL_R::new((self.bits & 0x03) as u8)
}
}
impl W {
#[doc = "Bit 3"]
#[inline(always)]
pub fn fast_clk_rtc_sel(&mut self) -> FAST_CLK_RTC_SEL_W {
FAST_CLK_RTC_SEL_W { w: self }
}
#[doc = "Bit 2"]
#[inline(always)]
pub fn lowspeed_clk_sel(&mut self) -> LOWSPEED_CLK_SEL_W {
LOWSPEED_CLK_SEL_W { w: self }
}
#[doc = "Bits 0:1"]
#[inline(always)]
pub fn cpuperiod_sel(&mut self) -> CPUPERIOD_SEL_W {
CPUPERIOD_SEL_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "DPORT_CPU_PER_CONF\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cpu_per_conf](index.html) module"]
pub struct CPU_PER_CONF_SPEC;
impl crate::RegisterSpec for CPU_PER_CONF_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [cpu_per_conf::R](R) reader structure"]
impl crate::Readable for CPU_PER_CONF_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [cpu_per_conf::W](W) writer structure"]
impl crate::Writable for CPU_PER_CONF_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets CPU_PER_CONF to value 0"]
impl crate::Resettable for CPU_PER_CONF_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}