esp32 0.11.0

Peripheral access crate for the ESP32
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148

#[doc = "Register `APP_DCACHE_DBUG3` reader"]
pub struct R(crate::R<APP_DCACHE_DBUG3_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<APP_DCACHE_DBUG3_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl From<crate::R<APP_DCACHE_DBUG3_SPEC>> for R {
    #[inline(always)]
    fn from(reader: crate::R<APP_DCACHE_DBUG3_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `APP_DCACHE_DBUG3` writer"]
pub struct W(crate::W<APP_DCACHE_DBUG3_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<APP_DCACHE_DBUG3_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl From<crate::W<APP_DCACHE_DBUG3_SPEC>> for W {
    #[inline(always)]
    fn from(writer: crate::W<APP_DCACHE_DBUG3_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `APP_CACHE_IRAM0_PID_ERROR` reader - "]
pub struct APP_CACHE_IRAM0_PID_ERROR_R(crate::FieldReader<bool, bool>);
impl APP_CACHE_IRAM0_PID_ERROR_R {
    pub(crate) fn new(bits: bool) -> Self {
        APP_CACHE_IRAM0_PID_ERROR_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for APP_CACHE_IRAM0_PID_ERROR_R {
    type Target = crate::FieldReader<bool, bool>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `APP_CACHE_IRAM0_PID_ERROR` writer - "]
pub struct APP_CACHE_IRAM0_PID_ERROR_W<'a> {
    w: &'a mut W,
}
impl<'a> APP_CACHE_IRAM0_PID_ERROR_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
        self.w
    }
}
#[doc = "Field `APP_CPU_DISABLED_CACHE_IA` reader - "]
pub struct APP_CPU_DISABLED_CACHE_IA_R(crate::FieldReader<u8, u8>);
impl APP_CPU_DISABLED_CACHE_IA_R {
    pub(crate) fn new(bits: u8) -> Self {
        APP_CPU_DISABLED_CACHE_IA_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for APP_CPU_DISABLED_CACHE_IA_R {
    type Target = crate::FieldReader<u8, u8>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `APP_CPU_DISABLED_CACHE_IA` writer - "]
pub struct APP_CPU_DISABLED_CACHE_IA_W<'a> {
    w: &'a mut W,
}
impl<'a> APP_CPU_DISABLED_CACHE_IA_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x3f << 9)) | ((value as u32 & 0x3f) << 9);
        self.w
    }
}
impl R {
    #[doc = "Bit 15"]
    #[inline(always)]
    pub fn app_cache_iram0_pid_error(&self) -> APP_CACHE_IRAM0_PID_ERROR_R {
        APP_CACHE_IRAM0_PID_ERROR_R::new(((self.bits >> 15) & 0x01) != 0)
    }
    #[doc = "Bits 9:14"]
    #[inline(always)]
    pub fn app_cpu_disabled_cache_ia(&self) -> APP_CPU_DISABLED_CACHE_IA_R {
        APP_CPU_DISABLED_CACHE_IA_R::new(((self.bits >> 9) & 0x3f) as u8)
    }
}
impl W {
    #[doc = "Bit 15"]
    #[inline(always)]
    pub fn app_cache_iram0_pid_error(&mut self) -> APP_CACHE_IRAM0_PID_ERROR_W {
        APP_CACHE_IRAM0_PID_ERROR_W { w: self }
    }
    #[doc = "Bits 9:14"]
    #[inline(always)]
    pub fn app_cpu_disabled_cache_ia(&mut self) -> APP_CPU_DISABLED_CACHE_IA_W {
        APP_CPU_DISABLED_CACHE_IA_W { w: self }
    }
    #[doc = "Writes raw bits to the register."]
    #[inline(always)]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "DPORT_APP_DCACHE_DBUG3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [app_dcache_dbug3](index.html) module"]
pub struct APP_DCACHE_DBUG3_SPEC;
impl crate::RegisterSpec for APP_DCACHE_DBUG3_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [app_dcache_dbug3::R](R) reader structure"]
impl crate::Readable for APP_DCACHE_DBUG3_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [app_dcache_dbug3::W](W) writer structure"]
impl crate::Writable for APP_DCACHE_DBUG3_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets APP_DCACHE_DBUG3 to value 0"]
impl crate::Resettable for APP_DCACHE_DBUG3_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}