efm32pg1b-pac 0.4.3

Peripheral access API for Silicon Labs EFM32PG1B microcontrollers
Documentation 
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///Register `CC1_CCVP` reader
pub type R = crate::R<CC1_CCVPrs>;
///Field `CCVP` reader - CC Channel Value Peek
pub type CcvpR = crate::FieldReader<u16>;
impl R {
    ///Bits 0:15 - CC Channel Value Peek
    #[inline(always)]
    pub fn ccvp(&self) -> CcvpR {
        CcvpR::new((self.bits & 0xffff) as u16)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("CC1_CCVP")
            .field("ccvp", &self.ccvp())
            .finish()
    }
}
///CC Channel Value Peek Register
///
///You can [`read`](crate::Reg::read) this register and get [`cc1_ccvp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
pub struct CC1_CCVPrs;
impl crate::RegisterSpec for CC1_CCVPrs {
    type Ux = u32;
}
///`read()` method returns [`cc1_ccvp::R`](R) reader structure
impl crate::Readable for CC1_CCVPrs {}
///`reset()` method sets CC1_CCVP to value 0
impl crate::Resettable for CC1_CCVPrs {}