Struct SPI0 

pub struct SPI0 { /* private fields */ }

Serial Peripheral Interface

Implementations

impl SPI0

pub const PTR: *const RegisterBlock = {0x4025000 as *const spi0::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn spi_gcr(&self) -> &SPI_GCR

0x04 - SPI Global Control Register

pub fn spi_tcr(&self) -> &SPI_TCR

0x08 - SPI Transfer Control Register

pub fn spi_ier(&self) -> &SPI_IER

0x10 - SPI Interrupt Control Register

pub fn spi_isr(&self) -> &SPI_ISR

0x14 - SPI Interrupt Status Register

pub fn spi_fcr(&self) -> &SPI_FCR

0x18 - SPI FIFO Control Register

pub fn spi_fsr(&self) -> &SPI_FSR

0x1c - SPI FIFO Status Register

pub fn spi_wcr(&self) -> &SPI_WCR

0x20 - SPI Wait Clock Register

pub fn spi_samp_dl(&self) -> &SPI_SAMP_DL

0x28 - SPI Sample Delay Control Register

pub fn spi_mbc(&self) -> &SPI_MBC

0x30 - SPI Master Burst Counter Register

pub fn spi_mtc(&self) -> &SPI_MTC

0x34 - SPI Master Transmit Counter Register

pub fn spi_bcc(&self) -> &SPI_BCC

0x38 - SPI Master Burst Control Register

pub fn spi_batc(&self) -> &SPI_BATC

0x40 - SPI Bit-Aligned Transfer Configure Register

pub fn spi_ba_ccr(&self) -> &SPI_BA_CCR

0x44 - SPI Bit-Aligned Clock Configuration Register

pub fn spi_tbr(&self) -> &SPI_TBR

0x48 - SPI TX Bit Register

VTB [31:0]: The Value of the Transmit Bits

pub fn spi_rbr(&self) -> &SPI_RBR

0x4c - SPI RX Bit Register

VRB [31:0]: The Value of the Receive Bits

pub fn spi_ndma_mode_ctl(&self) -> &SPI_NDMA_MODE_CTL

0x88 - SPI Normal DMA Mode Control Register

pub fn spi_txd_8(&self) -> &SPI_TXD_8

0x200 - SPI TX Data Register

TDATA [7:0]: Transmit Data in byte method

pub fn spi_txd_16(&self) -> &SPI_TXD_16

0x200 - SPI TX Data Register

TDATA [15:0]: Transmit Data in half-word method

pub fn spi_txd(&self) -> &SPI_TXD

0x200 - SPI TX Data Register

TDATA [31:0]: Transmit Data in word method

pub fn spi_rxd_8(&self) -> &SPI_RXD_8

0x300 - SPI RX Data Register

RDATA [7:0]: Receive Data and access in byte method

pub fn spi_rxd_16(&self) -> &SPI_RXD_16

0x300 - SPI RX Data Register

RDATA [15:0]: Receive Data and access in half-word method

pub fn spi_rxd(&self) -> &SPI_RXD

0x300 - SPI RX Data Register

RDATA [31:0]: Receive Data and access in word method

Trait Implementations

impl Debug for SPI0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for SPI0

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for SPI0