d1_pac/
spi0.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    _reserved0: [u8; 0x04],
5    spi_gcr: SPI_GCR,
6    spi_tcr: SPI_TCR,
7    _reserved2: [u8; 0x04],
8    spi_ier: SPI_IER,
9    spi_isr: SPI_ISR,
10    spi_fcr: SPI_FCR,
11    spi_fsr: SPI_FSR,
12    spi_wcr: SPI_WCR,
13    _reserved7: [u8; 0x04],
14    spi_samp_dl: SPI_SAMP_DL,
15    _reserved8: [u8; 0x04],
16    spi_mbc: SPI_MBC,
17    spi_mtc: SPI_MTC,
18    spi_bcc: SPI_BCC,
19    _reserved11: [u8; 0x04],
20    spi_batc: SPI_BATC,
21    spi_ba_ccr: SPI_BA_CCR,
22    spi_tbr: SPI_TBR,
23    spi_rbr: SPI_RBR,
24    _reserved15: [u8; 0x38],
25    spi_ndma_mode_ctl: SPI_NDMA_MODE_CTL,
26    _reserved16: [u8; 0x0174],
27    _reserved_16_spi_: [u8; 0x04],
28    _reserved17: [u8; 0xfc],
29    _reserved_17_spi_: [u8; 0x04],
30}
31impl RegisterBlock {
32    #[doc = "0x04 - SPI Global Control Register"]
33    #[inline(always)]
34    pub const fn spi_gcr(&self) -> &SPI_GCR {
35        &self.spi_gcr
36    }
37    #[doc = "0x08 - SPI Transfer Control Register"]
38    #[inline(always)]
39    pub const fn spi_tcr(&self) -> &SPI_TCR {
40        &self.spi_tcr
41    }
42    #[doc = "0x10 - SPI Interrupt Control Register"]
43    #[inline(always)]
44    pub const fn spi_ier(&self) -> &SPI_IER {
45        &self.spi_ier
46    }
47    #[doc = "0x14 - SPI Interrupt Status Register"]
48    #[inline(always)]
49    pub const fn spi_isr(&self) -> &SPI_ISR {
50        &self.spi_isr
51    }
52    #[doc = "0x18 - SPI FIFO Control Register"]
53    #[inline(always)]
54    pub const fn spi_fcr(&self) -> &SPI_FCR {
55        &self.spi_fcr
56    }
57    #[doc = "0x1c - SPI FIFO Status Register"]
58    #[inline(always)]
59    pub const fn spi_fsr(&self) -> &SPI_FSR {
60        &self.spi_fsr
61    }
62    #[doc = "0x20 - SPI Wait Clock Register"]
63    #[inline(always)]
64    pub const fn spi_wcr(&self) -> &SPI_WCR {
65        &self.spi_wcr
66    }
67    #[doc = "0x28 - SPI Sample Delay Control Register"]
68    #[inline(always)]
69    pub const fn spi_samp_dl(&self) -> &SPI_SAMP_DL {
70        &self.spi_samp_dl
71    }
72    #[doc = "0x30 - SPI Master Burst Counter Register"]
73    #[inline(always)]
74    pub const fn spi_mbc(&self) -> &SPI_MBC {
75        &self.spi_mbc
76    }
77    #[doc = "0x34 - SPI Master Transmit Counter Register"]
78    #[inline(always)]
79    pub const fn spi_mtc(&self) -> &SPI_MTC {
80        &self.spi_mtc
81    }
82    #[doc = "0x38 - SPI Master Burst Control Register"]
83    #[inline(always)]
84    pub const fn spi_bcc(&self) -> &SPI_BCC {
85        &self.spi_bcc
86    }
87    #[doc = "0x40 - SPI Bit-Aligned Transfer Configure Register"]
88    #[inline(always)]
89    pub const fn spi_batc(&self) -> &SPI_BATC {
90        &self.spi_batc
91    }
92    #[doc = "0x44 - SPI Bit-Aligned Clock Configuration Register"]
93    #[inline(always)]
94    pub const fn spi_ba_ccr(&self) -> &SPI_BA_CCR {
95        &self.spi_ba_ccr
96    }
97    #[doc = "0x48 - SPI TX Bit Register\n\nVTB \\[31:0\\]: The Value of the Transmit Bits"]
98    #[inline(always)]
99    pub const fn spi_tbr(&self) -> &SPI_TBR {
100        &self.spi_tbr
101    }
102    #[doc = "0x4c - SPI RX Bit Register\n\nVRB \\[31:0\\]: The Value of the Receive Bits"]
103    #[inline(always)]
104    pub const fn spi_rbr(&self) -> &SPI_RBR {
105        &self.spi_rbr
106    }
107    #[doc = "0x88 - SPI Normal DMA Mode Control Register"]
108    #[inline(always)]
109    pub const fn spi_ndma_mode_ctl(&self) -> &SPI_NDMA_MODE_CTL {
110        &self.spi_ndma_mode_ctl
111    }
112    #[doc = "0x200 - SPI TX Data Register\n\nTDATA \\[7:0\\]: Transmit Data in byte method"]
113    #[inline(always)]
114    pub const fn spi_txd_8(&self) -> &SPI_TXD_8 {
115        unsafe { &*(self as *const Self).cast::<u8>().add(512).cast() }
116    }
117    #[doc = "0x200 - SPI TX Data Register\n\nTDATA \\[15:0\\]: Transmit Data in half-word method"]
118    #[inline(always)]
119    pub const fn spi_txd_16(&self) -> &SPI_TXD_16 {
120        unsafe { &*(self as *const Self).cast::<u8>().add(512).cast() }
121    }
122    #[doc = "0x200 - SPI TX Data Register\n\nTDATA \\[31:0\\]: Transmit Data in word method"]
123    #[inline(always)]
124    pub const fn spi_txd(&self) -> &SPI_TXD {
125        unsafe { &*(self as *const Self).cast::<u8>().add(512).cast() }
126    }
127    #[doc = "0x300 - SPI RX Data Register\n\nRDATA \\[7:0\\]: Receive Data and access in byte method"]
128    #[inline(always)]
129    pub const fn spi_rxd_8(&self) -> &SPI_RXD_8 {
130        unsafe { &*(self as *const Self).cast::<u8>().add(768).cast() }
131    }
132    #[doc = "0x300 - SPI RX Data Register\n\nRDATA \\[15:0\\]: Receive Data and access in half-word method"]
133    #[inline(always)]
134    pub const fn spi_rxd_16(&self) -> &SPI_RXD_16 {
135        unsafe { &*(self as *const Self).cast::<u8>().add(768).cast() }
136    }
137    #[doc = "0x300 - SPI RX Data Register\n\nRDATA \\[31:0\\]: Receive Data and access in word method"]
138    #[inline(always)]
139    pub const fn spi_rxd(&self) -> &SPI_RXD {
140        unsafe { &*(self as *const Self).cast::<u8>().add(768).cast() }
141    }
142}
143#[doc = "spi_gcr (rw) register accessor: SPI Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_gcr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_gcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_gcr`] module"]
144pub type SPI_GCR = crate::Reg<spi_gcr::SPI_GCR_SPEC>;
145#[doc = "SPI Global Control Register"]
146pub mod spi_gcr;
147#[doc = "spi_tcr (rw) register accessor: SPI Transfer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_tcr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_tcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_tcr`] module"]
148pub type SPI_TCR = crate::Reg<spi_tcr::SPI_TCR_SPEC>;
149#[doc = "SPI Transfer Control Register"]
150pub mod spi_tcr;
151#[doc = "spi_ier (rw) register accessor: SPI Interrupt Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_ier::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_ier::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_ier`] module"]
152pub type SPI_IER = crate::Reg<spi_ier::SPI_IER_SPEC>;
153#[doc = "SPI Interrupt Control Register"]
154pub mod spi_ier;
155#[doc = "spi_isr (rw) register accessor: SPI Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_isr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_isr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_isr`] module"]
156pub type SPI_ISR = crate::Reg<spi_isr::SPI_ISR_SPEC>;
157#[doc = "SPI Interrupt Status Register"]
158pub mod spi_isr;
159#[doc = "spi_fcr (rw) register accessor: SPI FIFO Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_fcr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_fcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_fcr`] module"]
160pub type SPI_FCR = crate::Reg<spi_fcr::SPI_FCR_SPEC>;
161#[doc = "SPI FIFO Control Register"]
162pub mod spi_fcr;
163#[doc = "spi_fsr (r) register accessor: SPI FIFO Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_fsr::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_fsr`] module"]
164pub type SPI_FSR = crate::Reg<spi_fsr::SPI_FSR_SPEC>;
165#[doc = "SPI FIFO Status Register"]
166pub mod spi_fsr;
167#[doc = "spi_wcr (rw) register accessor: SPI Wait Clock Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_wcr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_wcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_wcr`] module"]
168pub type SPI_WCR = crate::Reg<spi_wcr::SPI_WCR_SPEC>;
169#[doc = "SPI Wait Clock Register"]
170pub mod spi_wcr;
171#[doc = "spi_samp_dl (rw) register accessor: SPI Sample Delay Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_samp_dl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_samp_dl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_samp_dl`] module"]
172pub type SPI_SAMP_DL = crate::Reg<spi_samp_dl::SPI_SAMP_DL_SPEC>;
173#[doc = "SPI Sample Delay Control Register"]
174pub mod spi_samp_dl;
175#[doc = "spi_mbc (rw) register accessor: SPI Master Burst Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_mbc::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_mbc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_mbc`] module"]
176pub type SPI_MBC = crate::Reg<spi_mbc::SPI_MBC_SPEC>;
177#[doc = "SPI Master Burst Counter Register"]
178pub mod spi_mbc;
179#[doc = "spi_mtc (rw) register accessor: SPI Master Transmit Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_mtc::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_mtc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_mtc`] module"]
180pub type SPI_MTC = crate::Reg<spi_mtc::SPI_MTC_SPEC>;
181#[doc = "SPI Master Transmit Counter Register"]
182pub mod spi_mtc;
183#[doc = "spi_bcc (rw) register accessor: SPI Master Burst Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_bcc::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_bcc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_bcc`] module"]
184pub type SPI_BCC = crate::Reg<spi_bcc::SPI_BCC_SPEC>;
185#[doc = "SPI Master Burst Control Register"]
186pub mod spi_bcc;
187#[doc = "spi_batc (rw) register accessor: SPI Bit-Aligned Transfer Configure Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_batc::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_batc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_batc`] module"]
188pub type SPI_BATC = crate::Reg<spi_batc::SPI_BATC_SPEC>;
189#[doc = "SPI Bit-Aligned Transfer Configure Register"]
190pub mod spi_batc;
191#[doc = "spi_ba_ccr (rw) register accessor: SPI Bit-Aligned Clock Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_ba_ccr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_ba_ccr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_ba_ccr`] module"]
192pub type SPI_BA_CCR = crate::Reg<spi_ba_ccr::SPI_BA_CCR_SPEC>;
193#[doc = "SPI Bit-Aligned Clock Configuration Register"]
194pub mod spi_ba_ccr;
195#[doc = "spi_tbr (rw) register accessor: SPI TX Bit Register\n\nVTB \\[31:0\\]: The Value of the Transmit Bits\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_tbr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_tbr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_tbr`] module"]
196pub type SPI_TBR = crate::Reg<spi_tbr::SPI_TBR_SPEC>;
197#[doc = "SPI TX Bit Register\n\nVTB \\[31:0\\]: The Value of the Transmit Bits"]
198pub mod spi_tbr;
199#[doc = "spi_rbr (rw) register accessor: SPI RX Bit Register\n\nVRB \\[31:0\\]: The Value of the Receive Bits\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_rbr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_rbr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_rbr`] module"]
200pub type SPI_RBR = crate::Reg<spi_rbr::SPI_RBR_SPEC>;
201#[doc = "SPI RX Bit Register\n\nVRB \\[31:0\\]: The Value of the Receive Bits"]
202pub mod spi_rbr;
203#[doc = "spi_ndma_mode_ctl (rw) register accessor: SPI Normal DMA Mode Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_ndma_mode_ctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_ndma_mode_ctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_ndma_mode_ctl`] module"]
204pub type SPI_NDMA_MODE_CTL = crate::Reg<spi_ndma_mode_ctl::SPI_NDMA_MODE_CTL_SPEC>;
205#[doc = "SPI Normal DMA Mode Control Register"]
206pub mod spi_ndma_mode_ctl;
207#[doc = "spi_txd (rw) register accessor: SPI TX Data Register\n\nTDATA \\[31:0\\]: Transmit Data in word method\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_txd::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_txd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_txd`] module"]
208pub type SPI_TXD = crate::Reg<spi_txd::SPI_TXD_SPEC>;
209#[doc = "SPI TX Data Register\n\nTDATA \\[31:0\\]: Transmit Data in word method"]
210pub mod spi_txd;
211#[doc = "spi_txd_16 (rw) register accessor: SPI TX Data Register\n\nTDATA \\[15:0\\]: Transmit Data in half-word method\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_txd_16::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_txd_16::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_txd_16`] module"]
212pub type SPI_TXD_16 = crate::Reg<spi_txd_16::SPI_TXD_16_SPEC>;
213#[doc = "SPI TX Data Register\n\nTDATA \\[15:0\\]: Transmit Data in half-word method"]
214pub mod spi_txd_16;
215#[doc = "spi_txd_8 (rw) register accessor: SPI TX Data Register\n\nTDATA \\[7:0\\]: Transmit Data in byte method\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_txd_8::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_txd_8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_txd_8`] module"]
216pub type SPI_TXD_8 = crate::Reg<spi_txd_8::SPI_TXD_8_SPEC>;
217#[doc = "SPI TX Data Register\n\nTDATA \\[7:0\\]: Transmit Data in byte method"]
218pub mod spi_txd_8;
219#[doc = "spi_rxd (rw) register accessor: SPI RX Data Register\n\nRDATA \\[31:0\\]: Receive Data and access in word method\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_rxd::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_rxd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_rxd`] module"]
220pub type SPI_RXD = crate::Reg<spi_rxd::SPI_RXD_SPEC>;
221#[doc = "SPI RX Data Register\n\nRDATA \\[31:0\\]: Receive Data and access in word method"]
222pub mod spi_rxd;
223#[doc = "spi_rxd_16 (rw) register accessor: SPI RX Data Register\n\nRDATA \\[15:0\\]: Receive Data and access in half-word method\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_rxd_16::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_rxd_16::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_rxd_16`] module"]
224pub type SPI_RXD_16 = crate::Reg<spi_rxd_16::SPI_RXD_16_SPEC>;
225#[doc = "SPI RX Data Register\n\nRDATA \\[15:0\\]: Receive Data and access in half-word method"]
226pub mod spi_rxd_16;
227#[doc = "spi_rxd_8 (rw) register accessor: SPI RX Data Register\n\nRDATA \\[7:0\\]: Receive Data and access in byte method\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spi_rxd_8::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spi_rxd_8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_rxd_8`] module"]
228pub type SPI_RXD_8 = crate::Reg<spi_rxd_8::SPI_RXD_8_SPEC>;
229#[doc = "SPI RX Data Register\n\nRDATA \\[7:0\\]: Receive Data and access in byte method"]
230pub mod spi_rxd_8;
d1_pac/spi0.rs

d1_pac/
spi0.rs
