#[doc = "Register `ECR` reader"]
pub struct R(crate::R<ECR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<ECR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<ECR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<ECR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Field `TEC` reader - Transmit Error Counter Actual state of the Transmit Error Counter, values between 0 and 255"]
pub type TEC_R = crate::FieldReader<u8, u8>;
#[doc = "Field `REC` reader - Receive Error Counter Actual state of the Receive Error Counter, values between 0 and 127"]
pub type REC_R = crate::FieldReader<u8, u8>;
#[doc = "Field `RP` reader - Receive Error Passive 0= The Receive Error Counter is below the error passive level of 128 1= The Receive Error Counter has reached the error passive level of 128"]
pub type RP_R = crate::BitReader<bool>;
#[doc = "Field `CEL` reader - CAN Error Logging The counter is incremented each time when a CAN protocol error causes the Transmit Error Counter or the Receive Error Counter to be incremented. It is reset by read access to CEL. The counter stops at 0xFF; the next increment of TEC or REC sets interrupt flag IR.ELO."]
pub type CEL_R = crate::FieldReader<u8, u8>;
impl R {
#[doc = "Bits 0:7 - Transmit Error Counter Actual state of the Transmit Error Counter, values between 0 and 255"]
#[inline(always)]
pub fn tec(&self) -> TEC_R {
TEC_R::new((self.bits & 0xff) as u8)
}
#[doc = "Bits 8:14 - Receive Error Counter Actual state of the Receive Error Counter, values between 0 and 127"]
#[inline(always)]
pub fn rec(&self) -> REC_R {
REC_R::new(((self.bits >> 8) & 0x7f) as u8)
}
#[doc = "Bit 15 - Receive Error Passive 0= The Receive Error Counter is below the error passive level of 128 1= The Receive Error Counter has reached the error passive level of 128"]
#[inline(always)]
pub fn rp(&self) -> RP_R {
RP_R::new(((self.bits >> 15) & 1) != 0)
}
#[doc = "Bits 16:23 - CAN Error Logging The counter is incremented each time when a CAN protocol error causes the Transmit Error Counter or the Receive Error Counter to be incremented. It is reset by read access to CEL. The counter stops at 0xFF; the next increment of TEC or REC sets interrupt flag IR.ELO."]
#[inline(always)]
pub fn cel(&self) -> CEL_R {
CEL_R::new(((self.bits >> 16) & 0xff) as u8)
}
}
#[doc = "Error Counter Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ecr](index.html) module"]
pub struct ECR_SPEC;
impl crate::RegisterSpec for ECR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [ecr::R](R) reader structure"]
impl crate::Readable for ECR_SPEC {
type Reader = R;
}
#[doc = "`reset()` method sets ECR to value 0"]
impl crate::Resettable for ECR_SPEC {
const RESET_VALUE: Self::Ux = 0;
}