::consortium_hal::peripherals! {
ADC,
ANALOG_CMU0,
ANALOG__AGDET,
ANALOG__AUDIO_FRACT_PLL1,
ANALOG__AUDIO_FRACT_PLL2,
ANALOG__FRO,
ANALOG__OSC24M,
ANALOG__PMRO,
ANALOG__SYS_FRACT_PLL1,
ANALOG__TCU,
ANALOG__TRGMUX,
ANALOG__VDET,
ANALOG__VIDEO_FRACT_PLL1,
AON_CMUA1,
AON_CMUA2,
AON__AXBS,
AON__BLK_CTRL_AONMIX1,
AON__BLK_CTRL_S_AONMIX2,
AON__CRCA,
AON__CSTCU,
AON__EIMA,
AON__FCCU,
AON__IOMUXC0__IOMUXC_GPR,
AON__LSTCUA,
AON__M33_CACHE_CTRL_ECC0__CM33_CACHE_ECC_MCM,
AON__M33_CACHE_CTRL_ECC0__CM33_TCM_MCM,
AON__M33_PCF1,
AON__M33_PSF1,
AON__MCM,
AON__ROMCP1,
AON__SYS_CTR1__SYS_CTR_COMPARE,
AON__SYS_CTR1__SYS_CTR_CONTROL,
AON__SYS_CTR1__SYS_CTR_READ,
AON__TCU,
BBSM__BBNSM,
BBSM__BLK_CTRL_BBSMMIX_BBSMMIX1,
BBSM__TCU_BBSMMIX,
BLK_CTRL_CAMERAMIX,
BLK_CTRL_NETCMIX,
CAMERA__DSI_CAMID_CSR,
CAMERA__DSI_CSI_COMBO_COMPLEX_CSI1__CSI,
CAMERA__DSI_MASTER_CSR,
CAMERA__DSI_OR_CSI_PHY_CSR,
CAMERA__DSI_STREAM_CSR,
CAMERA__ISI,
CAMERA__ISP__ALIAS,
CAMERA__ISP__AUTOFOCUS,
CAMERA__ISP__BNR,
CAMERA__ISP__CAS,
CAMERA__ISP__CCONVMED,
CAMERA__ISP__COLOR_TEMP,
CAMERA__ISP__DEMOSAIC,
CAMERA__ISP__DF,
CAMERA__ISP__DRC,
CAMERA__ISP__EE,
CAMERA__ISP__GCM,
CAMERA__ISP__HC,
CAMERA__ISP__HDR_DECOMPRESS0,
CAMERA__ISP__HDR_DECOMPRESS1,
CAMERA__ISP__HDR_MERGE,
CAMERA__ISP__IDBG1,
CAMERA__ISP__IDBG2,
CAMERA__ISP__IR_COMPRESS,
CAMERA__ISP__NR,
CAMERA__ISP__OB_WB0,
CAMERA__ISP__OB_WB1,
CAMERA__ISP__OB_WB2,
CAMERA__ISP__PACKETIZER,
CAMERA__ISP__PIPE_CONF,
CAMERA__ISP__RGBIR,
CAMERA__ISP__RGB_TO_YUV,
CAMERA__ISP__STAT,
CAMERA__ISP__VIGNETTING,
CAMERA__MUI_A1__MUA,
CAMERA__MUI_A2__MUA,
CAMERA__MUI_A3__MUA,
CAMERA__MUI_A4__MUA,
CAMERA__MUI_A5__MUA,
CAMERA__MUI_A6__MUA,
CAMERA__MUI_A7__MUA,
CAMERA__MUI_A8__MUA,
CAMERA__MUI_A9__MUA,
CAMERA__OCRAM_MECC,
CAMERA__TCU,
CAN1,
CAN2,
CAN3,
CAN4,
CAN5,
CCMSRCGPC__GPC__GPC_GLOBAL,
CCMSRCGPC__SRC__SRC_CENTRAL_REG,
CCMSRCGPC__SRC__XSPR_ANAMIX,
CCMSRCGPC__SRC__XSPR_AONMIX,
CCMSRCGPC__SRC__XSPR_AONMIX_MEM,
CCMSRCGPC__SRC__XSPR_BBSMMIX,
CCMSRCGPC__SRC__XSPR_CAMERAMIX,
CCMSRCGPC__SRC__XSPR_CAMERAMIX_MEM,
CCMSRCGPC__SRC__XSPR_CCMSRCGPCMIX,
CCMSRCGPC__SRC__XSPR_CORTEXMIX_CORE0_MEM,
CCMSRCGPC__SRC__XSPR_CORTEXMIX_CORE1,
CCMSRCGPC__SRC__XSPR_CORTEXMIX_CORE1_MEM,
CCMSRCGPC__SRC__XSPR_CORTEXMIX_CORE2,
CCMSRCGPC__SRC__XSPR_CORTEXMIX_CORE2_MEM,
CCMSRCGPC__SRC__XSPR_CORTEXMIX_CORE3,
CCMSRCGPC__SRC__XSPR_CORTEXMIX_CORE3_MEM,
CCMSRCGPC__SRC__XSPR_CORTEXMIX_CORE4,
CCMSRCGPC__SRC__XSPR_CORTEXMIX_CORE4_MEM,
CCMSRCGPC__SRC__XSPR_CORTEXMIX_CORE5,
CCMSRCGPC__SRC__XSPR_CORTEXMIX_CORE5_MEM,
CCMSRCGPC__SRC__XSPR_CORTEXMIX_PLATFORM_MEM0,
CCMSRCGPC__SRC__XSPR_CORTEXMIX_PLATFORM_MEM1,
CCMSRCGPC__SRC__XSPR_DDRMIX,
CCMSRCGPC__SRC__XSPR_DDRMIX_MEM,
CCMSRCGPC__SRC__XSPR_DISPLAYMIX,
CCMSRCGPC__SRC__XSPR_DISPLAYMIX_MEM,
CCMSRCGPC__SRC__XSPR_GPUMIX,
CCMSRCGPC__SRC__XSPR_GPUMIX_MEM,
CCMSRCGPC__SRC__XSPR_HSIOMIX_MEM,
CCMSRCGPC__SRC__XSPR_HSIOMIX_TOP,
CCMSRCGPC__SRC__XSPR_HSIOMIX_WAON,
CCMSRCGPC__SRC__XSPR_M7MIX,
CCMSRCGPC__SRC__XSPR_M7MIX_MEM,
CCMSRCGPC__SRC__XSPR_NETCMIX,
CCMSRCGPC__SRC__XSPR_NETCMIX_MEM,
CCMSRCGPC__SRC__XSPR_NOCMIX,
CCMSRCGPC__SRC__XSPR_NOCMIX_MEM0,
CCMSRCGPC__SRC__XSPR_NOCMIX_MEM1,
CCMSRCGPC__SRC__XSPR_NPUMIX,
CCMSRCGPC__SRC__XSPR_NPUMIX_MEM,
CCMSRCGPC__SRC__XSPR_VPUMIX,
CCMSRCGPC__SRC__XSPR_VPUMIX_MEM,
CCMSRCGPC__SRC__XSPR_WAKEUPMIX,
CCMSRCGPC__SRC__XSPR_WAKEUPMIX_MEM,
CCMSRCGPC__TCU,
CCM_CTRL,
CORTEXA__FRACT_PLL_ARMPLL,
CORTEXA__TCU,
CORTEX_A55_CORE,
CORTEX_A55_PLATFORM,
DDRC,
DDRC_CMU1,
DDRC_CMU2,
DDRC__BLK_CTRL_DDRMIX,
DDRC__FRACT_PLL,
DDRC__LSTCU,
DDRC__TCU,
DISPLAY_SEERIS,
DISPLAY__BLK_CTRL_DISPLAYMIX,
DISPLAY__FRACT_PLL,
DISPLAY__OCRAM_MECC,
DISPLAY__PIXEL_INTERLEAVER1,
DISPLAY__PIXEL_MAPPER,
DISPLAY__TCU,
DMA3_CH0,
DMA3_CH1,
DMA3_CH2,
DMA3_CH3,
DMA3_CH4,
DMA3_CH5,
DMA3_CH6,
DMA3_CH7,
DMA3_CH8,
DMA3_CH9,
DMA3_CH10,
DMA3_CH11,
DMA3_CH12,
DMA3_CH13,
DMA3_CH14,
DMA3_CH15,
DMA3_CH16,
DMA3_CH17,
DMA3_CH18,
DMA3_CH19,
DMA3_CH20,
DMA3_CH21,
DMA3_CH22,
DMA3_CH23,
DMA3_CH24,
DMA3_CH25,
DMA3_CH26,
DMA3_CH27,
DMA3_CH28,
DMA3_CH29,
DMA3_CH30,
DPU_IRQSTEER,
EDMA5_2_CH0,
EDMA5_2_CH1,
EDMA5_2_CH2,
EDMA5_2_CH3,
EDMA5_2_CH4,
EDMA5_2_CH5,
EDMA5_2_CH6,
EDMA5_2_CH7,
EDMA5_2_CH8,
EDMA5_2_CH9,
EDMA5_2_CH10,
EDMA5_2_CH11,
EDMA5_2_CH12,
EDMA5_2_CH13,
EDMA5_2_CH14,
EDMA5_2_CH15,
EDMA5_2_CH16,
EDMA5_2_CH17,
EDMA5_2_CH18,
EDMA5_2_CH19,
EDMA5_2_CH20,
EDMA5_2_CH21,
EDMA5_2_CH22,
EDMA5_2_CH23,
EDMA5_2_CH24,
EDMA5_2_CH25,
EDMA5_2_CH26,
EDMA5_2_CH27,
EDMA5_2_CH28,
EDMA5_2_CH29,
EDMA5_2_CH30,
EDMA5_2_CH31,
EDMA5_2_CH32,
EDMA5_2_CH33,
EDMA5_2_CH34,
EDMA5_2_CH35,
EDMA5_2_CH36,
EDMA5_2_CH37,
EDMA5_2_CH38,
EDMA5_2_CH39,
EDMA5_2_CH40,
EDMA5_2_CH41,
EDMA5_2_CH42,
EDMA5_2_CH43,
EDMA5_2_CH44,
EDMA5_2_CH45,
EDMA5_2_CH46,
EDMA5_2_CH47,
EDMA5_2_CH48,
EDMA5_2_CH49,
EDMA5_2_CH50,
EDMA5_2_CH51,
EDMA5_2_CH52,
EDMA5_2_CH53,
EDMA5_2_CH54,
EDMA5_2_CH55,
EDMA5_2_CH56,
EDMA5_2_CH57,
EDMA5_2_CH58,
EDMA5_2_CH59,
EDMA5_2_CH60,
EDMA5_2_CH61,
EDMA5_2_CH62,
EDMA5_2_CH63,
EDMA5_3_CH0,
EDMA5_3_CH1,
EDMA5_3_CH2,
EDMA5_3_CH3,
EDMA5_3_CH4,
EDMA5_3_CH5,
EDMA5_3_CH6,
EDMA5_3_CH7,
EDMA5_3_CH8,
EDMA5_3_CH9,
EDMA5_3_CH10,
EDMA5_3_CH11,
EDMA5_3_CH12,
EDMA5_3_CH13,
EDMA5_3_CH14,
EDMA5_3_CH15,
EDMA5_3_CH16,
EDMA5_3_CH17,
EDMA5_3_CH18,
EDMA5_3_CH19,
EDMA5_3_CH20,
EDMA5_3_CH21,
EDMA5_3_CH22,
EDMA5_3_CH23,
EDMA5_3_CH24,
EDMA5_3_CH25,
EDMA5_3_CH26,
EDMA5_3_CH27,
EDMA5_3_CH28,
EDMA5_3_CH29,
EDMA5_3_CH30,
EDMA5_3_CH31,
EDMA5_3_CH32,
EDMA5_3_CH33,
EDMA5_3_CH34,
EDMA5_3_CH35,
EDMA5_3_CH36,
EDMA5_3_CH37,
EDMA5_3_CH38,
EDMA5_3_CH39,
EDMA5_3_CH40,
EDMA5_3_CH41,
EDMA5_3_CH42,
EDMA5_3_CH43,
EDMA5_3_CH44,
EDMA5_3_CH45,
EDMA5_3_CH46,
EDMA5_3_CH47,
EDMA5_3_CH48,
EDMA5_3_CH49,
EDMA5_3_CH50,
EDMA5_3_CH51,
EDMA5_3_CH52,
EDMA5_3_CH53,
EDMA5_3_CH54,
EDMA5_3_CH55,
EDMA5_3_CH56,
EDMA5_3_CH57,
EDMA5_3_CH58,
EDMA5_3_CH59,
EDMA5_3_CH60,
EDMA5_3_CH61,
EDMA5_3_CH62,
EDMA5_3_CH63,
EDMA5_4_CH0,
EDMA5_4_CH1,
EDMA5_4_CH2,
EDMA5_4_CH3,
EDMA5_4_CH4,
EDMA5_4_CH5,
EDMA5_4_CH6,
EDMA5_4_CH7,
EDMA5_4_CH8,
EDMA5_4_CH9,
EDMA5_4_CH10,
EDMA5_4_CH11,
EDMA5_4_CH12,
EDMA5_4_CH13,
EDMA5_4_CH14,
EDMA5_4_CH15,
EDMA5_4_CH16,
EDMA5_4_CH17,
EDMA5_4_CH18,
EDMA5_4_CH19,
EDMA5_4_CH20,
EDMA5_4_CH21,
EDMA5_4_CH22,
EDMA5_4_CH23,
EDMA5_4_CH24,
EDMA5_4_CH25,
EDMA5_4_CH26,
EDMA5_4_CH27,
EDMA5_4_CH28,
EDMA5_4_CH29,
EDMA5_4_CH30,
EDMA5_4_CH31,
EDMA5_4_CH32,
EDMA5_4_CH33,
EDMA5_4_CH34,
EDMA5_4_CH35,
EDMA5_4_CH36,
EDMA5_4_CH37,
EDMA5_4_CH38,
EDMA5_4_CH39,
EDMA5_4_CH40,
EDMA5_4_CH41,
EDMA5_4_CH42,
EDMA5_4_CH43,
EDMA5_4_CH44,
EDMA5_4_CH45,
EDMA5_4_CH46,
EDMA5_4_CH47,
EDMA5_4_CH48,
EDMA5_4_CH49,
EDMA5_4_CH50,
EDMA5_4_CH51,
EDMA5_4_CH52,
EDMA5_4_CH53,
EDMA5_4_CH54,
EDMA5_4_CH55,
EDMA5_4_CH56,
EDMA5_4_CH57,
EDMA5_4_CH58,
EDMA5_4_CH59,
EDMA5_4_CH60,
EDMA5_4_CH61,
EDMA5_4_CH62,
EDMA5_4_CH63,
EMDIO0_PCI_HDR_TYPE0,
EMDIO_BASE,
EMDIO_GLOBAL,
ENETC0_BASE,
ENETC0_COMMON,
ENETC0_ETH_MAC_PORT,
ENETC0_GLOBAL,
ENETC0_PCI_HDR_TYPE0,
ENETC0_PORT,
ENETC0_PSI,
ENETC1_BASE,
ENETC1_COMMON,
ENETC1_ETH_MAC_PORT,
ENETC1_GLOBAL,
ENETC1_PCI_HDR_TYPE0,
ENETC1_PORT,
ENETC1_PSI,
ENETC2_BASE,
ENETC2_COMMON,
ENETC2_ETH_MAC_PORT,
ENETC2_GLOBAL,
ENETC2_PCI_HDR_TYPE0,
ENETC2_PORT,
ENETC2_PSI,
ENETC_VSI0,
ENETC_VSI1,
ENETC_VSI2,
ENETC_VSI3,
ENETC_VSI4,
ENETC_VSI5,
ENET_PHY_MAC_ADAPTER,
ENET_PHY_PMA_MMD,
ENET_PHY_VS_MII_MMD,
ENET_PHY_XS_PCS_MMD,
FLEXIO1,
FLEXIO2,
FLEXSPI,
GPC_CTRL_CA55_0,
GPC_CTRL_CA55_1,
GPC_CTRL_CA55_2,
GPC_CTRL_CA55_3,
GPC_CTRL_CA55_4,
GPC_CTRL_CA55_5,
GPC_CTRL_CA55_CLUSTER,
GPC_CTRL_CM33,
GPC_CTRL_CM7,
GPIO1,
GPIO2,
GPIO3,
GPIO4,
GPIO5,
GPU__BLK_CTRL_GPUMIX,
GPU__REG__DOORBELLS,
GPU__REG__GPU_REGISTERS,
GPU__REG__IPA_CONTROL,
GPU__REG__USER,
GPU__TCU,
HSIO__BLK_CTRL_HSIOMIX,
HSIO__GHZ_LN_PLL,
HSIO__PCIE1__PCIE_DMA_IATU,
HSIO__PCIE1__PCIE_EP,
HSIO__PCIE1__PCIE_RC,
HSIO__PCIE1__PCIE_SHADOW_EP,
HSIO__PCIE1__SERDES_SS,
HSIO__PCIE2__PCIE_DMA_IATU,
HSIO__PCIE2__PCIE_EP,
HSIO__PCIE2__PCIE_RC,
HSIO__PCIE2__PCIE_SHADOW_EP,
HSIO__PCIE2__SERDES_SS,
HSIO__TCU,
HSIO__USB_3_01__GLUE,
HSIO__USB_3_01__USB3,
HSIO__USB_3_0_PHY__TCA,
I3C1,
I3C2,
INTM,
IOMUXC,
IRQSTEER,
LPI2C1,
LPI2C2,
LPI2C3,
LPI2C4,
LPI2C5,
LPI2C6,
LPI2C7,
LPI2C8,
LPIT1,
LPIT2,
LPSPI1,
LPSPI2,
LPSPI3,
LPSPI4,
LPSPI5,
LPSPI6,
LPSPI7,
LPSPI8,
LPTMR1,
LPTMR2,
LPUART1,
LPUART2,
LPUART3,
LPUART4,
LPUART5,
LPUART6,
LPUART7,
LPUART8,
LVDS,
M33_CACHE_CTRLPC,
M33_CACHE_CTRLPS,
M7_CMUM0,
M7_CMUM1,
M7__A7_APB_MCM1,
M7__EIM,
M7__ERM,
M7__LSTCU_M7MIX,
M7__TCU,
MIPI_CSI2,
MIPI_DSI,
MSGINTR1,
MSGINTR2,
MU5_MUA,
MU7_MUB,
MU8_MUB,
NETC_IERB,
NETC_PRIV,
NETC_VF1_PCI_HDR_TYPE0,
NETC_VF2_PCI_HDR_TYPE0,
NETC_VF3_PCI_HDR_TYPE0,
NETC_VF4_PCI_HDR_TYPE0,
NETC_VF5_PCI_HDR_TYPE0,
NETC_VF6_PCI_HDR_TYPE0,
NETC__IEPRC_1__IEPRC_B0_EC_F0_PCI_HDR_TYPE0,
NETC__IEPRC_1__IEPRC_B1_EC_F0_PCI_HDR_TYPE0,
NETC__IEPRC_1__IEPRC_IERB,
NETC__IEPRC_1__IEPRC_PRB,
NETC__TCU,
NOC_CMUN0,
NOC_CMUN1,
NOC__BLK_CTRL_NOCMIX,
NOC__EIMN,
NOC__LSTCUN,
NOC__MMU_TBU_TCU__TBU0,
NOC__MMU_TBU_TCU__TBU1,
NOC__MMU_TBU_TCU__TBU10,
NOC__MMU_TBU_TCU__TBU11,
NOC__MMU_TBU_TCU__TBU2,
NOC__MMU_TBU_TCU__TBU3,
NOC__MMU_TBU_TCU__TBU4,
NOC__MMU_TBU_TCU__TBU5,
NOC__MMU_TBU_TCU__TBU6,
NOC__MMU_TBU_TCU__TBU7,
NOC__MMU_TBU_TCU__TBU9,
NOC__MMU_TBU_TCU__TCU,
NOC__SRAMCTL,
NOC__TCU,
NPU__EIM_NPUMIX,
NPU__LSTCU_NPUMIX,
NPU__NEUTRON_NPU__NEUTRON0__NEUTRON,
NPU__NEUTRON_NPU__NEUTRON1__NEUTRON,
NPU__NEUTRON_NPU__NEUTRON2__NEUTRON,
NPU__NEUTRON_NPU__NEUTRON3__NEUTRON,
NPU__NEUTRON_NPU__NEUTRON_GANGED__NEUTRON,
NPU__NEUTRON_NPU__NEUTRON_S__MMR_SOC,
NPU__NEUTRON_NPU__NEUTRON_S__MMR_ZV,
NPU__TCU,
OTFAD,
PDM,
SAI1,
SAI2,
SAI3,
SAI4,
SAI5,
SEMA42_1,
SEMA42_2,
TMPSNS1,
TMPSNS2,
TMR0_BASE,
TMR0_GLOBAL,
TMR0_PCI_HDR_TYPE0,
TPM1,
TPM2,
TPM3,
TPM4,
TPM5,
TPM6,
TSTMR1,
TSTMR2,
USBC,
USBNC,
USDHC1,
USDHC2,
USDHC3,
VPU__BLK_CTRL_VPUMIX,
VPU__JPEG_DEC1,
VPU__JPEG_DEC_WRAP0,
VPU__JPEG_ENC,
VPU__JPEG_ENC_WRAP,
VPU__TCU,
VPU__VPU__VPU_CODEC,
WAKEUP_CMU1,
WAKEUP_CMU2,
WAKEUP__AHBRM1,
WAKEUP__ATUA,
WAKEUP__ATUM,
WAKEUP__AUDIO_XCVR,
WAKEUP__BLK_CTRL_WAKEUPMIX,
WAKEUP__DMA_CRC2,
WAKEUP__EIMW,
WAKEUP__ROMCP2,
WAKEUP__XSPI_RESPONDER,
WDOG1,
WDOG2,
WDOG3,
WDOG4,
WDOG5,
}
#[cfg(feature = "adc")]
mod adc_bindings {
crate::adc::impl_adc!(ADC, 0x4453_0000, Some(201));
}
#[cfg(feature = "can")]
mod can_bindings {
crate::can::impl_can!(CAN1, 0x443a_0000, Some(8));
crate::can::impl_can!(CAN2, 0x425b_0000, Some(38));
crate::can::impl_can!(CAN3, 0x4260_0000, Some(40));
crate::can::impl_can!(CAN4, 0x427c_0000, Some(42));
crate::can::impl_can!(CAN5, 0x427d_0000, Some(44));
}
#[cfg(feature = "dma")]
mod dma_bindings {
crate::dma::impl_dma_channel!(DMA3_CH0, 0x4400_0000, Dma3, 0, Some(96));
crate::dma::impl_dma_channel!(DMA3_CH1, 0x4400_0000, Dma3, 1, Some(97));
crate::dma::impl_dma_channel!(DMA3_CH2, 0x4400_0000, Dma3, 2, Some(98));
crate::dma::impl_dma_channel!(DMA3_CH3, 0x4400_0000, Dma3, 3, Some(99));
crate::dma::impl_dma_channel!(DMA3_CH4, 0x4400_0000, Dma3, 4, Some(100));
crate::dma::impl_dma_channel!(DMA3_CH5, 0x4400_0000, Dma3, 5, Some(101));
crate::dma::impl_dma_channel!(DMA3_CH6, 0x4400_0000, Dma3, 6, Some(102));
crate::dma::impl_dma_channel!(DMA3_CH7, 0x4400_0000, Dma3, 7, Some(103));
crate::dma::impl_dma_channel!(DMA3_CH8, 0x4400_0000, Dma3, 8, Some(104));
crate::dma::impl_dma_channel!(DMA3_CH9, 0x4400_0000, Dma3, 9, Some(105));
crate::dma::impl_dma_channel!(DMA3_CH10, 0x4400_0000, Dma3, 10, Some(106));
crate::dma::impl_dma_channel!(DMA3_CH11, 0x4400_0000, Dma3, 11, Some(107));
crate::dma::impl_dma_channel!(DMA3_CH12, 0x4400_0000, Dma3, 12, Some(108));
crate::dma::impl_dma_channel!(DMA3_CH13, 0x4400_0000, Dma3, 13, Some(109));
crate::dma::impl_dma_channel!(DMA3_CH14, 0x4400_0000, Dma3, 14, Some(110));
crate::dma::impl_dma_channel!(DMA3_CH15, 0x4400_0000, Dma3, 15, Some(111));
crate::dma::impl_dma_channel!(DMA3_CH16, 0x4400_0000, Dma3, 16, Some(112));
crate::dma::impl_dma_channel!(DMA3_CH17, 0x4400_0000, Dma3, 17, Some(113));
crate::dma::impl_dma_channel!(DMA3_CH18, 0x4400_0000, Dma3, 18, Some(114));
crate::dma::impl_dma_channel!(DMA3_CH19, 0x4400_0000, Dma3, 19, Some(115));
crate::dma::impl_dma_channel!(DMA3_CH20, 0x4400_0000, Dma3, 20, Some(116));
crate::dma::impl_dma_channel!(DMA3_CH21, 0x4400_0000, Dma3, 21, Some(117));
crate::dma::impl_dma_channel!(DMA3_CH22, 0x4400_0000, Dma3, 22, Some(118));
crate::dma::impl_dma_channel!(DMA3_CH23, 0x4400_0000, Dma3, 23, Some(119));
crate::dma::impl_dma_channel!(DMA3_CH24, 0x4400_0000, Dma3, 24, Some(120));
crate::dma::impl_dma_channel!(DMA3_CH25, 0x4400_0000, Dma3, 25, Some(121));
crate::dma::impl_dma_channel!(DMA3_CH26, 0x4400_0000, Dma3, 26, Some(122));
crate::dma::impl_dma_channel!(DMA3_CH27, 0x4400_0000, Dma3, 27, Some(123));
crate::dma::impl_dma_channel!(DMA3_CH28, 0x4400_0000, Dma3, 28, Some(124));
crate::dma::impl_dma_channel!(DMA3_CH29, 0x4400_0000, Dma3, 29, Some(125));
crate::dma::impl_dma_channel!(DMA3_CH30, 0x4400_0000, Dma3, 30, Some(126));
crate::dma::impl_dma_channel!(EDMA5_2_CH0, 0x4200_0000, Dma5, 0, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH1, 0x4200_0000, Dma5, 1, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH2, 0x4200_0000, Dma5, 2, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH3, 0x4200_0000, Dma5, 3, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH4, 0x4200_0000, Dma5, 4, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH5, 0x4200_0000, Dma5, 5, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH6, 0x4200_0000, Dma5, 6, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH7, 0x4200_0000, Dma5, 7, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH8, 0x4200_0000, Dma5, 8, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH9, 0x4200_0000, Dma5, 9, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH10, 0x4200_0000, Dma5, 10, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH11, 0x4200_0000, Dma5, 11, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH12, 0x4200_0000, Dma5, 12, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH13, 0x4200_0000, Dma5, 13, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH14, 0x4200_0000, Dma5, 14, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH15, 0x4200_0000, Dma5, 15, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH16, 0x4200_0000, Dma5, 16, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH17, 0x4200_0000, Dma5, 17, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH18, 0x4200_0000, Dma5, 18, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH19, 0x4200_0000, Dma5, 19, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH20, 0x4200_0000, Dma5, 20, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH21, 0x4200_0000, Dma5, 21, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH22, 0x4200_0000, Dma5, 22, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH23, 0x4200_0000, Dma5, 23, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH24, 0x4200_0000, Dma5, 24, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH25, 0x4200_0000, Dma5, 25, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH26, 0x4200_0000, Dma5, 26, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH27, 0x4200_0000, Dma5, 27, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH28, 0x4200_0000, Dma5, 28, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH29, 0x4200_0000, Dma5, 29, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH30, 0x4200_0000, Dma5, 30, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH31, 0x4200_0000, Dma5, 31, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH32, 0x4200_0000, Dma5, 32, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH33, 0x4200_0000, Dma5, 33, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH34, 0x4200_0000, Dma5, 34, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH35, 0x4200_0000, Dma5, 35, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH36, 0x4200_0000, Dma5, 36, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH37, 0x4200_0000, Dma5, 37, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH38, 0x4200_0000, Dma5, 38, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH39, 0x4200_0000, Dma5, 39, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH40, 0x4200_0000, Dma5, 40, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH41, 0x4200_0000, Dma5, 41, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH42, 0x4200_0000, Dma5, 42, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH43, 0x4200_0000, Dma5, 43, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH44, 0x4200_0000, Dma5, 44, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH45, 0x4200_0000, Dma5, 45, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH46, 0x4200_0000, Dma5, 46, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH47, 0x4200_0000, Dma5, 47, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH48, 0x4200_0000, Dma5, 48, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH49, 0x4200_0000, Dma5, 49, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH50, 0x4200_0000, Dma5, 50, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH51, 0x4200_0000, Dma5, 51, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH52, 0x4200_0000, Dma5, 52, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH53, 0x4200_0000, Dma5, 53, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH54, 0x4200_0000, Dma5, 54, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH55, 0x4200_0000, Dma5, 55, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH56, 0x4200_0000, Dma5, 56, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH57, 0x4200_0000, Dma5, 57, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH58, 0x4200_0000, Dma5, 58, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH59, 0x4200_0000, Dma5, 59, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH60, 0x4200_0000, Dma5, 60, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH61, 0x4200_0000, Dma5, 61, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH62, 0x4200_0000, Dma5, 62, None);
crate::dma::impl_dma_channel!(EDMA5_2_CH63, 0x4200_0000, Dma5, 63, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH0, 0x4221_0000, Dma5, 0, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH1, 0x4221_0000, Dma5, 1, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH2, 0x4221_0000, Dma5, 2, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH3, 0x4221_0000, Dma5, 3, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH4, 0x4221_0000, Dma5, 4, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH5, 0x4221_0000, Dma5, 5, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH6, 0x4221_0000, Dma5, 6, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH7, 0x4221_0000, Dma5, 7, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH8, 0x4221_0000, Dma5, 8, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH9, 0x4221_0000, Dma5, 9, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH10, 0x4221_0000, Dma5, 10, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH11, 0x4221_0000, Dma5, 11, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH12, 0x4221_0000, Dma5, 12, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH13, 0x4221_0000, Dma5, 13, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH14, 0x4221_0000, Dma5, 14, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH15, 0x4221_0000, Dma5, 15, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH16, 0x4221_0000, Dma5, 16, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH17, 0x4221_0000, Dma5, 17, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH18, 0x4221_0000, Dma5, 18, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH19, 0x4221_0000, Dma5, 19, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH20, 0x4221_0000, Dma5, 20, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH21, 0x4221_0000, Dma5, 21, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH22, 0x4221_0000, Dma5, 22, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH23, 0x4221_0000, Dma5, 23, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH24, 0x4221_0000, Dma5, 24, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH25, 0x4221_0000, Dma5, 25, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH26, 0x4221_0000, Dma5, 26, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH27, 0x4221_0000, Dma5, 27, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH28, 0x4221_0000, Dma5, 28, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH29, 0x4221_0000, Dma5, 29, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH30, 0x4221_0000, Dma5, 30, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH31, 0x4221_0000, Dma5, 31, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH32, 0x4221_0000, Dma5, 32, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH33, 0x4221_0000, Dma5, 33, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH34, 0x4221_0000, Dma5, 34, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH35, 0x4221_0000, Dma5, 35, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH36, 0x4221_0000, Dma5, 36, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH37, 0x4221_0000, Dma5, 37, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH38, 0x4221_0000, Dma5, 38, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH39, 0x4221_0000, Dma5, 39, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH40, 0x4221_0000, Dma5, 40, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH41, 0x4221_0000, Dma5, 41, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH42, 0x4221_0000, Dma5, 42, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH43, 0x4221_0000, Dma5, 43, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH44, 0x4221_0000, Dma5, 44, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH45, 0x4221_0000, Dma5, 45, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH46, 0x4221_0000, Dma5, 46, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH47, 0x4221_0000, Dma5, 47, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH48, 0x4221_0000, Dma5, 48, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH49, 0x4221_0000, Dma5, 49, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH50, 0x4221_0000, Dma5, 50, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH51, 0x4221_0000, Dma5, 51, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH52, 0x4221_0000, Dma5, 52, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH53, 0x4221_0000, Dma5, 53, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH54, 0x4221_0000, Dma5, 54, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH55, 0x4221_0000, Dma5, 55, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH56, 0x4221_0000, Dma5, 56, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH57, 0x4221_0000, Dma5, 57, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH58, 0x4221_0000, Dma5, 58, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH59, 0x4221_0000, Dma5, 59, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH60, 0x4221_0000, Dma5, 60, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH61, 0x4221_0000, Dma5, 61, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH62, 0x4221_0000, Dma5, 62, None);
crate::dma::impl_dma_channel!(EDMA5_3_CH63, 0x4221_0000, Dma5, 63, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH0, 0x4ae1_0000, Dma5, 0, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH1, 0x4ae1_0000, Dma5, 1, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH2, 0x4ae1_0000, Dma5, 2, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH3, 0x4ae1_0000, Dma5, 3, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH4, 0x4ae1_0000, Dma5, 4, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH5, 0x4ae1_0000, Dma5, 5, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH6, 0x4ae1_0000, Dma5, 6, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH7, 0x4ae1_0000, Dma5, 7, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH8, 0x4ae1_0000, Dma5, 8, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH9, 0x4ae1_0000, Dma5, 9, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH10, 0x4ae1_0000, Dma5, 10, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH11, 0x4ae1_0000, Dma5, 11, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH12, 0x4ae1_0000, Dma5, 12, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH13, 0x4ae1_0000, Dma5, 13, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH14, 0x4ae1_0000, Dma5, 14, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH15, 0x4ae1_0000, Dma5, 15, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH16, 0x4ae1_0000, Dma5, 16, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH17, 0x4ae1_0000, Dma5, 17, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH18, 0x4ae1_0000, Dma5, 18, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH19, 0x4ae1_0000, Dma5, 19, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH20, 0x4ae1_0000, Dma5, 20, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH21, 0x4ae1_0000, Dma5, 21, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH22, 0x4ae1_0000, Dma5, 22, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH23, 0x4ae1_0000, Dma5, 23, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH24, 0x4ae1_0000, Dma5, 24, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH25, 0x4ae1_0000, Dma5, 25, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH26, 0x4ae1_0000, Dma5, 26, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH27, 0x4ae1_0000, Dma5, 27, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH28, 0x4ae1_0000, Dma5, 28, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH29, 0x4ae1_0000, Dma5, 29, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH30, 0x4ae1_0000, Dma5, 30, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH31, 0x4ae1_0000, Dma5, 31, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH32, 0x4ae1_0000, Dma5, 32, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH33, 0x4ae1_0000, Dma5, 33, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH34, 0x4ae1_0000, Dma5, 34, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH35, 0x4ae1_0000, Dma5, 35, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH36, 0x4ae1_0000, Dma5, 36, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH37, 0x4ae1_0000, Dma5, 37, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH38, 0x4ae1_0000, Dma5, 38, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH39, 0x4ae1_0000, Dma5, 39, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH40, 0x4ae1_0000, Dma5, 40, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH41, 0x4ae1_0000, Dma5, 41, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH42, 0x4ae1_0000, Dma5, 42, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH43, 0x4ae1_0000, Dma5, 43, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH44, 0x4ae1_0000, Dma5, 44, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH45, 0x4ae1_0000, Dma5, 45, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH46, 0x4ae1_0000, Dma5, 46, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH47, 0x4ae1_0000, Dma5, 47, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH48, 0x4ae1_0000, Dma5, 48, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH49, 0x4ae1_0000, Dma5, 49, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH50, 0x4ae1_0000, Dma5, 50, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH51, 0x4ae1_0000, Dma5, 51, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH52, 0x4ae1_0000, Dma5, 52, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH53, 0x4ae1_0000, Dma5, 53, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH54, 0x4ae1_0000, Dma5, 54, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH55, 0x4ae1_0000, Dma5, 55, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH56, 0x4ae1_0000, Dma5, 56, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH57, 0x4ae1_0000, Dma5, 57, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH58, 0x4ae1_0000, Dma5, 58, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH59, 0x4ae1_0000, Dma5, 59, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH60, 0x4ae1_0000, Dma5, 60, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH61, 0x4ae1_0000, Dma5, 61, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH62, 0x4ae1_0000, Dma5, 62, None);
crate::dma::impl_dma_channel!(EDMA5_4_CH63, 0x4ae1_0000, Dma5, 63, None);
}
#[cfg(feature = "gpio")]
mod gpio_bindings {
crate::gpio::impl_gpio!(GPIO1, 0x4740_0000, Some(10));
crate::gpio::impl_gpio!(GPIO2, 0x4381_0000, Some(49));
crate::gpio::impl_gpio!(GPIO3, 0x4382_0000, Some(51));
crate::gpio::impl_gpio!(GPIO4, 0x4384_0000, Some(53));
crate::gpio::impl_gpio!(GPIO5, 0x4385_0000, Some(55));
}
#[cfg(feature = "i2c")]
mod i2c_bindings {
crate::i2c::impl_i2c!(LPI2C1, 0x4434_0000, Some(13));
crate::i2c::impl_i2c!(LPI2C2, 0x4435_0000, Some(14));
crate::i2c::impl_i2c!(LPI2C3, 0x4253_0000, Some(58));
crate::i2c::impl_i2c!(LPI2C4, 0x4254_0000, Some(59));
crate::i2c::impl_i2c!(LPI2C5, 0x426b_0000, Some(181));
crate::i2c::impl_i2c!(LPI2C6, 0x426c_0000, Some(182));
crate::i2c::impl_i2c!(LPI2C7, 0x426d_0000, Some(183));
crate::i2c::impl_i2c!(LPI2C8, 0x426e_0000, Some(184));
}
#[cfg(feature = "i3c")]
mod i3c_bindings {
crate::i3c::impl_i3c!(I3C1, 0x4433_0000, Some(12));
crate::i3c::impl_i3c!(I3C2, 0x4252_0000, Some(57));
}
#[cfg(feature = "timer")]
mod lptmr_bindings {
crate::lptmr::impl_lptmr!(LPTMR1, 0x4430_0000, Some(18));
crate::lptmr::impl_lptmr!(LPTMR2, 0x424d_0000, Some(63));
}
#[cfg(feature = "spi")]
mod spi_bindings {
crate::spi::impl_spi!(LPSPI1, 0x4436_0000, Some(16));
crate::spi::impl_spi!(LPSPI2, 0x4437_0000, Some(17));
crate::spi::impl_spi!(LPSPI3, 0x4255_0000, Some(61));
crate::spi::impl_spi!(LPSPI4, 0x4256_0000, Some(62));
crate::spi::impl_spi!(LPSPI5, 0x426f_0000, Some(177));
crate::spi::impl_spi!(LPSPI6, 0x4270_0000, Some(178));
crate::spi::impl_spi!(LPSPI7, 0x4271_0000, Some(179));
crate::spi::impl_spi!(LPSPI8, 0x4272_0000, Some(180));
}
#[cfg(feature = "timer")]
mod timer_bindings {
crate::timer::impl_tpm!(TPM1, 0x4431_0000, Tpm1, Some(29));
crate::timer::impl_tpm!(TPM2, 0x4432_0000, Tpm2, Some(30));
crate::timer::impl_tpm!(TPM3, 0x424e_0000, Tpm3, Some(73));
crate::timer::impl_tpm!(TPM4, 0x424f_0000, Tpm4, Some(74));
crate::timer::impl_tpm!(TPM5, 0x4250_0000, Tpm5, Some(75));
crate::timer::impl_tpm!(TPM6, 0x4251_0000, Tpm6, Some(76));
}
#[cfg(feature = "time-driver-lpit")]
mod timer_driver_bindings {
crate::timer_driver::impl_lpit!(LPIT1, 0x442f_0000, Some(15));
crate::timer_driver::impl_lpit!(LPIT2, 0x424c_0000, Some(60));
}
#[cfg(feature = "uart")]
mod uart_bindings {
crate::uart::impl_uart!(LPUART1, 0x4438_0000, Some(19));
crate::uart::impl_uart!(LPUART2, 0x4439_0000, Some(20));
crate::uart::impl_uart!(LPUART3, 0x4257_0000, Some(64));
crate::uart::impl_uart!(LPUART4, 0x4258_0000, Some(65));
crate::uart::impl_uart!(LPUART5, 0x4259_0000, Some(66));
crate::uart::impl_uart!(LPUART6, 0x425a_0000, Some(67));
crate::uart::impl_uart!(LPUART7, 0x4269_0000, Some(68));
crate::uart::impl_uart!(LPUART8, 0x426a_0000, Some(69));
}
#[cfg(feature = "watchdog")]
mod watchdog_bindings {
crate::watchdog::impl_watchdog!(WDOG1, 0x442d_0000, Some(31));
crate::watchdog::impl_watchdog!(WDOG2, 0x442e_0000, Some(32));
crate::watchdog::impl_watchdog!(WDOG3, 0x4249_0000, Some(77));
crate::watchdog::impl_watchdog!(WDOG4, 0x424a_0000, Some(78));
crate::watchdog::impl_watchdog!(WDOG5, 0x424b_0000, Some(79));
}