::consortium_hal::peripherals! {
ADC1,
AHBRM1,
ANA_OSC,
ARMPLL,
AUDIOPLL,
AXBS,
BBNSM,
BLK_CTRL_AONMIX,
BLK_CTRL_DDRMIX,
BLK_CTRL_MEDIAMIX,
BLK_CTRL_MLMIX,
BLK_CTRL_NIC_WRAPPER1,
BLK_CTRL_S_AONMIX,
BLK_CTRL_WAKEUPMIX,
CAN1,
CAN2,
CCM_CTRL,
CM33_CACHE_ECC_MCM,
CM33_TCM_MCM,
DDR_CTRL,
DMA3_CH0,
DMA3_CH1,
DMA3_CH2,
DMA3_CH3,
DMA3_CH4,
DMA3_CH5,
DMA3_CH6,
DMA3_CH7,
DMA3_CH8,
DMA3_CH9,
DMA3_CH10,
DMA3_CH11,
DMA3_CH12,
DMA3_CH13,
DMA3_CH14,
DMA3_CH15,
DMA3_CH16,
DMA3_CH17,
DMA3_CH18,
DMA3_CH19,
DMA3_CH20,
DMA3_CH21,
DMA3_CH22,
DMA3_CH23,
DMA3_CH24,
DMA3_CH25,
DMA3_CH26,
DMA3_CH27,
DMA3_CH28,
DMA3_CH29,
DMA3_CH30,
DMA4_CH0,
DMA4_CH1,
DMA4_CH2,
DMA4_CH3,
DMA4_CH4,
DMA4_CH5,
DMA4_CH6,
DMA4_CH7,
DMA4_CH8,
DMA4_CH9,
DMA4_CH10,
DMA4_CH11,
DMA4_CH12,
DMA4_CH13,
DMA4_CH14,
DMA4_CH15,
DMA4_CH16,
DMA4_CH17,
DMA4_CH18,
DMA4_CH19,
DMA4_CH20,
DMA4_CH21,
DMA4_CH22,
DMA4_CH23,
DMA4_CH24,
DMA4_CH25,
DMA4_CH26,
DMA4_CH27,
DMA4_CH28,
DMA4_CH29,
DMA4_CH30,
DMA4_CH31,
DMA4_CH32,
DMA4_CH33,
DMA4_CH34,
DMA4_CH35,
DMA4_CH36,
DMA4_CH37,
DMA4_CH38,
DMA4_CH39,
DMA4_CH40,
DMA4_CH41,
DMA4_CH42,
DMA4_CH43,
DMA4_CH44,
DMA4_CH45,
DMA4_CH46,
DMA4_CH47,
DMA4_CH48,
DMA4_CH49,
DMA4_CH50,
DMA4_CH51,
DMA4_CH52,
DMA4_CH53,
DMA4_CH54,
DMA4_CH55,
DMA4_CH56,
DMA4_CH57,
DMA4_CH58,
DMA4_CH59,
DMA4_CH60,
DMA4_CH61,
DMA4_CH62,
DMA4_CH63,
DRAMPLL,
ENET,
ENET_QOS,
FLEXIO1,
FLEXIO2,
FLEXSPI,
FLEXSPI_OTFAD1,
FSB1,
GPC_CTRL_CA55_0,
GPC_CTRL_CA55_1,
GPC_CTRL_CA55_CLUSTER,
GPC_CTRL_CM33,
GPC_GLOBAL,
GPIO1,
GPIO2,
GPIO3,
GPIO4,
I3C1,
I3C2,
IOMUXC1,
IOMUXC_GPR,
ISI,
LCDIF,
LPCAC_PC,
LPCAC_PS,
LPI2C1,
LPI2C2,
LPI2C3,
LPI2C4,
LPI2C5,
LPI2C6,
LPI2C7,
LPI2C8,
LPIT1,
LPIT2,
LPSPI1,
LPSPI2,
LPSPI3,
LPSPI4,
LPSPI5,
LPSPI6,
LPSPI7,
LPSPI8,
LPTMR1,
LPTMR2,
LPUART1,
LPUART2,
LPUART3,
LPUART4,
LPUART5,
LPUART6,
LPUART7,
LPUART8,
M33_PCF1,
M33_PSF1,
MIPI_CSI_CSR,
MIPI_DSI,
MU1_MUA,
MU1_MUB,
MU2_MUA,
MU2_MUB,
MU_APPS__S3MUA,
MU_RT__S3MUA,
NPU,
OCRAM_MECC1,
PDM,
PPB_MCM2_CM4,
PXP,
SAI1,
SAI2,
SAI3,
SEMA42_1,
SEMA42_2,
SPDIF,
SRC_A55C0_MEM,
SRC_A55C0_SLICE,
SRC_A55C1_MEM,
SRC_A55C1_SLICE,
SRC_A55P_SLICE,
SRC_A55_L3_MEM,
SRC_A55_SCU_MEM,
SRC_AON_MEM,
SRC_AON_SLICE,
SRC_DDR_MEM,
SRC_DDR_SLICE,
SRC_DPHY_MEM,
SRC_DPHY_SLICE,
SRC_EDGELOCK_SLICE,
SRC_GENERAL_REG,
SRC_HSIO_MEM,
SRC_HSIO_SLICE,
SRC_M33P_SLICE,
SRC_MEDIA_MEM,
SRC_MEDIA_SLICE,
SRC_ML_MEM,
SRC_ML_SLICE,
SRC_NIC_MEM,
SRC_NIC_OCRAM,
SRC_NIC_SLICE,
SRC_WKUP_MEM,
SRC_WKUP_SLICE,
SYSPLL,
SYS_CTR_COMPARE,
SYS_CTR_CONTROL,
SYS_CTR_READ,
TMU,
TPM1,
TPM2,
TPM3,
TPM4,
TPM5,
TPM6,
TRDC1,
TRDC2,
TRDC3,
TRDC4,
TRDC5,
TRDC6,
TRGMUX,
TSTMR1__TSTMRA,
TSTMR2__TSTMRA,
USB__USBNC_OTG1,
USB__USBNC_OTG2,
USB__USB_OTG1,
USB__USB_OTG2,
USDHC1,
USDHC2,
USDHC3,
VIDEOPLL,
WDOG1,
WDOG2,
WDOG3,
WDOG4,
WDOG5,
}
#[cfg(feature = "adc")]
mod adc_bindings {
crate::adc::impl_adc!(ADC1, 0x4453_0000, None);
}
#[cfg(feature = "can")]
mod can_bindings {
crate::can::impl_can!(CAN1, 0x443a_0000, Some(8));
crate::can::impl_can!(CAN2, 0x425b_0000, Some(51));
}
#[cfg(feature = "dma")]
mod dma_bindings {
crate::dma::impl_dma_channel!(DMA3_CH0, 0x4400_0000, Dma3, 0, Some(95));
crate::dma::impl_dma_channel!(DMA3_CH1, 0x4400_0000, Dma3, 1, Some(96));
crate::dma::impl_dma_channel!(DMA3_CH2, 0x4400_0000, Dma3, 2, Some(97));
crate::dma::impl_dma_channel!(DMA3_CH3, 0x4400_0000, Dma3, 3, Some(98));
crate::dma::impl_dma_channel!(DMA3_CH4, 0x4400_0000, Dma3, 4, Some(99));
crate::dma::impl_dma_channel!(DMA3_CH5, 0x4400_0000, Dma3, 5, Some(100));
crate::dma::impl_dma_channel!(DMA3_CH6, 0x4400_0000, Dma3, 6, Some(101));
crate::dma::impl_dma_channel!(DMA3_CH7, 0x4400_0000, Dma3, 7, Some(102));
crate::dma::impl_dma_channel!(DMA3_CH8, 0x4400_0000, Dma3, 8, Some(103));
crate::dma::impl_dma_channel!(DMA3_CH9, 0x4400_0000, Dma3, 9, Some(104));
crate::dma::impl_dma_channel!(DMA3_CH10, 0x4400_0000, Dma3, 10, Some(105));
crate::dma::impl_dma_channel!(DMA3_CH11, 0x4400_0000, Dma3, 11, Some(106));
crate::dma::impl_dma_channel!(DMA3_CH12, 0x4400_0000, Dma3, 12, Some(107));
crate::dma::impl_dma_channel!(DMA3_CH13, 0x4400_0000, Dma3, 13, Some(108));
crate::dma::impl_dma_channel!(DMA3_CH14, 0x4400_0000, Dma3, 14, Some(109));
crate::dma::impl_dma_channel!(DMA3_CH15, 0x4400_0000, Dma3, 15, Some(110));
crate::dma::impl_dma_channel!(DMA3_CH16, 0x4400_0000, Dma3, 16, Some(111));
crate::dma::impl_dma_channel!(DMA3_CH17, 0x4400_0000, Dma3, 17, Some(112));
crate::dma::impl_dma_channel!(DMA3_CH18, 0x4400_0000, Dma3, 18, Some(113));
crate::dma::impl_dma_channel!(DMA3_CH19, 0x4400_0000, Dma3, 19, Some(114));
crate::dma::impl_dma_channel!(DMA3_CH20, 0x4400_0000, Dma3, 20, Some(115));
crate::dma::impl_dma_channel!(DMA3_CH21, 0x4400_0000, Dma3, 21, Some(116));
crate::dma::impl_dma_channel!(DMA3_CH22, 0x4400_0000, Dma3, 22, Some(117));
crate::dma::impl_dma_channel!(DMA3_CH23, 0x4400_0000, Dma3, 23, Some(118));
crate::dma::impl_dma_channel!(DMA3_CH24, 0x4400_0000, Dma3, 24, Some(119));
crate::dma::impl_dma_channel!(DMA3_CH25, 0x4400_0000, Dma3, 25, Some(120));
crate::dma::impl_dma_channel!(DMA3_CH26, 0x4400_0000, Dma3, 26, Some(121));
crate::dma::impl_dma_channel!(DMA3_CH27, 0x4400_0000, Dma3, 27, Some(122));
crate::dma::impl_dma_channel!(DMA3_CH28, 0x4400_0000, Dma3, 28, Some(123));
crate::dma::impl_dma_channel!(DMA3_CH29, 0x4400_0000, Dma3, 29, Some(124));
crate::dma::impl_dma_channel!(DMA3_CH30, 0x4400_0000, Dma3, 30, Some(125));
crate::dma::impl_dma_channel!(DMA4_CH0, 0x4200_0000, Dma4, 0, None);
crate::dma::impl_dma_channel!(DMA4_CH1, 0x4200_0000, Dma4, 1, None);
crate::dma::impl_dma_channel!(DMA4_CH2, 0x4200_0000, Dma4, 2, None);
crate::dma::impl_dma_channel!(DMA4_CH3, 0x4200_0000, Dma4, 3, None);
crate::dma::impl_dma_channel!(DMA4_CH4, 0x4200_0000, Dma4, 4, None);
crate::dma::impl_dma_channel!(DMA4_CH5, 0x4200_0000, Dma4, 5, None);
crate::dma::impl_dma_channel!(DMA4_CH6, 0x4200_0000, Dma4, 6, None);
crate::dma::impl_dma_channel!(DMA4_CH7, 0x4200_0000, Dma4, 7, None);
crate::dma::impl_dma_channel!(DMA4_CH8, 0x4200_0000, Dma4, 8, None);
crate::dma::impl_dma_channel!(DMA4_CH9, 0x4200_0000, Dma4, 9, None);
crate::dma::impl_dma_channel!(DMA4_CH10, 0x4200_0000, Dma4, 10, None);
crate::dma::impl_dma_channel!(DMA4_CH11, 0x4200_0000, Dma4, 11, None);
crate::dma::impl_dma_channel!(DMA4_CH12, 0x4200_0000, Dma4, 12, None);
crate::dma::impl_dma_channel!(DMA4_CH13, 0x4200_0000, Dma4, 13, None);
crate::dma::impl_dma_channel!(DMA4_CH14, 0x4200_0000, Dma4, 14, None);
crate::dma::impl_dma_channel!(DMA4_CH15, 0x4200_0000, Dma4, 15, None);
crate::dma::impl_dma_channel!(DMA4_CH16, 0x4200_0000, Dma4, 16, None);
crate::dma::impl_dma_channel!(DMA4_CH17, 0x4200_0000, Dma4, 17, None);
crate::dma::impl_dma_channel!(DMA4_CH18, 0x4200_0000, Dma4, 18, None);
crate::dma::impl_dma_channel!(DMA4_CH19, 0x4200_0000, Dma4, 19, None);
crate::dma::impl_dma_channel!(DMA4_CH20, 0x4200_0000, Dma4, 20, None);
crate::dma::impl_dma_channel!(DMA4_CH21, 0x4200_0000, Dma4, 21, None);
crate::dma::impl_dma_channel!(DMA4_CH22, 0x4200_0000, Dma4, 22, None);
crate::dma::impl_dma_channel!(DMA4_CH23, 0x4200_0000, Dma4, 23, None);
crate::dma::impl_dma_channel!(DMA4_CH24, 0x4200_0000, Dma4, 24, None);
crate::dma::impl_dma_channel!(DMA4_CH25, 0x4200_0000, Dma4, 25, None);
crate::dma::impl_dma_channel!(DMA4_CH26, 0x4200_0000, Dma4, 26, None);
crate::dma::impl_dma_channel!(DMA4_CH27, 0x4200_0000, Dma4, 27, None);
crate::dma::impl_dma_channel!(DMA4_CH28, 0x4200_0000, Dma4, 28, None);
crate::dma::impl_dma_channel!(DMA4_CH29, 0x4200_0000, Dma4, 29, None);
crate::dma::impl_dma_channel!(DMA4_CH30, 0x4200_0000, Dma4, 30, None);
crate::dma::impl_dma_channel!(DMA4_CH31, 0x4200_0000, Dma4, 31, None);
crate::dma::impl_dma_channel!(DMA4_CH32, 0x4200_0000, Dma4, 32, None);
crate::dma::impl_dma_channel!(DMA4_CH33, 0x4200_0000, Dma4, 33, None);
crate::dma::impl_dma_channel!(DMA4_CH34, 0x4200_0000, Dma4, 34, None);
crate::dma::impl_dma_channel!(DMA4_CH35, 0x4200_0000, Dma4, 35, None);
crate::dma::impl_dma_channel!(DMA4_CH36, 0x4200_0000, Dma4, 36, None);
crate::dma::impl_dma_channel!(DMA4_CH37, 0x4200_0000, Dma4, 37, None);
crate::dma::impl_dma_channel!(DMA4_CH38, 0x4200_0000, Dma4, 38, None);
crate::dma::impl_dma_channel!(DMA4_CH39, 0x4200_0000, Dma4, 39, None);
crate::dma::impl_dma_channel!(DMA4_CH40, 0x4200_0000, Dma4, 40, None);
crate::dma::impl_dma_channel!(DMA4_CH41, 0x4200_0000, Dma4, 41, None);
crate::dma::impl_dma_channel!(DMA4_CH42, 0x4200_0000, Dma4, 42, None);
crate::dma::impl_dma_channel!(DMA4_CH43, 0x4200_0000, Dma4, 43, None);
crate::dma::impl_dma_channel!(DMA4_CH44, 0x4200_0000, Dma4, 44, None);
crate::dma::impl_dma_channel!(DMA4_CH45, 0x4200_0000, Dma4, 45, None);
crate::dma::impl_dma_channel!(DMA4_CH46, 0x4200_0000, Dma4, 46, None);
crate::dma::impl_dma_channel!(DMA4_CH47, 0x4200_0000, Dma4, 47, None);
crate::dma::impl_dma_channel!(DMA4_CH48, 0x4200_0000, Dma4, 48, None);
crate::dma::impl_dma_channel!(DMA4_CH49, 0x4200_0000, Dma4, 49, None);
crate::dma::impl_dma_channel!(DMA4_CH50, 0x4200_0000, Dma4, 50, None);
crate::dma::impl_dma_channel!(DMA4_CH51, 0x4200_0000, Dma4, 51, None);
crate::dma::impl_dma_channel!(DMA4_CH52, 0x4200_0000, Dma4, 52, None);
crate::dma::impl_dma_channel!(DMA4_CH53, 0x4200_0000, Dma4, 53, None);
crate::dma::impl_dma_channel!(DMA4_CH54, 0x4200_0000, Dma4, 54, None);
crate::dma::impl_dma_channel!(DMA4_CH55, 0x4200_0000, Dma4, 55, None);
crate::dma::impl_dma_channel!(DMA4_CH56, 0x4200_0000, Dma4, 56, None);
crate::dma::impl_dma_channel!(DMA4_CH57, 0x4200_0000, Dma4, 57, None);
crate::dma::impl_dma_channel!(DMA4_CH58, 0x4200_0000, Dma4, 58, None);
crate::dma::impl_dma_channel!(DMA4_CH59, 0x4200_0000, Dma4, 59, None);
crate::dma::impl_dma_channel!(DMA4_CH60, 0x4200_0000, Dma4, 60, None);
crate::dma::impl_dma_channel!(DMA4_CH61, 0x4200_0000, Dma4, 61, None);
crate::dma::impl_dma_channel!(DMA4_CH62, 0x4200_0000, Dma4, 62, None);
crate::dma::impl_dma_channel!(DMA4_CH63, 0x4200_0000, Dma4, 63, None);
}
#[cfg(feature = "gpio")]
mod gpio_bindings {
crate::gpio::impl_gpio!(GPIO1, 0x4740_0000, Some(10));
crate::gpio::impl_gpio!(GPIO2, 0x4381_0000, Some(57));
crate::gpio::impl_gpio!(GPIO3, 0x4382_0000, Some(59));
crate::gpio::impl_gpio!(GPIO4, 0x4383_0000, Some(189));
}
#[cfg(feature = "i2c")]
mod i2c_bindings {
crate::i2c::impl_i2c!(LPI2C1, 0x4434_0000, Some(13));
crate::i2c::impl_i2c!(LPI2C2, 0x4435_0000, Some(14));
crate::i2c::impl_i2c!(LPI2C3, 0x4253_0000, Some(62));
crate::i2c::impl_i2c!(LPI2C4, 0x4254_0000, Some(63));
crate::i2c::impl_i2c!(LPI2C5, 0x426b_0000, Some(195));
crate::i2c::impl_i2c!(LPI2C6, 0x426c_0000, Some(196));
crate::i2c::impl_i2c!(LPI2C7, 0x426d_0000, Some(197));
crate::i2c::impl_i2c!(LPI2C8, 0x426e_0000, Some(198));
}
#[cfg(feature = "i3c")]
mod i3c_bindings {
crate::i3c::impl_i3c!(I3C1, 0x4433_0000, Some(12));
crate::i3c::impl_i3c!(I3C2, 0x4252_0000, Some(61));
}
#[cfg(feature = "timer")]
mod lptmr_bindings {
crate::lptmr::impl_lptmr!(LPTMR1, 0x4430_0000, Some(18));
crate::lptmr::impl_lptmr!(LPTMR2, 0x424d_0000, Some(67));
}
#[cfg(feature = "spi")]
mod spi_bindings {
crate::spi::impl_spi!(LPSPI1, 0x4436_0000, Some(16));
crate::spi::impl_spi!(LPSPI2, 0x4437_0000, Some(17));
crate::spi::impl_spi!(LPSPI3, 0x4255_0000, Some(65));
crate::spi::impl_spi!(LPSPI4, 0x4256_0000, Some(66));
crate::spi::impl_spi!(LPSPI5, 0x426f_0000, Some(191));
crate::spi::impl_spi!(LPSPI6, 0x4270_0000, Some(192));
crate::spi::impl_spi!(LPSPI7, 0x4271_0000, Some(193));
crate::spi::impl_spi!(LPSPI8, 0x4272_0000, Some(194));
}
#[cfg(feature = "timer")]
mod timer_bindings {
crate::timer::impl_tpm!(TPM1, 0x4431_0000, Tpm1, Some(36));
crate::timer::impl_tpm!(TPM2, 0x4432_0000, Tpm2, Some(37));
crate::timer::impl_tpm!(TPM3, 0x424e_0000, Tpm3, Some(75));
crate::timer::impl_tpm!(TPM4, 0x424f_0000, Tpm4, Some(76));
crate::timer::impl_tpm!(TPM5, 0x4250_0000, Tpm5, Some(77));
crate::timer::impl_tpm!(TPM6, 0x4251_0000, Tpm6, Some(78));
}
#[cfg(feature = "time-driver-lpit")]
mod timer_driver_bindings {
crate::timer_driver::impl_lpit!(LPIT1, 0x442f_0000, Some(15));
crate::timer_driver::impl_lpit!(LPIT2, 0x424c_0000, Some(64));
}
#[cfg(feature = "uart")]
mod uart_bindings {
crate::uart::impl_uart!(LPUART1, 0x4438_0000, Some(19));
crate::uart::impl_uart!(LPUART2, 0x4439_0000, Some(20));
crate::uart::impl_uart!(LPUART3, 0x4257_0000, Some(68));
crate::uart::impl_uart!(LPUART4, 0x4258_0000, Some(69));
crate::uart::impl_uart!(LPUART5, 0x4259_0000, Some(70));
crate::uart::impl_uart!(LPUART6, 0x425a_0000, Some(71));
crate::uart::impl_uart!(LPUART7, 0x4269_0000, Some(210));
crate::uart::impl_uart!(LPUART8, 0x426a_0000, Some(211));
}
#[cfg(feature = "watchdog")]
mod watchdog_bindings {
crate::watchdog::impl_watchdog!(WDOG1, 0x442d_0000, Some(38));
crate::watchdog::impl_watchdog!(WDOG2, 0x442e_0000, Some(39));
crate::watchdog::impl_watchdog!(WDOG3, 0x4249_0000, Some(79));
crate::watchdog::impl_watchdog!(WDOG4, 0x424a_0000, Some(80));
crate::watchdog::impl_watchdog!(WDOG5, 0x424b_0000, Some(81));
}