cc430f5137 0.1.0

Peripheral access API for CC430F5137 microcontroller
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#[doc = "Register `UCB0STAT` reader"]
pub type R = crate::R<Ucb0statSpec>;
#[doc = "Register `UCB0STAT` writer"]
pub type W = crate::W<Ucb0statSpec>;
#[doc = "Field `UCBBUSY` reader - Bus Busy Flag"]
pub type UcbbusyR = crate::BitReader;
#[doc = "Field `UCBBUSY` writer - Bus Busy Flag"]
pub type UcbbusyW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `UCGC` reader - General Call address received Flag"]
pub type UcgcR = crate::BitReader;
#[doc = "Field `UCGC` writer - General Call address received Flag"]
pub type UcgcW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `UCSCLLOW` reader - SCL low"]
pub type UcscllowR = crate::BitReader;
#[doc = "Field `UCSCLLOW` writer - SCL low"]
pub type UcscllowW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `UCLISTEN` reader - USCI Listen mode"]
pub type UclistenR = crate::BitReader;
#[doc = "Field `UCLISTEN` writer - USCI Listen mode"]
pub type UclistenW<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bit 4 - Bus Busy Flag"]
    #[inline(always)]
    pub fn ucbbusy(&self) -> UcbbusyR {
        UcbbusyR::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 5 - General Call address received Flag"]
    #[inline(always)]
    pub fn ucgc(&self) -> UcgcR {
        UcgcR::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6 - SCL low"]
    #[inline(always)]
    pub fn ucscllow(&self) -> UcscllowR {
        UcscllowR::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7 - USCI Listen mode"]
    #[inline(always)]
    pub fn uclisten(&self) -> UclistenR {
        UclistenR::new(((self.bits >> 7) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 4 - Bus Busy Flag"]
    #[inline(always)]
    pub fn ucbbusy(&mut self) -> UcbbusyW<'_, Ucb0statSpec> {
        UcbbusyW::new(self, 4)
    }
    #[doc = "Bit 5 - General Call address received Flag"]
    #[inline(always)]
    pub fn ucgc(&mut self) -> UcgcW<'_, Ucb0statSpec> {
        UcgcW::new(self, 5)
    }
    #[doc = "Bit 6 - SCL low"]
    #[inline(always)]
    pub fn ucscllow(&mut self) -> UcscllowW<'_, Ucb0statSpec> {
        UcscllowW::new(self, 6)
    }
    #[doc = "Bit 7 - USCI Listen mode"]
    #[inline(always)]
    pub fn uclisten(&mut self) -> UclistenW<'_, Ucb0statSpec> {
        UclistenW::new(self, 7)
    }
}
#[doc = "USCI B0 Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ucb0stat::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ucb0stat::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct Ucb0statSpec;
impl crate::RegisterSpec for Ucb0statSpec {
    type Ux = u8;
}
#[doc = "`read()` method returns [`ucb0stat::R`](R) reader structure"]
impl crate::Readable for Ucb0statSpec {}
#[doc = "`write(|w| ..)` method takes [`ucb0stat::W`](W) writer structure"]
impl crate::Writable for Ucb0statSpec {
    type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets UCB0STAT to value 0"]
impl crate::Resettable for Ucb0statSpec {}