#[doc = "Reader of register CTL"]
pub type R = crate::R<u32, super::CTL>;
#[doc = "Writer for register CTL"]
pub type W = crate::W<u32, super::CTL>;
#[doc = "Register CTL `reset()`'s with value 0"]
impl crate::ResetValue for super::CTL {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Reader of field `STARTUP_CYCLES`"]
pub type STARTUP_CYCLES_R = crate::R<u16, u16>;
#[doc = "Write proxy for field `STARTUP_CYCLES`"]
pub struct STARTUP_CYCLES_W<'a> {
w: &'a mut W,
}
impl<'a> STARTUP_CYCLES_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u16) -> &'a mut W {
self.w.bits = (self.w.bits & !(0xffff << 16)) | (((value as u32) & 0xffff) << 16);
self.w
}
}
#[doc = "Reader of field `RESERVED11`"]
pub type RESERVED11_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `RESERVED11`"]
pub struct RESERVED11_W<'a> {
w: &'a mut W,
}
impl<'a> RESERVED11_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x1f << 11)) | (((value as u32) & 0x1f) << 11);
self.w
}
}
#[doc = "Reader of field `TRNG_EN`"]
pub type TRNG_EN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `TRNG_EN`"]
pub struct TRNG_EN_W<'a> {
w: &'a mut W,
}
impl<'a> TRNG_EN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
self.w
}
}
#[doc = "Reader of field `RESERVED3`"]
pub type RESERVED3_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `RESERVED3`"]
pub struct RESERVED3_W<'a> {
w: &'a mut W,
}
impl<'a> RESERVED3_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x7f << 3)) | (((value as u32) & 0x7f) << 3);
self.w
}
}
#[doc = "Reader of field `NO_LFSR_FB`"]
pub type NO_LFSR_FB_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `NO_LFSR_FB`"]
pub struct NO_LFSR_FB_W<'a> {
w: &'a mut W,
}
impl<'a> NO_LFSR_FB_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "Reader of field `TEST_MODE`"]
pub type TEST_MODE_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `TEST_MODE`"]
pub struct TEST_MODE_W<'a> {
w: &'a mut W,
}
impl<'a> TEST_MODE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "Reader of field `RESERVED0`"]
pub type RESERVED0_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RESERVED0`"]
pub struct RESERVED0_W<'a> {
w: &'a mut W,
}
impl<'a> RESERVED0_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
impl R {
#[doc = "Bits 16:31 - 31:16\\]
This field determines the number of samples (between 2^8 and 2^24) taken to gather entropy from the FROs during startup. If the written value of this field is zero, the number of samples is 2^24, otherwise the number of samples equals the written value times 2^8. 0x0000: 2^24 samples 0x0001: 1*2^8 samples 0x0002: 2*2^8 samples 0x0003: 3*2^8 samples ... 0x8000: 32768*2^8 samples 0xC000: 49152*2^8 samples ... 0xFFFF: 65535*2^8 samples This field can only be modified while TRNG_EN is 0. If 1 an update will be ignored."]
#[inline(always)]
pub fn startup_cycles(&self) -> STARTUP_CYCLES_R {
STARTUP_CYCLES_R::new(((self.bits >> 16) & 0xffff) as u16)
}
#[doc = "Bits 11:15 - 15:11\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline(always)]
pub fn reserved11(&self) -> RESERVED11_R {
RESERVED11_R::new(((self.bits >> 11) & 0x1f) as u8)
}
#[doc = "Bit 10 - 10:10\\]
0: Forces all TRNG logic back into the idle state immediately. 1: Starts TRNG, gathering entropy from the FROs for the number of samples determined by STARTUP_CYCLES."]
#[inline(always)]
pub fn trng_en(&self) -> TRNG_EN_R {
TRNG_EN_R::new(((self.bits >> 10) & 0x01) != 0)
}
#[doc = "Bits 3:9 - 9:3\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline(always)]
pub fn reserved3(&self) -> RESERVED3_R {
RESERVED3_R::new(((self.bits >> 3) & 0x7f) as u8)
}
#[doc = "Bit 2 - 2:2\\]
1: Remove XNOR feedback from the main LFSR, converting it into a normal shift register for the XOR-ed outputs of the FROs (shifting data in on the LSB side). A '1' also forces the LFSR to sample continuously. This bit can only be set to '1' when TEST_MODE is also set to '1' and should not be used for other than test purposes"]
#[inline(always)]
pub fn no_lfsr_fb(&self) -> NO_LFSR_FB_R {
NO_LFSR_FB_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 1 - 1:1\\]
1: Enables access to the TESTCNT and LFSR0/LFSR1/LFSR2 registers (the latter are automatically cleared before enabling access) and keeps IRQFLAGSTAT.NEED_CLOCK at '1'. This bit shall not be used unless you need to change the LFSR seed prior to creating a new random value. All other testing is done external to register control."]
#[inline(always)]
pub fn test_mode(&self) -> TEST_MODE_R {
TEST_MODE_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 0 - 0:0\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline(always)]
pub fn reserved0(&self) -> RESERVED0_R {
RESERVED0_R::new((self.bits & 0x01) != 0)
}
}
impl W {
#[doc = "Bits 16:31 - 31:16\\]
This field determines the number of samples (between 2^8 and 2^24) taken to gather entropy from the FROs during startup. If the written value of this field is zero, the number of samples is 2^24, otherwise the number of samples equals the written value times 2^8. 0x0000: 2^24 samples 0x0001: 1*2^8 samples 0x0002: 2*2^8 samples 0x0003: 3*2^8 samples ... 0x8000: 32768*2^8 samples 0xC000: 49152*2^8 samples ... 0xFFFF: 65535*2^8 samples This field can only be modified while TRNG_EN is 0. If 1 an update will be ignored."]
#[inline(always)]
pub fn startup_cycles(&mut self) -> STARTUP_CYCLES_W {
STARTUP_CYCLES_W { w: self }
}
#[doc = "Bits 11:15 - 15:11\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline(always)]
pub fn reserved11(&mut self) -> RESERVED11_W {
RESERVED11_W { w: self }
}
#[doc = "Bit 10 - 10:10\\]
0: Forces all TRNG logic back into the idle state immediately. 1: Starts TRNG, gathering entropy from the FROs for the number of samples determined by STARTUP_CYCLES."]
#[inline(always)]
pub fn trng_en(&mut self) -> TRNG_EN_W {
TRNG_EN_W { w: self }
}
#[doc = "Bits 3:9 - 9:3\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline(always)]
pub fn reserved3(&mut self) -> RESERVED3_W {
RESERVED3_W { w: self }
}
#[doc = "Bit 2 - 2:2\\]
1: Remove XNOR feedback from the main LFSR, converting it into a normal shift register for the XOR-ed outputs of the FROs (shifting data in on the LSB side). A '1' also forces the LFSR to sample continuously. This bit can only be set to '1' when TEST_MODE is also set to '1' and should not be used for other than test purposes"]
#[inline(always)]
pub fn no_lfsr_fb(&mut self) -> NO_LFSR_FB_W {
NO_LFSR_FB_W { w: self }
}
#[doc = "Bit 1 - 1:1\\]
1: Enables access to the TESTCNT and LFSR0/LFSR1/LFSR2 registers (the latter are automatically cleared before enabling access) and keeps IRQFLAGSTAT.NEED_CLOCK at '1'. This bit shall not be used unless you need to change the LFSR seed prior to creating a new random value. All other testing is done external to register control."]
#[inline(always)]
pub fn test_mode(&mut self) -> TEST_MODE_W {
TEST_MODE_W { w: self }
}
#[doc = "Bit 0 - 0:0\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline(always)]
pub fn reserved0(&mut self) -> RESERVED0_W {
RESERVED0_W { w: self }
}
}