#[doc = "Reader of register ALGSEL"]
pub type R = crate::R<u32, super::ALGSEL>;
#[doc = "Writer for register ALGSEL"]
pub type W = crate::W<u32, super::ALGSEL>;
#[doc = "Register ALGSEL `reset()`'s with value 0"]
impl crate::ResetValue for super::ALGSEL {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Reader of field `TAG`"]
pub type TAG_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `TAG`"]
pub struct TAG_W<'a> {
w: &'a mut W,
}
impl<'a> TAG_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
self.w
}
}
#[doc = "Reader of field `RESERVED4`"]
pub type RESERVED4_R = crate::R<u32, u32>;
#[doc = "Write proxy for field `RESERVED4`"]
pub struct RESERVED4_W<'a> {
w: &'a mut W,
}
impl<'a> RESERVED4_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x07ff_ffff << 4)) | (((value as u32) & 0x07ff_ffff) << 4);
self.w
}
}
#[doc = "Reader of field `HASH_SHA_256`"]
pub type HASH_SHA_256_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `HASH_SHA_256`"]
pub struct HASH_SHA_256_W<'a> {
w: &'a mut W,
}
impl<'a> HASH_SHA_256_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "Reader of field `AES`"]
pub type AES_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `AES`"]
pub struct AES_W<'a> {
w: &'a mut W,
}
impl<'a> AES_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "Reader of field `KEY_STORE`"]
pub type KEY_STORE_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `KEY_STORE`"]
pub struct KEY_STORE_W<'a> {
w: &'a mut W,
}
impl<'a> KEY_STORE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
impl R {
#[doc = "Bit 31 - 31:31\\]
If this bit is cleared to 0, the DMA operation involves only data. If this bit is set, the DMA operation includes a TAG (Authentication Result / Digest). For SHA-256 operation, a DMA must be set up for both input data and TAG. For any other selected module, setting this bit only allows a DMA that reads the TAG. No data allowed to be transferred to or from the selected module via the DMA."]
#[inline(always)]
pub fn tag(&self) -> TAG_R {
TAG_R::new(((self.bits >> 31) & 0x01) != 0)
}
#[doc = "Bits 4:30 - 30:4\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline(always)]
pub fn reserved4(&self) -> RESERVED4_R {
RESERVED4_R::new(((self.bits >> 4) & 0x07ff_ffff) as u32)
}
#[doc = "Bit 2 - 2:2\\]
If set to one, selects the hash engine in 256B mode as destination for the DMA The maximum transfer size to DMA engine is set to 64 bytes for reading and 32 bytes for writing (the latter is only applicable if the hash result is written out through the DMA)."]
#[inline(always)]
pub fn hash_sha_256(&self) -> HASH_SHA_256_R {
HASH_SHA_256_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 1 - 1:1\\]
If set to one, selects the AES engine as source/destination for the DMA The read and write maximum transfer size to the DMA engine is set to 16 bytes."]
#[inline(always)]
pub fn aes(&self) -> AES_R {
AES_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 0 - 0:0\\]
If set to one, selects the Key Store as destination for the DMA The maximum transfer size to DMA engine is set to 32 bytes (however transfers of 16, 24 and 32 bytes are allowed)"]
#[inline(always)]
pub fn key_store(&self) -> KEY_STORE_R {
KEY_STORE_R::new((self.bits & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 31 - 31:31\\]
If this bit is cleared to 0, the DMA operation involves only data. If this bit is set, the DMA operation includes a TAG (Authentication Result / Digest). For SHA-256 operation, a DMA must be set up for both input data and TAG. For any other selected module, setting this bit only allows a DMA that reads the TAG. No data allowed to be transferred to or from the selected module via the DMA."]
#[inline(always)]
pub fn tag(&mut self) -> TAG_W {
TAG_W { w: self }
}
#[doc = "Bits 4:30 - 30:4\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline(always)]
pub fn reserved4(&mut self) -> RESERVED4_W {
RESERVED4_W { w: self }
}
#[doc = "Bit 2 - 2:2\\]
If set to one, selects the hash engine in 256B mode as destination for the DMA The maximum transfer size to DMA engine is set to 64 bytes for reading and 32 bytes for writing (the latter is only applicable if the hash result is written out through the DMA)."]
#[inline(always)]
pub fn hash_sha_256(&mut self) -> HASH_SHA_256_W {
HASH_SHA_256_W { w: self }
}
#[doc = "Bit 1 - 1:1\\]
If set to one, selects the AES engine as source/destination for the DMA The read and write maximum transfer size to the DMA engine is set to 16 bytes."]
#[inline(always)]
pub fn aes(&mut self) -> AES_W {
AES_W { w: self }
}
#[doc = "Bit 0 - 0:0\\]
If set to one, selects the Key Store as destination for the DMA The maximum transfer size to DMA engine is set to 32 bytes (however transfers of 16, 24 and 32 bytes are allowed)"]
#[inline(always)]
pub fn key_store(&mut self) -> KEY_STORE_W {
KEY_STORE_W { w: self }
}
}