#[doc = "Register `TRIGSRC` reader"]
pub type R = crate::R<TrigsrcSpec>;
#[doc = "Register `TRIGSRC` writer"]
pub type W = crate::W<TrigsrcSpec>;
#[doc = "4:0\\]
Select start source from the asynchronous AUX event bus. Change only while STAT.STATE is IDLE.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
#[repr(u8)]
pub enum StartSrc {
#[doc = "31: Select TDC Prescaler event which is generated by configuration of PRECTL."]
TdcPre = 31,
#[doc = "30: AUX_EVCTL:EVSTAT1.MCU_EV"]
McuEv = 30,
#[doc = "29: AUX_EVCTL:EVSTAT1.ACLK_REF"]
AclkRef = 29,
#[doc = "28: AUX_EVCTL:EVSTAT1.AUXIO15"]
Auxio15 = 28,
#[doc = "27: AUX_EVCTL:EVSTAT1.AUXIO14"]
Auxio14 = 27,
#[doc = "26: AUX_EVCTL:EVSTAT1.AUXIO13"]
Auxio13 = 26,
#[doc = "25: AUX_EVCTL:EVSTAT1.AUXIO12"]
Auxio12 = 25,
#[doc = "24: AUX_EVCTL:EVSTAT1.AUXIO11"]
Auxio11 = 24,
#[doc = "23: AUX_EVCTL:EVSTAT1.AUXIO10"]
Auxio10 = 23,
#[doc = "22: AUX_EVCTL:EVSTAT1.AUXIO9"]
Auxio9 = 22,
#[doc = "21: AUX_EVCTL:EVSTAT1.AUXIO8"]
Auxio8 = 21,
#[doc = "20: AUX_EVCTL:EVSTAT1.AUXIO7"]
Auxio7 = 20,
#[doc = "19: AUX_EVCTL:EVSTAT1.AUXIO6"]
Auxio6 = 19,
#[doc = "18: AUX_EVCTL:EVSTAT1.AUXIO5"]
Auxio5 = 18,
#[doc = "17: AUX_EVCTL:EVSTAT1.AUXIO4"]
Auxio4 = 17,
#[doc = "16: AUX_EVCTL:EVSTAT1.AUXIO3"]
Auxio3 = 16,
#[doc = "15: AUX_EVCTL:EVSTAT0.AUXIO2"]
Auxio2 = 15,
#[doc = "14: AUX_EVCTL:EVSTAT0.AUXIO1"]
Auxio1 = 14,
#[doc = "13: AUX_EVCTL:EVSTAT0.AUXIO0"]
Auxio0 = 13,
#[doc = "12: AUX_EVCTL:EVSTAT0.AON_PROG_WU"]
AonProgWu = 12,
#[doc = "11: AUX_EVCTL:EVSTAT0.AON_SW"]
AonSw = 11,
#[doc = "10: AUX_EVCTL:EVSTAT0.OBSMUX1"]
Obsmux1 = 10,
#[doc = "9: AUX_EVCTL:EVSTAT0.OBSMUX0"]
Obsmux0 = 9,
#[doc = "8: AUX_EVCTL:EVSTAT0.ADC_FIFO_ALMOST_FULL"]
AdcFifoAlmostFull = 8,
#[doc = "7: AUX_EVCTL:EVSTAT0.ADC_DONE"]
AdcDone = 7,
#[doc = "6: AUX_EVCTL:EVSTAT0.SMPH_AUTOTAKE_DONE"]
SmphAutotakeDone = 6,
#[doc = "5: AUX_EVCTL:EVSTAT0.TIMER1_EV"]
Timer1Ev = 5,
#[doc = "4: AUX_EVCTL:EVSTAT0.TIMER0_EV"]
Timer0Ev = 4,
#[doc = "3: AUX_ANAIF:ISRCCTL.RESET_N"]
IsrcReset = 3,
#[doc = "2: AUX_EVCTL:EVSTAT0.AUX_COMPB"]
AuxCompb = 2,
#[doc = "1: AUX_EVCTL:EVSTAT0.AUX_COMPA"]
AuxCompa = 1,
#[doc = "0: AUX_EVCTL:EVSTAT0.AON_RTC_CH2"]
AonRtcCh2 = 0,
}
impl From<StartSrc> for u8 {
#[inline(always)]
fn from(variant: StartSrc) -> Self {
variant as _
}
}
impl crate::FieldSpec for StartSrc {
type Ux = u8;
}
impl crate::IsEnum for StartSrc {}
#[doc = "Field `START_SRC` reader - 4:0\\]
Select start source from the asynchronous AUX event bus. Change only while STAT.STATE is IDLE."]
pub type StartSrcR = crate::FieldReader<StartSrc>;
impl StartSrcR {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> StartSrc {
match self.bits {
31 => StartSrc::TdcPre,
30 => StartSrc::McuEv,
29 => StartSrc::AclkRef,
28 => StartSrc::Auxio15,
27 => StartSrc::Auxio14,
26 => StartSrc::Auxio13,
25 => StartSrc::Auxio12,
24 => StartSrc::Auxio11,
23 => StartSrc::Auxio10,
22 => StartSrc::Auxio9,
21 => StartSrc::Auxio8,
20 => StartSrc::Auxio7,
19 => StartSrc::Auxio6,
18 => StartSrc::Auxio5,
17 => StartSrc::Auxio4,
16 => StartSrc::Auxio3,
15 => StartSrc::Auxio2,
14 => StartSrc::Auxio1,
13 => StartSrc::Auxio0,
12 => StartSrc::AonProgWu,
11 => StartSrc::AonSw,
10 => StartSrc::Obsmux1,
9 => StartSrc::Obsmux0,
8 => StartSrc::AdcFifoAlmostFull,
7 => StartSrc::AdcDone,
6 => StartSrc::SmphAutotakeDone,
5 => StartSrc::Timer1Ev,
4 => StartSrc::Timer0Ev,
3 => StartSrc::IsrcReset,
2 => StartSrc::AuxCompb,
1 => StartSrc::AuxCompa,
0 => StartSrc::AonRtcCh2,
_ => unreachable!(),
}
}
#[doc = "Select TDC Prescaler event which is generated by configuration of PRECTL."]
#[inline(always)]
pub fn is_tdc_pre(&self) -> bool {
*self == StartSrc::TdcPre
}
#[doc = "AUX_EVCTL:EVSTAT1.MCU_EV"]
#[inline(always)]
pub fn is_mcu_ev(&self) -> bool {
*self == StartSrc::McuEv
}
#[doc = "AUX_EVCTL:EVSTAT1.ACLK_REF"]
#[inline(always)]
pub fn is_aclk_ref(&self) -> bool {
*self == StartSrc::AclkRef
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO15"]
#[inline(always)]
pub fn is_auxio15(&self) -> bool {
*self == StartSrc::Auxio15
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO14"]
#[inline(always)]
pub fn is_auxio14(&self) -> bool {
*self == StartSrc::Auxio14
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO13"]
#[inline(always)]
pub fn is_auxio13(&self) -> bool {
*self == StartSrc::Auxio13
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO12"]
#[inline(always)]
pub fn is_auxio12(&self) -> bool {
*self == StartSrc::Auxio12
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO11"]
#[inline(always)]
pub fn is_auxio11(&self) -> bool {
*self == StartSrc::Auxio11
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO10"]
#[inline(always)]
pub fn is_auxio10(&self) -> bool {
*self == StartSrc::Auxio10
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO9"]
#[inline(always)]
pub fn is_auxio9(&self) -> bool {
*self == StartSrc::Auxio9
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO8"]
#[inline(always)]
pub fn is_auxio8(&self) -> bool {
*self == StartSrc::Auxio8
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO7"]
#[inline(always)]
pub fn is_auxio7(&self) -> bool {
*self == StartSrc::Auxio7
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO6"]
#[inline(always)]
pub fn is_auxio6(&self) -> bool {
*self == StartSrc::Auxio6
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO5"]
#[inline(always)]
pub fn is_auxio5(&self) -> bool {
*self == StartSrc::Auxio5
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO4"]
#[inline(always)]
pub fn is_auxio4(&self) -> bool {
*self == StartSrc::Auxio4
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO3"]
#[inline(always)]
pub fn is_auxio3(&self) -> bool {
*self == StartSrc::Auxio3
}
#[doc = "AUX_EVCTL:EVSTAT0.AUXIO2"]
#[inline(always)]
pub fn is_auxio2(&self) -> bool {
*self == StartSrc::Auxio2
}
#[doc = "AUX_EVCTL:EVSTAT0.AUXIO1"]
#[inline(always)]
pub fn is_auxio1(&self) -> bool {
*self == StartSrc::Auxio1
}
#[doc = "AUX_EVCTL:EVSTAT0.AUXIO0"]
#[inline(always)]
pub fn is_auxio0(&self) -> bool {
*self == StartSrc::Auxio0
}
#[doc = "AUX_EVCTL:EVSTAT0.AON_PROG_WU"]
#[inline(always)]
pub fn is_aon_prog_wu(&self) -> bool {
*self == StartSrc::AonProgWu
}
#[doc = "AUX_EVCTL:EVSTAT0.AON_SW"]
#[inline(always)]
pub fn is_aon_sw(&self) -> bool {
*self == StartSrc::AonSw
}
#[doc = "AUX_EVCTL:EVSTAT0.OBSMUX1"]
#[inline(always)]
pub fn is_obsmux1(&self) -> bool {
*self == StartSrc::Obsmux1
}
#[doc = "AUX_EVCTL:EVSTAT0.OBSMUX0"]
#[inline(always)]
pub fn is_obsmux0(&self) -> bool {
*self == StartSrc::Obsmux0
}
#[doc = "AUX_EVCTL:EVSTAT0.ADC_FIFO_ALMOST_FULL"]
#[inline(always)]
pub fn is_adc_fifo_almost_full(&self) -> bool {
*self == StartSrc::AdcFifoAlmostFull
}
#[doc = "AUX_EVCTL:EVSTAT0.ADC_DONE"]
#[inline(always)]
pub fn is_adc_done(&self) -> bool {
*self == StartSrc::AdcDone
}
#[doc = "AUX_EVCTL:EVSTAT0.SMPH_AUTOTAKE_DONE"]
#[inline(always)]
pub fn is_smph_autotake_done(&self) -> bool {
*self == StartSrc::SmphAutotakeDone
}
#[doc = "AUX_EVCTL:EVSTAT0.TIMER1_EV"]
#[inline(always)]
pub fn is_timer1_ev(&self) -> bool {
*self == StartSrc::Timer1Ev
}
#[doc = "AUX_EVCTL:EVSTAT0.TIMER0_EV"]
#[inline(always)]
pub fn is_timer0_ev(&self) -> bool {
*self == StartSrc::Timer0Ev
}
#[doc = "AUX_ANAIF:ISRCCTL.RESET_N"]
#[inline(always)]
pub fn is_isrc_reset(&self) -> bool {
*self == StartSrc::IsrcReset
}
#[doc = "AUX_EVCTL:EVSTAT0.AUX_COMPB"]
#[inline(always)]
pub fn is_aux_compb(&self) -> bool {
*self == StartSrc::AuxCompb
}
#[doc = "AUX_EVCTL:EVSTAT0.AUX_COMPA"]
#[inline(always)]
pub fn is_aux_compa(&self) -> bool {
*self == StartSrc::AuxCompa
}
#[doc = "AUX_EVCTL:EVSTAT0.AON_RTC_CH2"]
#[inline(always)]
pub fn is_aon_rtc_ch2(&self) -> bool {
*self == StartSrc::AonRtcCh2
}
}
#[doc = "Field `START_SRC` writer - 4:0\\]
Select start source from the asynchronous AUX event bus. Change only while STAT.STATE is IDLE."]
pub type StartSrcW<'a, REG> = crate::FieldWriter<'a, REG, 5, StartSrc, crate::Safe>;
impl<'a, REG> StartSrcW<'a, REG>
where
REG: crate::Writable + crate::RegisterSpec,
REG::Ux: From<u8>,
{
#[doc = "Select TDC Prescaler event which is generated by configuration of PRECTL."]
#[inline(always)]
pub fn tdc_pre(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::TdcPre)
}
#[doc = "AUX_EVCTL:EVSTAT1.MCU_EV"]
#[inline(always)]
pub fn mcu_ev(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::McuEv)
}
#[doc = "AUX_EVCTL:EVSTAT1.ACLK_REF"]
#[inline(always)]
pub fn aclk_ref(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::AclkRef)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO15"]
#[inline(always)]
pub fn auxio15(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio15)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO14"]
#[inline(always)]
pub fn auxio14(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio14)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO13"]
#[inline(always)]
pub fn auxio13(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio13)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO12"]
#[inline(always)]
pub fn auxio12(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio12)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO11"]
#[inline(always)]
pub fn auxio11(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio11)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO10"]
#[inline(always)]
pub fn auxio10(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio10)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO9"]
#[inline(always)]
pub fn auxio9(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio9)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO8"]
#[inline(always)]
pub fn auxio8(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio8)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO7"]
#[inline(always)]
pub fn auxio7(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio7)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO6"]
#[inline(always)]
pub fn auxio6(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio6)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO5"]
#[inline(always)]
pub fn auxio5(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio5)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO4"]
#[inline(always)]
pub fn auxio4(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio4)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO3"]
#[inline(always)]
pub fn auxio3(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio3)
}
#[doc = "AUX_EVCTL:EVSTAT0.AUXIO2"]
#[inline(always)]
pub fn auxio2(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio2)
}
#[doc = "AUX_EVCTL:EVSTAT0.AUXIO1"]
#[inline(always)]
pub fn auxio1(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio1)
}
#[doc = "AUX_EVCTL:EVSTAT0.AUXIO0"]
#[inline(always)]
pub fn auxio0(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Auxio0)
}
#[doc = "AUX_EVCTL:EVSTAT0.AON_PROG_WU"]
#[inline(always)]
pub fn aon_prog_wu(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::AonProgWu)
}
#[doc = "AUX_EVCTL:EVSTAT0.AON_SW"]
#[inline(always)]
pub fn aon_sw(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::AonSw)
}
#[doc = "AUX_EVCTL:EVSTAT0.OBSMUX1"]
#[inline(always)]
pub fn obsmux1(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Obsmux1)
}
#[doc = "AUX_EVCTL:EVSTAT0.OBSMUX0"]
#[inline(always)]
pub fn obsmux0(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Obsmux0)
}
#[doc = "AUX_EVCTL:EVSTAT0.ADC_FIFO_ALMOST_FULL"]
#[inline(always)]
pub fn adc_fifo_almost_full(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::AdcFifoAlmostFull)
}
#[doc = "AUX_EVCTL:EVSTAT0.ADC_DONE"]
#[inline(always)]
pub fn adc_done(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::AdcDone)
}
#[doc = "AUX_EVCTL:EVSTAT0.SMPH_AUTOTAKE_DONE"]
#[inline(always)]
pub fn smph_autotake_done(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::SmphAutotakeDone)
}
#[doc = "AUX_EVCTL:EVSTAT0.TIMER1_EV"]
#[inline(always)]
pub fn timer1_ev(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Timer1Ev)
}
#[doc = "AUX_EVCTL:EVSTAT0.TIMER0_EV"]
#[inline(always)]
pub fn timer0_ev(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::Timer0Ev)
}
#[doc = "AUX_ANAIF:ISRCCTL.RESET_N"]
#[inline(always)]
pub fn isrc_reset(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::IsrcReset)
}
#[doc = "AUX_EVCTL:EVSTAT0.AUX_COMPB"]
#[inline(always)]
pub fn aux_compb(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::AuxCompb)
}
#[doc = "AUX_EVCTL:EVSTAT0.AUX_COMPA"]
#[inline(always)]
pub fn aux_compa(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::AuxCompa)
}
#[doc = "AUX_EVCTL:EVSTAT0.AON_RTC_CH2"]
#[inline(always)]
pub fn aon_rtc_ch2(self) -> &'a mut crate::W<REG> {
self.variant(StartSrc::AonRtcCh2)
}
}
#[doc = "5:5\\]
Polarity of start source. Change only while STAT.STATE is IDLE.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum StartPol {
#[doc = "1: TDC conversion starts when low level is detected."]
Low = 1,
#[doc = "0: TDC conversion starts when high level is detected."]
High = 0,
}
impl From<StartPol> for bool {
#[inline(always)]
fn from(variant: StartPol) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `START_POL` reader - 5:5\\]
Polarity of start source. Change only while STAT.STATE is IDLE."]
pub type StartPolR = crate::BitReader<StartPol>;
impl StartPolR {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> StartPol {
match self.bits {
true => StartPol::Low,
false => StartPol::High,
}
}
#[doc = "TDC conversion starts when low level is detected."]
#[inline(always)]
pub fn is_low(&self) -> bool {
*self == StartPol::Low
}
#[doc = "TDC conversion starts when high level is detected."]
#[inline(always)]
pub fn is_high(&self) -> bool {
*self == StartPol::High
}
}
#[doc = "Field `START_POL` writer - 5:5\\]
Polarity of start source. Change only while STAT.STATE is IDLE."]
pub type StartPolW<'a, REG> = crate::BitWriter<'a, REG, StartPol>;
impl<'a, REG> StartPolW<'a, REG>
where
REG: crate::Writable + crate::RegisterSpec,
{
#[doc = "TDC conversion starts when low level is detected."]
#[inline(always)]
pub fn low(self) -> &'a mut crate::W<REG> {
self.variant(StartPol::Low)
}
#[doc = "TDC conversion starts when high level is detected."]
#[inline(always)]
pub fn high(self) -> &'a mut crate::W<REG> {
self.variant(StartPol::High)
}
}
#[doc = "Field `RESERVED6` reader - 7:6\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
pub type Reserved6R = crate::FieldReader;
#[doc = "Field `RESERVED6` writer - 7:6\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
pub type Reserved6W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "12:8\\]
Select stop source from the asynchronous AUX event bus. Change only while STAT.STATE is IDLE.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
#[repr(u8)]
pub enum StopSrc {
#[doc = "31: Select TDC Prescaler event which is generated by configuration of PRECTL."]
TdcPre = 31,
#[doc = "30: AUX_EVCTL:EVSTAT1.MCU_EV"]
McuEv = 30,
#[doc = "29: AUX_EVCTL:EVSTAT1.ACLK_REF"]
AclkRef = 29,
#[doc = "28: AUX_EVCTL:EVSTAT1.AUXIO15"]
Auxio15 = 28,
#[doc = "27: AUX_EVCTL:EVSTAT1.AUXIO14"]
Auxio14 = 27,
#[doc = "26: AUX_EVCTL:EVSTAT1.AUXIO13"]
Auxio13 = 26,
#[doc = "25: AUX_EVCTL:EVSTAT1.AUXIO12"]
Auxio12 = 25,
#[doc = "24: AUX_EVCTL:EVSTAT1.AUXIO11"]
Auxio11 = 24,
#[doc = "23: AUX_EVCTL:EVSTAT1.AUXIO10"]
Auxio10 = 23,
#[doc = "22: AUX_EVCTL:EVSTAT1.AUXIO9"]
Auxio9 = 22,
#[doc = "21: AUX_EVCTL:EVSTAT1.AUXIO8"]
Auxio8 = 21,
#[doc = "20: AUX_EVCTL:EVSTAT1.AUXIO7"]
Auxio7 = 20,
#[doc = "19: AUX_EVCTL:EVSTAT1.AUXIO6"]
Auxio6 = 19,
#[doc = "18: AUX_EVCTL:EVSTAT1.AUXIO5"]
Auxio5 = 18,
#[doc = "17: AUX_EVCTL:EVSTAT1.AUXIO4"]
Auxio4 = 17,
#[doc = "16: AUX_EVCTL:EVSTAT1.AUXIO3"]
Auxio3 = 16,
#[doc = "15: AUX_EVCTL:EVSTAT0.AUXIO2"]
Auxio2 = 15,
#[doc = "14: AUX_EVCTL:EVSTAT0.AUXIO1"]
Auxio1 = 14,
#[doc = "13: AUX_EVCTL:EVSTAT0.AUXIO0"]
Auxio0 = 13,
#[doc = "12: AUX_EVCTL:EVSTAT0.AON_PROG_WU"]
AonProgWu = 12,
#[doc = "11: AUX_EVCTL:EVSTAT0.AON_SW"]
AonSw = 11,
#[doc = "10: AUX_EVCTL:EVSTAT0.OBSMUX1"]
Obsmux1 = 10,
#[doc = "9: AUX_EVCTL:EVSTAT0.OBSMUX0"]
Obsmux0 = 9,
#[doc = "8: AUX_EVCTL:EVSTAT0.ADC_FIFO_ALMOST_FULL"]
AdcFifoAlmostFull = 8,
#[doc = "7: AUX_EVCTL:EVSTAT0.ADC_DONE"]
AdcDone = 7,
#[doc = "6: AUX_EVCTL:EVSTAT0.SMPH_AUTOTAKE_DONE"]
SmphAutotakeDone = 6,
#[doc = "5: AUX_EVCTL:EVSTAT0.TIMER1_EV"]
Timer1Ev = 5,
#[doc = "4: AUX_EVCTL:EVSTAT0.TIMER0_EV"]
Timer0Ev = 4,
#[doc = "3: AUX_ANAIF:ISRCCTL.RESET_N"]
IsrcReset = 3,
#[doc = "2: AUX_EVCTL:EVSTAT0.AUX_COMPB"]
AuxCompb = 2,
#[doc = "1: AUX_EVCTL:EVSTAT0.AUX_COMPA"]
AuxCompa = 1,
#[doc = "0: AUX_EVCTL:EVSTAT0.AON_RTC_CH2"]
AonRtcCh2 = 0,
}
impl From<StopSrc> for u8 {
#[inline(always)]
fn from(variant: StopSrc) -> Self {
variant as _
}
}
impl crate::FieldSpec for StopSrc {
type Ux = u8;
}
impl crate::IsEnum for StopSrc {}
#[doc = "Field `STOP_SRC` reader - 12:8\\]
Select stop source from the asynchronous AUX event bus. Change only while STAT.STATE is IDLE."]
pub type StopSrcR = crate::FieldReader<StopSrc>;
impl StopSrcR {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> StopSrc {
match self.bits {
31 => StopSrc::TdcPre,
30 => StopSrc::McuEv,
29 => StopSrc::AclkRef,
28 => StopSrc::Auxio15,
27 => StopSrc::Auxio14,
26 => StopSrc::Auxio13,
25 => StopSrc::Auxio12,
24 => StopSrc::Auxio11,
23 => StopSrc::Auxio10,
22 => StopSrc::Auxio9,
21 => StopSrc::Auxio8,
20 => StopSrc::Auxio7,
19 => StopSrc::Auxio6,
18 => StopSrc::Auxio5,
17 => StopSrc::Auxio4,
16 => StopSrc::Auxio3,
15 => StopSrc::Auxio2,
14 => StopSrc::Auxio1,
13 => StopSrc::Auxio0,
12 => StopSrc::AonProgWu,
11 => StopSrc::AonSw,
10 => StopSrc::Obsmux1,
9 => StopSrc::Obsmux0,
8 => StopSrc::AdcFifoAlmostFull,
7 => StopSrc::AdcDone,
6 => StopSrc::SmphAutotakeDone,
5 => StopSrc::Timer1Ev,
4 => StopSrc::Timer0Ev,
3 => StopSrc::IsrcReset,
2 => StopSrc::AuxCompb,
1 => StopSrc::AuxCompa,
0 => StopSrc::AonRtcCh2,
_ => unreachable!(),
}
}
#[doc = "Select TDC Prescaler event which is generated by configuration of PRECTL."]
#[inline(always)]
pub fn is_tdc_pre(&self) -> bool {
*self == StopSrc::TdcPre
}
#[doc = "AUX_EVCTL:EVSTAT1.MCU_EV"]
#[inline(always)]
pub fn is_mcu_ev(&self) -> bool {
*self == StopSrc::McuEv
}
#[doc = "AUX_EVCTL:EVSTAT1.ACLK_REF"]
#[inline(always)]
pub fn is_aclk_ref(&self) -> bool {
*self == StopSrc::AclkRef
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO15"]
#[inline(always)]
pub fn is_auxio15(&self) -> bool {
*self == StopSrc::Auxio15
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO14"]
#[inline(always)]
pub fn is_auxio14(&self) -> bool {
*self == StopSrc::Auxio14
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO13"]
#[inline(always)]
pub fn is_auxio13(&self) -> bool {
*self == StopSrc::Auxio13
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO12"]
#[inline(always)]
pub fn is_auxio12(&self) -> bool {
*self == StopSrc::Auxio12
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO11"]
#[inline(always)]
pub fn is_auxio11(&self) -> bool {
*self == StopSrc::Auxio11
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO10"]
#[inline(always)]
pub fn is_auxio10(&self) -> bool {
*self == StopSrc::Auxio10
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO9"]
#[inline(always)]
pub fn is_auxio9(&self) -> bool {
*self == StopSrc::Auxio9
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO8"]
#[inline(always)]
pub fn is_auxio8(&self) -> bool {
*self == StopSrc::Auxio8
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO7"]
#[inline(always)]
pub fn is_auxio7(&self) -> bool {
*self == StopSrc::Auxio7
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO6"]
#[inline(always)]
pub fn is_auxio6(&self) -> bool {
*self == StopSrc::Auxio6
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO5"]
#[inline(always)]
pub fn is_auxio5(&self) -> bool {
*self == StopSrc::Auxio5
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO4"]
#[inline(always)]
pub fn is_auxio4(&self) -> bool {
*self == StopSrc::Auxio4
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO3"]
#[inline(always)]
pub fn is_auxio3(&self) -> bool {
*self == StopSrc::Auxio3
}
#[doc = "AUX_EVCTL:EVSTAT0.AUXIO2"]
#[inline(always)]
pub fn is_auxio2(&self) -> bool {
*self == StopSrc::Auxio2
}
#[doc = "AUX_EVCTL:EVSTAT0.AUXIO1"]
#[inline(always)]
pub fn is_auxio1(&self) -> bool {
*self == StopSrc::Auxio1
}
#[doc = "AUX_EVCTL:EVSTAT0.AUXIO0"]
#[inline(always)]
pub fn is_auxio0(&self) -> bool {
*self == StopSrc::Auxio0
}
#[doc = "AUX_EVCTL:EVSTAT0.AON_PROG_WU"]
#[inline(always)]
pub fn is_aon_prog_wu(&self) -> bool {
*self == StopSrc::AonProgWu
}
#[doc = "AUX_EVCTL:EVSTAT0.AON_SW"]
#[inline(always)]
pub fn is_aon_sw(&self) -> bool {
*self == StopSrc::AonSw
}
#[doc = "AUX_EVCTL:EVSTAT0.OBSMUX1"]
#[inline(always)]
pub fn is_obsmux1(&self) -> bool {
*self == StopSrc::Obsmux1
}
#[doc = "AUX_EVCTL:EVSTAT0.OBSMUX0"]
#[inline(always)]
pub fn is_obsmux0(&self) -> bool {
*self == StopSrc::Obsmux0
}
#[doc = "AUX_EVCTL:EVSTAT0.ADC_FIFO_ALMOST_FULL"]
#[inline(always)]
pub fn is_adc_fifo_almost_full(&self) -> bool {
*self == StopSrc::AdcFifoAlmostFull
}
#[doc = "AUX_EVCTL:EVSTAT0.ADC_DONE"]
#[inline(always)]
pub fn is_adc_done(&self) -> bool {
*self == StopSrc::AdcDone
}
#[doc = "AUX_EVCTL:EVSTAT0.SMPH_AUTOTAKE_DONE"]
#[inline(always)]
pub fn is_smph_autotake_done(&self) -> bool {
*self == StopSrc::SmphAutotakeDone
}
#[doc = "AUX_EVCTL:EVSTAT0.TIMER1_EV"]
#[inline(always)]
pub fn is_timer1_ev(&self) -> bool {
*self == StopSrc::Timer1Ev
}
#[doc = "AUX_EVCTL:EVSTAT0.TIMER0_EV"]
#[inline(always)]
pub fn is_timer0_ev(&self) -> bool {
*self == StopSrc::Timer0Ev
}
#[doc = "AUX_ANAIF:ISRCCTL.RESET_N"]
#[inline(always)]
pub fn is_isrc_reset(&self) -> bool {
*self == StopSrc::IsrcReset
}
#[doc = "AUX_EVCTL:EVSTAT0.AUX_COMPB"]
#[inline(always)]
pub fn is_aux_compb(&self) -> bool {
*self == StopSrc::AuxCompb
}
#[doc = "AUX_EVCTL:EVSTAT0.AUX_COMPA"]
#[inline(always)]
pub fn is_aux_compa(&self) -> bool {
*self == StopSrc::AuxCompa
}
#[doc = "AUX_EVCTL:EVSTAT0.AON_RTC_CH2"]
#[inline(always)]
pub fn is_aon_rtc_ch2(&self) -> bool {
*self == StopSrc::AonRtcCh2
}
}
#[doc = "Field `STOP_SRC` writer - 12:8\\]
Select stop source from the asynchronous AUX event bus. Change only while STAT.STATE is IDLE."]
pub type StopSrcW<'a, REG> = crate::FieldWriter<'a, REG, 5, StopSrc, crate::Safe>;
impl<'a, REG> StopSrcW<'a, REG>
where
REG: crate::Writable + crate::RegisterSpec,
REG::Ux: From<u8>,
{
#[doc = "Select TDC Prescaler event which is generated by configuration of PRECTL."]
#[inline(always)]
pub fn tdc_pre(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::TdcPre)
}
#[doc = "AUX_EVCTL:EVSTAT1.MCU_EV"]
#[inline(always)]
pub fn mcu_ev(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::McuEv)
}
#[doc = "AUX_EVCTL:EVSTAT1.ACLK_REF"]
#[inline(always)]
pub fn aclk_ref(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::AclkRef)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO15"]
#[inline(always)]
pub fn auxio15(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio15)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO14"]
#[inline(always)]
pub fn auxio14(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio14)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO13"]
#[inline(always)]
pub fn auxio13(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio13)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO12"]
#[inline(always)]
pub fn auxio12(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio12)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO11"]
#[inline(always)]
pub fn auxio11(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio11)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO10"]
#[inline(always)]
pub fn auxio10(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio10)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO9"]
#[inline(always)]
pub fn auxio9(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio9)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO8"]
#[inline(always)]
pub fn auxio8(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio8)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO7"]
#[inline(always)]
pub fn auxio7(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio7)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO6"]
#[inline(always)]
pub fn auxio6(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio6)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO5"]
#[inline(always)]
pub fn auxio5(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio5)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO4"]
#[inline(always)]
pub fn auxio4(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio4)
}
#[doc = "AUX_EVCTL:EVSTAT1.AUXIO3"]
#[inline(always)]
pub fn auxio3(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio3)
}
#[doc = "AUX_EVCTL:EVSTAT0.AUXIO2"]
#[inline(always)]
pub fn auxio2(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio2)
}
#[doc = "AUX_EVCTL:EVSTAT0.AUXIO1"]
#[inline(always)]
pub fn auxio1(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio1)
}
#[doc = "AUX_EVCTL:EVSTAT0.AUXIO0"]
#[inline(always)]
pub fn auxio0(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Auxio0)
}
#[doc = "AUX_EVCTL:EVSTAT0.AON_PROG_WU"]
#[inline(always)]
pub fn aon_prog_wu(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::AonProgWu)
}
#[doc = "AUX_EVCTL:EVSTAT0.AON_SW"]
#[inline(always)]
pub fn aon_sw(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::AonSw)
}
#[doc = "AUX_EVCTL:EVSTAT0.OBSMUX1"]
#[inline(always)]
pub fn obsmux1(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Obsmux1)
}
#[doc = "AUX_EVCTL:EVSTAT0.OBSMUX0"]
#[inline(always)]
pub fn obsmux0(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Obsmux0)
}
#[doc = "AUX_EVCTL:EVSTAT0.ADC_FIFO_ALMOST_FULL"]
#[inline(always)]
pub fn adc_fifo_almost_full(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::AdcFifoAlmostFull)
}
#[doc = "AUX_EVCTL:EVSTAT0.ADC_DONE"]
#[inline(always)]
pub fn adc_done(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::AdcDone)
}
#[doc = "AUX_EVCTL:EVSTAT0.SMPH_AUTOTAKE_DONE"]
#[inline(always)]
pub fn smph_autotake_done(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::SmphAutotakeDone)
}
#[doc = "AUX_EVCTL:EVSTAT0.TIMER1_EV"]
#[inline(always)]
pub fn timer1_ev(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Timer1Ev)
}
#[doc = "AUX_EVCTL:EVSTAT0.TIMER0_EV"]
#[inline(always)]
pub fn timer0_ev(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::Timer0Ev)
}
#[doc = "AUX_ANAIF:ISRCCTL.RESET_N"]
#[inline(always)]
pub fn isrc_reset(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::IsrcReset)
}
#[doc = "AUX_EVCTL:EVSTAT0.AUX_COMPB"]
#[inline(always)]
pub fn aux_compb(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::AuxCompb)
}
#[doc = "AUX_EVCTL:EVSTAT0.AUX_COMPA"]
#[inline(always)]
pub fn aux_compa(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::AuxCompa)
}
#[doc = "AUX_EVCTL:EVSTAT0.AON_RTC_CH2"]
#[inline(always)]
pub fn aon_rtc_ch2(self) -> &'a mut crate::W<REG> {
self.variant(StopSrc::AonRtcCh2)
}
}
#[doc = "13:13\\]
Polarity of stop source. Change only while STAT.STATE is IDLE.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum StopPol {
#[doc = "1: TDC conversion stops when low level is detected."]
Low = 1,
#[doc = "0: TDC conversion stops when high level is detected."]
High = 0,
}
impl From<StopPol> for bool {
#[inline(always)]
fn from(variant: StopPol) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `STOP_POL` reader - 13:13\\]
Polarity of stop source. Change only while STAT.STATE is IDLE."]
pub type StopPolR = crate::BitReader<StopPol>;
impl StopPolR {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> StopPol {
match self.bits {
true => StopPol::Low,
false => StopPol::High,
}
}
#[doc = "TDC conversion stops when low level is detected."]
#[inline(always)]
pub fn is_low(&self) -> bool {
*self == StopPol::Low
}
#[doc = "TDC conversion stops when high level is detected."]
#[inline(always)]
pub fn is_high(&self) -> bool {
*self == StopPol::High
}
}
#[doc = "Field `STOP_POL` writer - 13:13\\]
Polarity of stop source. Change only while STAT.STATE is IDLE."]
pub type StopPolW<'a, REG> = crate::BitWriter<'a, REG, StopPol>;
impl<'a, REG> StopPolW<'a, REG>
where
REG: crate::Writable + crate::RegisterSpec,
{
#[doc = "TDC conversion stops when low level is detected."]
#[inline(always)]
pub fn low(self) -> &'a mut crate::W<REG> {
self.variant(StopPol::Low)
}
#[doc = "TDC conversion stops when high level is detected."]
#[inline(always)]
pub fn high(self) -> &'a mut crate::W<REG> {
self.variant(StopPol::High)
}
}
#[doc = "Field `RESERVED14` reader - 31:14\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
pub type Reserved14R = crate::FieldReader<u32>;
#[doc = "Field `RESERVED14` writer - 31:14\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
pub type Reserved14W<'a, REG> = crate::FieldWriter<'a, REG, 18, u32>;
impl R {
#[doc = "Bits 0:4 - 4:0\\]
Select start source from the asynchronous AUX event bus. Change only while STAT.STATE is IDLE."]
#[inline(always)]
pub fn start_src(&self) -> StartSrcR {
StartSrcR::new((self.bits & 0x1f) as u8)
}
#[doc = "Bit 5 - 5:5\\]
Polarity of start source. Change only while STAT.STATE is IDLE."]
#[inline(always)]
pub fn start_pol(&self) -> StartPolR {
StartPolR::new(((self.bits >> 5) & 1) != 0)
}
#[doc = "Bits 6:7 - 7:6\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline(always)]
pub fn reserved6(&self) -> Reserved6R {
Reserved6R::new(((self.bits >> 6) & 3) as u8)
}
#[doc = "Bits 8:12 - 12:8\\]
Select stop source from the asynchronous AUX event bus. Change only while STAT.STATE is IDLE."]
#[inline(always)]
pub fn stop_src(&self) -> StopSrcR {
StopSrcR::new(((self.bits >> 8) & 0x1f) as u8)
}
#[doc = "Bit 13 - 13:13\\]
Polarity of stop source. Change only while STAT.STATE is IDLE."]
#[inline(always)]
pub fn stop_pol(&self) -> StopPolR {
StopPolR::new(((self.bits >> 13) & 1) != 0)
}
#[doc = "Bits 14:31 - 31:14\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline(always)]
pub fn reserved14(&self) -> Reserved14R {
Reserved14R::new((self.bits >> 14) & 0x0003_ffff)
}
}
impl W {
#[doc = "Bits 0:4 - 4:0\\]
Select start source from the asynchronous AUX event bus. Change only while STAT.STATE is IDLE."]
#[inline(always)]
#[must_use]
pub fn start_src(&mut self) -> StartSrcW<TrigsrcSpec> {
StartSrcW::new(self, 0)
}
#[doc = "Bit 5 - 5:5\\]
Polarity of start source. Change only while STAT.STATE is IDLE."]
#[inline(always)]
#[must_use]
pub fn start_pol(&mut self) -> StartPolW<TrigsrcSpec> {
StartPolW::new(self, 5)
}
#[doc = "Bits 6:7 - 7:6\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline(always)]
#[must_use]
pub fn reserved6(&mut self) -> Reserved6W<TrigsrcSpec> {
Reserved6W::new(self, 6)
}
#[doc = "Bits 8:12 - 12:8\\]
Select stop source from the asynchronous AUX event bus. Change only while STAT.STATE is IDLE."]
#[inline(always)]
#[must_use]
pub fn stop_src(&mut self) -> StopSrcW<TrigsrcSpec> {
StopSrcW::new(self, 8)
}
#[doc = "Bit 13 - 13:13\\]
Polarity of stop source. Change only while STAT.STATE is IDLE."]
#[inline(always)]
#[must_use]
pub fn stop_pol(&mut self) -> StopPolW<TrigsrcSpec> {
StopPolW::new(self, 13)
}
#[doc = "Bits 14:31 - 31:14\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline(always)]
#[must_use]
pub fn reserved14(&mut self) -> Reserved14W<TrigsrcSpec> {
Reserved14W::new(self, 14)
}
}
#[doc = "Trigger Source Select source and polarity for TDC start and stop events. See the Technical Reference Manual for event timing requirements.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trigsrc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trigsrc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct TrigsrcSpec;
impl crate::RegisterSpec for TrigsrcSpec {
type Ux = u32;
}
#[doc = "`read()` method returns [`trigsrc::R`](R) reader structure"]
impl crate::Readable for TrigsrcSpec {}
#[doc = "`write(|w| ..)` method takes [`trigsrc::W`](W) writer structure"]
impl crate::Writable for TrigsrcSpec {
type Safety = crate::Unsafe;
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets TRIGSRC to value 0"]
impl crate::Resettable for TrigsrcSpec {
const RESET_VALUE: u32 = 0;
}