bl602-pac 0.0.0

Embedded Rust's Peripheral Access Crate for BL602 RISC-V WiFi microcontroller
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177

#[doc = "Register `rf_base_ctrl1` reader"]
pub struct R(crate::R<RF_BASE_CTRL1_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<RF_BASE_CTRL1_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl From<crate::R<RF_BASE_CTRL1_SPEC>> for R {
    #[inline(always)]
    fn from(reader: crate::R<RF_BASE_CTRL1_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `rf_base_ctrl1` writer"]
pub struct W(crate::W<RF_BASE_CTRL1_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<RF_BASE_CTRL1_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl From<crate::W<RF_BASE_CTRL1_SPEC>> for W {
    #[inline(always)]
    fn from(writer: crate::W<RF_BASE_CTRL1_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `aupll_sdm_rst_dly` reader - "]
pub type AUPLL_SDM_RST_DLY_R = crate::FieldReader<u8, u8>;
#[doc = "Field `aupll_sdm_rst_dly` writer - "]
pub type AUPLL_SDM_RST_DLY_W<'a, const O: u8> =
    crate::FieldWriter<'a, u32, RF_BASE_CTRL1_SPEC, u8, u8, 2, O>;
#[doc = "Field `lo_sdm_rst_dly` reader - "]
pub type LO_SDM_RST_DLY_R = crate::FieldReader<u8, u8>;
#[doc = "Field `lo_sdm_rst_dly` writer - "]
pub type LO_SDM_RST_DLY_W<'a, const O: u8> =
    crate::FieldWriter<'a, u32, RF_BASE_CTRL1_SPEC, u8, u8, 2, O>;
#[doc = "Field `ppu_lead` reader - "]
pub type PPU_LEAD_R = crate::FieldReader<u8, u8>;
#[doc = "Field `ppu_lead` writer - "]
pub type PPU_LEAD_W<'a, const O: u8> =
    crate::FieldWriter<'a, u32, RF_BASE_CTRL1_SPEC, u8, u8, 2, O>;
#[doc = "Field `pud_vco_dly` reader - "]
pub type PUD_VCO_DLY_R = crate::FieldReader<u8, u8>;
#[doc = "Field `pud_vco_dly` writer - "]
pub type PUD_VCO_DLY_W<'a, const O: u8> =
    crate::FieldWriter<'a, u32, RF_BASE_CTRL1_SPEC, u8, u8, 2, O>;
#[doc = "Field `pud_iref_dly` reader - "]
pub type PUD_IREF_DLY_R = crate::FieldReader<u8, u8>;
#[doc = "Field `pud_iref_dly` writer - "]
pub type PUD_IREF_DLY_W<'a, const O: u8> =
    crate::FieldWriter<'a, u32, RF_BASE_CTRL1_SPEC, u8, u8, 2, O>;
#[doc = "Field `pud_pa_dly` reader - "]
pub type PUD_PA_DLY_R = crate::FieldReader<u8, u8>;
#[doc = "Field `pud_pa_dly` writer - "]
pub type PUD_PA_DLY_W<'a, const O: u8> =
    crate::FieldWriter<'a, u32, RF_BASE_CTRL1_SPEC, u8, u8, 2, O>;
#[doc = "Field `mbg_trim` reader - "]
pub type MBG_TRIM_R = crate::FieldReader<u8, u8>;
#[doc = "Field `mbg_trim` writer - "]
pub type MBG_TRIM_W<'a, const O: u8> =
    crate::FieldWriter<'a, u32, RF_BASE_CTRL1_SPEC, u8, u8, 2, O>;
impl R {
    #[doc = "Bits 0:1"]
    #[inline(always)]
    pub fn aupll_sdm_rst_dly(&self) -> AUPLL_SDM_RST_DLY_R {
        AUPLL_SDM_RST_DLY_R::new((self.bits & 3) as u8)
    }
    #[doc = "Bits 2:3"]
    #[inline(always)]
    pub fn lo_sdm_rst_dly(&self) -> LO_SDM_RST_DLY_R {
        LO_SDM_RST_DLY_R::new(((self.bits >> 2) & 3) as u8)
    }
    #[doc = "Bits 8:9"]
    #[inline(always)]
    pub fn ppu_lead(&self) -> PPU_LEAD_R {
        PPU_LEAD_R::new(((self.bits >> 8) & 3) as u8)
    }
    #[doc = "Bits 10:11"]
    #[inline(always)]
    pub fn pud_vco_dly(&self) -> PUD_VCO_DLY_R {
        PUD_VCO_DLY_R::new(((self.bits >> 10) & 3) as u8)
    }
    #[doc = "Bits 12:13"]
    #[inline(always)]
    pub fn pud_iref_dly(&self) -> PUD_IREF_DLY_R {
        PUD_IREF_DLY_R::new(((self.bits >> 12) & 3) as u8)
    }
    #[doc = "Bits 14:15"]
    #[inline(always)]
    pub fn pud_pa_dly(&self) -> PUD_PA_DLY_R {
        PUD_PA_DLY_R::new(((self.bits >> 14) & 3) as u8)
    }
    #[doc = "Bits 27:28"]
    #[inline(always)]
    pub fn mbg_trim(&self) -> MBG_TRIM_R {
        MBG_TRIM_R::new(((self.bits >> 27) & 3) as u8)
    }
}
impl W {
    #[doc = "Bits 0:1"]
    #[inline(always)]
    #[must_use]
    pub fn aupll_sdm_rst_dly(&mut self) -> AUPLL_SDM_RST_DLY_W<0> {
        AUPLL_SDM_RST_DLY_W::new(self)
    }
    #[doc = "Bits 2:3"]
    #[inline(always)]
    #[must_use]
    pub fn lo_sdm_rst_dly(&mut self) -> LO_SDM_RST_DLY_W<2> {
        LO_SDM_RST_DLY_W::new(self)
    }
    #[doc = "Bits 8:9"]
    #[inline(always)]
    #[must_use]
    pub fn ppu_lead(&mut self) -> PPU_LEAD_W<8> {
        PPU_LEAD_W::new(self)
    }
    #[doc = "Bits 10:11"]
    #[inline(always)]
    #[must_use]
    pub fn pud_vco_dly(&mut self) -> PUD_VCO_DLY_W<10> {
        PUD_VCO_DLY_W::new(self)
    }
    #[doc = "Bits 12:13"]
    #[inline(always)]
    #[must_use]
    pub fn pud_iref_dly(&mut self) -> PUD_IREF_DLY_W<12> {
        PUD_IREF_DLY_W::new(self)
    }
    #[doc = "Bits 14:15"]
    #[inline(always)]
    #[must_use]
    pub fn pud_pa_dly(&mut self) -> PUD_PA_DLY_W<14> {
        PUD_PA_DLY_W::new(self)
    }
    #[doc = "Bits 27:28"]
    #[inline(always)]
    #[must_use]
    pub fn mbg_trim(&mut self) -> MBG_TRIM_W<27> {
        MBG_TRIM_W::new(self)
    }
    #[doc = "Writes raw bits to the register."]
    #[inline(always)]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "ZRF Control register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rf_base_ctrl1](index.html) module"]
pub struct RF_BASE_CTRL1_SPEC;
impl crate::RegisterSpec for RF_BASE_CTRL1_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [rf_base_ctrl1::R](R) reader structure"]
impl crate::Readable for RF_BASE_CTRL1_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [rf_base_ctrl1::W](W) writer structure"]
impl crate::Writable for RF_BASE_CTRL1_SPEC {
    type Writer = W;
    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
#[doc = "`reset()` method sets rf_base_ctrl1 to value 0"]
impl crate::Resettable for RF_BASE_CTRL1_SPEC {
    const RESET_VALUE: Self::Ux = 0;
}