atsam3a4c 0.1.0

Peripheral access API for ATSAM3A4C microcontrollers (generated using svd2rust)
Documentation 
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#[doc = "Register `DADDR3` reader"]
pub type R = crate::R<Daddr3Spec>;
#[doc = "Register `DADDR3` writer"]
pub type W = crate::W<Daddr3Spec>;
#[doc = "Field `DADDR` reader - Channel x Destination Address"]
pub type DaddrR = crate::FieldReader<u32>;
#[doc = "Field `DADDR` writer - Channel x Destination Address"]
pub type DaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
impl R {
    #[doc = "Bits 0:31 - Channel x Destination Address"]
    #[inline(always)]
    pub fn daddr(&self) -> DaddrR {
        DaddrR::new(self.bits)
    }
}
impl W {
    #[doc = "Bits 0:31 - Channel x Destination Address"]
    #[inline(always)]
    #[must_use]
    pub fn daddr(&mut self) -> DaddrW<Daddr3Spec> {
        DaddrW::new(self, 0)
    }
}
#[doc = "DMAC Channel Destination Address Register (ch_num = 3)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daddr3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`daddr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct Daddr3Spec;
impl crate::RegisterSpec for Daddr3Spec {
    type Ux = u32;
}
#[doc = "`read()` method returns [`daddr3::R`](R) reader structure"]
impl crate::Readable for Daddr3Spec {}
#[doc = "`write(|w| ..)` method takes [`daddr3::W`](W) writer structure"]
impl crate::Writable for Daddr3Spec {
    type Safety = crate::Unsafe;
    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets DADDR3 to value 0"]
impl crate::Resettable for Daddr3Spec {
    const RESET_VALUE: u32 = 0;
}