ADuCM302x 0.1.0

A Peripheral Access Crate for the Analog Devices ADuCM302x series of MCUs
Documentation 
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#[doc = "Reader of register SSTAT"]
pub type R = crate::R<u16, super::SSTAT>;
#[doc = "Writer for register SSTAT"]
pub type W = crate::W<u16, super::SSTAT>;
#[doc = "Register SSTAT `reset()`'s with value 0x01"]
impl crate::ResetValue for super::SSTAT {
    type Type = u16;
    #[inline(always)]
    fn reset_value() -> Self::Type {
        0x01
    }
}
#[doc = "Reader of field `STXFSEREQ`"]
pub type STXFSEREQ_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `STXFSEREQ`"]
pub struct STXFSEREQ_W<'a> {
    w: &'a mut W,
}
impl<'a> STXFSEREQ_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !0x01) | ((value as u16) & 0x01);
        self.w
    }
}
#[doc = "Reader of field `STXUNDR`"]
pub type STXUNDR_R = crate::R<bool, bool>;
#[doc = "Reader of field `STXREQ`"]
pub type STXREQ_R = crate::R<bool, bool>;
#[doc = "Reader of field `SRXREQ`"]
pub type SRXREQ_R = crate::R<bool, bool>;
#[doc = "Reader of field `SRXOVR`"]
pub type SRXOVR_R = crate::R<bool, bool>;
#[doc = "Reader of field `NOACK`"]
pub type NOACK_R = crate::R<bool, bool>;
#[doc = "Reader of field `SBUSY`"]
pub type SBUSY_R = crate::R<bool, bool>;
#[doc = "Reader of field `GCINT`"]
pub type GCINT_R = crate::R<bool, bool>;
#[doc = "Reader of field `GCID`"]
pub type GCID_R = crate::R<u8, u8>;
#[doc = "Reader of field `STOP`"]
pub type STOP_R = crate::R<bool, bool>;
#[doc = "Reader of field `IDMAT`"]
pub type IDMAT_R = crate::R<u8, u8>;
#[doc = "Reader of field `REPSTART`"]
pub type REPSTART_R = crate::R<bool, bool>;
#[doc = "Reader of field `START`"]
pub type START_R = crate::R<bool, bool>;
impl R {
    #[doc = "Bit 0 - Slave Tx FIFO Status or Early Request"]
    #[inline(always)]
    pub fn stxfsereq(&self) -> STXFSEREQ_R {
        STXFSEREQ_R::new((self.bits & 0x01) != 0)
    }
    #[doc = "Bit 1 - Slave Transmit FIFO Underflow"]
    #[inline(always)]
    pub fn stxundr(&self) -> STXUNDR_R {
        STXUNDR_R::new(((self.bits >> 1) & 0x01) != 0)
    }
    #[doc = "Bit 2 - Slave Transmit Request/Slave Transmit Interrupt"]
    #[inline(always)]
    pub fn stxreq(&self) -> STXREQ_R {
        STXREQ_R::new(((self.bits >> 2) & 0x01) != 0)
    }
    #[doc = "Bit 3 - Slave Receive Request"]
    #[inline(always)]
    pub fn srxreq(&self) -> SRXREQ_R {
        SRXREQ_R::new(((self.bits >> 3) & 0x01) != 0)
    }
    #[doc = "Bit 4 - Slave Receive FIFO Overflow"]
    #[inline(always)]
    pub fn srxovr(&self) -> SRXOVR_R {
        SRXOVR_R::new(((self.bits >> 4) & 0x01) != 0)
    }
    #[doc = "Bit 5 - ACK Not Generated by the Slave"]
    #[inline(always)]
    pub fn noack(&self) -> NOACK_R {
        NOACK_R::new(((self.bits >> 5) & 0x01) != 0)
    }
    #[doc = "Bit 6 - Slave Busy"]
    #[inline(always)]
    pub fn sbusy(&self) -> SBUSY_R {
        SBUSY_R::new(((self.bits >> 6) & 0x01) != 0)
    }
    #[doc = "Bit 7 - General Call Interrupt"]
    #[inline(always)]
    pub fn gcint(&self) -> GCINT_R {
        GCINT_R::new(((self.bits >> 7) & 0x01) != 0)
    }
    #[doc = "Bits 8:9 - General ID"]
    #[inline(always)]
    pub fn gcid(&self) -> GCID_R {
        GCID_R::new(((self.bits >> 8) & 0x03) as u8)
    }
    #[doc = "Bit 10 - Stop After Start and Matching Address"]
    #[inline(always)]
    pub fn stop(&self) -> STOP_R {
        STOP_R::new(((self.bits >> 10) & 0x01) != 0)
    }
    #[doc = "Bits 11:12 - Device ID Matched"]
    #[inline(always)]
    pub fn idmat(&self) -> IDMAT_R {
        IDMAT_R::new(((self.bits >> 11) & 0x03) as u8)
    }
    #[doc = "Bit 13 - Repeated Start and Matching Address"]
    #[inline(always)]
    pub fn repstart(&self) -> REPSTART_R {
        REPSTART_R::new(((self.bits >> 13) & 0x01) != 0)
    }
    #[doc = "Bit 14 - Start and Matching Address"]
    #[inline(always)]
    pub fn start(&self) -> START_R {
        START_R::new(((self.bits >> 14) & 0x01) != 0)
    }
}
impl W {
    #[doc = "Bit 0 - Slave Tx FIFO Status or Early Request"]
    #[inline(always)]
    pub fn stxfsereq(&mut self) -> STXFSEREQ_W {
        STXFSEREQ_W { w: self }
    }
}