[−][src]Crate ADuCM302x
Peripheral access API for ADUCM302X microcontrollers (generated using svd2rust v0.17.0)
You can find an overview of the API here.
Modules
| adc0 | Unknown |
| beep0 | Beeper Driver |
| busm0 | Bus matrix |
| clkg0_clk | Clocking |
| clkg0_osc | Clocking |
| crc0 | CRC Accelerator |
| crypt0 | Register Map for the Crypto Block |
| dma0 | DMA |
| flcc0 | Flash Controller |
| flcc0_cache | Cache Controller |
| generic | Common register and bit access and modify traits |
| gpio0 | Unknown |
| i2c0 | I2C Master/Slave |
| nvic0 | Cortex-M3 Interrupt Controller |
| pmg0 | Power Management |
| pmg0_tst | Power Management |
| rng0 | Random Number Generator |
| rtc0 | Real-Time Clock |
| spi0 | Serial Peripheral Interface |
| sport0 | Serial Port |
| sys | System Identification and Debug Enable |
| tmr0 | General Purpose Timer |
| uart0 | Unknown |
| wdt0 | Watchdog Timer |
| xint0 | External interrupt configuration |
Structs
| ADC0 | Unknown |
| BEEP0 | Beeper Driver |
| BUSM0 | Bus matrix |
| CBP | Cache and branch predictor maintenance operations |
| CLKG0_CLK | Clocking |
| CLKG0_OSC | Clocking |
| CPUID | CPUID |
| CRC0 | CRC Accelerator |
| CRYPT0 | Register Map for the Crypto Block |
| CorePeripherals | Core peripherals |
| DCB | Debug Control Block |
| DMA0 | DMA |
| DWT | Data Watchpoint and Trace unit |
| FLCC0 | Flash Controller |
| FLCC0_CACHE | Cache Controller |
| FPB | Flash Patch and Breakpoint unit |
| GPIO0 | Unknown |
| GPIO1 | Unknown |
| GPIO2 | Unknown |
| I2C0 | I2C Master/Slave |
| ITM | Instrumentation Trace Macrocell |
| MPU | Memory Protection Unit |
| NVIC | Nested Vector Interrupt Controller |
| NVIC0 | Cortex-M3 Interrupt Controller |
| PMG0 | Power Management |
| PMG0_TST | Power Management |
| Peripherals | All the peripherals |
| RNG0 | Random Number Generator |
| RTC0 | Real-Time Clock |
| RTC1 | Real-Time Clock |
| SCB | System Control Block |
| SPI0 | Serial Peripheral Interface |
| SPI1 | Serial Peripheral Interface |
| SPI2 | Serial Peripheral Interface |
| SPORT0 | Serial Port |
| SYS | System Identification and Debug Enable |
| SYST | SysTick: System Timer |
| TMR0 | General Purpose Timer |
| TMR1 | General Purpose Timer |
| TMR2 | General Purpose Timer |
| TPIU | Trace Port Interface Unit |
| UART0 | Unknown |
| WDT0 | Watchdog Timer |
| XINT0 | External interrupt configuration |
Enums
| Interrupt | Enumeration of all the interrupts |
Constants
| NVIC_PRIO_BITS | Number available in the NVIC for configuring priority |