Struct ambiq_apollo1_pac::generic::W

pub struct W<U, REG> { /* fields omitted */ }

Register writer

Used as an argument to the closures in the write and modify methods of the register

Methods

impl<U, REG> W<U, REG>

pub unsafe fn bits(&mut self, bits: U) -> &mut Self

Writes raw bits to the register

impl W<u32, Reg<u32, _CFG>>

pub fn clksel(&mut self) -> CLKSEL_W

Bits 24:26 - Select the source and frequency for the ADC clock. All values not enumerated below are undefined.

pub fn trigpol(&mut self) -> TRIGPOL_W

Bit 20 - This bit selects the ADC trigger polarity for external off chip triggers.

pub fn trigsel(&mut self) -> TRIGSEL_W

Bits 16:19 - Select the ADC trigger source.

pub fn refsel(&mut self) -> REFSEL_W

Bits 8:9 - Select the ADC reference voltage.

pub fn battload(&mut self) -> BATTLOAD_W

Bit 7 - Control 500 Ohm battery load resistor.

pub fn opmode(&mut self) -> OPMODE_W

Bits 5:6 - Select the sample rate mode. It adjusts the current in the ADC for higher sample rates. A 12MHz ADC clock can result in a sample rate up to 1Msps depending on the trigger or repeating mode rate. A 1.5MHz ADC clock can result in a sample rate up 125K sps. NOTE: All other values not specified below are undefined.

pub fn lpmode(&mut self) -> LPMODE_W

Bits 3:4 - Select power mode to enter between active scans.

pub fn rpten(&mut self) -> RPTEN_W

Bit 2 - This bit enables Repeating Scan Mode.

pub fn tmpspwr(&mut self) -> TMPSPWR_W

Bit 1 - This enables power to the temperature sensor module. After setting this bit, the temperature sensor will remain powered down while the ADC is power is disconnected (i.e, when the ADC PWDSTAT is 2'b10).

pub fn adcen(&mut self) -> ADCEN_W

Bit 0 - This bit enables the ADC module. While the ADC is enabled, the ADCCFG and SLOT Configuration regsiter settings must remain stable and unchanged.

impl W<u32, Reg<u32, _STAT>>

pub fn pwdstat(&mut self) -> PWDSTAT_W

Bits 0:1 - Indicates the power-status of the ADC.

impl W<u32, Reg<u32, _SWT>>

pub fn swt(&mut self) -> SWT_W

Bits 0:7 - Writing 0x37 to this register generates a software trigger.

impl W<u32, Reg<u32, _SL0CFG>>

pub fn adsel0(&mut self) -> ADSEL0_W

Bits 24:26 - Select the number of measurements to average in the accumulate divide module for this slot.

pub fn thsel0(&mut self) -> THSEL0_W

Bits 16:18 - Select the track and hold delay for this slot. NOTE: The track and hold delay must be less than 50us for correct operation. When the ADC is configured to use the 1.5Mhz clock, the track and hold delay cannot exceed 64 clocks.

pub fn chsel0(&mut self) -> CHSEL0_W

Bits 8:11 - Select one of the 13 channel inputs for this slot.

pub fn wcen0(&mut self) -> WCEN0_W

Bit 1 - This bit enables the window compare function for slot 0.

pub fn slen0(&mut self) -> SLEN0_W

Bit 0 - This bit enables slot 0 for ADC conversions.

impl W<u32, Reg<u32, _SL1CFG>>

pub fn adsel1(&mut self) -> ADSEL1_W

Bits 24:26 - Select the number of measurements to average in the accumulate divide module for this slot.

pub fn thsel1(&mut self) -> THSEL1_W

Bits 16:18 - Select the track and hold delay for this slot. NOTE: The track and hold delay must be less than 50us for correct operation. When the ADC is configured to use the 1.5 Mhz clock, the track and hold delay cannot exceed 64 clocks.

pub fn chsel1(&mut self) -> CHSEL1_W

Bits 8:11 - Select one of the 13 channel inputs for this slot.

pub fn wcen1(&mut self) -> WCEN1_W

Bit 1 - This bit enables the window compare function for slot 1.

pub fn slen1(&mut self) -> SLEN1_W

Bit 0 - This bit enables slot 1 for ADC conversions.

impl W<u32, Reg<u32, _SL2CFG>>

pub fn adsel2(&mut self) -> ADSEL2_W

Bits 24:26 - Select the number of measurements to average in the accumulate divide module for this slot.

pub fn thsel2(&mut self) -> THSEL2_W

Bits 16:18 - Select the track and hold delay for this slot. NOTE: The track and hold delay must be less than 50us for correct operation. When the ADC is configured to use the 1.5Mhz clock, the track and hold delay cannot exceed 64 clocks.

pub fn chsel2(&mut self) -> CHSEL2_W

Bits 8:11 - Select one of the 13 channel inputs for this slot.

pub fn wcen2(&mut self) -> WCEN2_W

Bit 1 - This bit enables the window compare function for slot 2.

pub fn slen2(&mut self) -> SLEN2_W

Bit 0 - This bit enables slot 2 for ADC conversions.

impl W<u32, Reg<u32, _SL3CFG>>

pub fn adsel3(&mut self) -> ADSEL3_W

Bits 24:26 - Select the number of measurements to average in the accumulate divide module for this slot.

pub fn thsel3(&mut self) -> THSEL3_W

Bits 16:18 - Select the track and hold delay for this slot. NOTE: The track and hold delay must be less than 50us for correct operation. When the ADC is configured to use the 1.5Mhz clock, the track and hold delay cannot exceed 64 clocks.

pub fn chsel3(&mut self) -> CHSEL3_W

Bits 8:11 - Select one of the 13 channel inputs for this slot.

pub fn wcen3(&mut self) -> WCEN3_W

Bit 1 - This bit enables the window compare function for slot 3.

pub fn slen3(&mut self) -> SLEN3_W

Bit 0 - This bit enables slot 3 for ADC conversions.

impl W<u32, Reg<u32, _SL4CFG>>

pub fn adsel4(&mut self) -> ADSEL4_W

Bits 24:26 - Select the number of measurements to average in the accumulate divide module for this slot.

pub fn thsel4(&mut self) -> THSEL4_W

Bits 16:18 - Select the track and hold delay for this slot. NOTE: The track and hold delay must be less than 50us for correct operation. When the ADC is configured to use the 1.5Mhz clock, the track and hold delay cannot exceed 64 clocks.

pub fn chsel4(&mut self) -> CHSEL4_W

Bits 8:11 - Select one of the 13 channel inputs for this slot.

pub fn wcen4(&mut self) -> WCEN4_W

Bit 1 - This bit enables the window compare function for slot 4.

pub fn slen4(&mut self) -> SLEN4_W

Bit 0 - This bit enables slot 4 for ADC conversions.

impl W<u32, Reg<u32, _SL5CFG>>

pub fn adsel5(&mut self) -> ADSEL5_W

Bits 24:26 - Select number of measurements to average in the accumulate divide module for this slot.

pub fn thsel5(&mut self) -> THSEL5_W

Bits 16:18 - Select track and hold delay for this slot. NOTE: The track and hold delay must be less than 50us for correct operation. When the ADC is configured to use the 1.5Mhz clock, the track and hold delay cannot exceed 64 clocks.

pub fn chsel5(&mut self) -> CHSEL5_W

Bits 8:11 - Select one of the 13 channel inputs for this slot.

pub fn wcen5(&mut self) -> WCEN5_W

Bit 1 - This bit enables the window compare function for slot 5.

pub fn slen5(&mut self) -> SLEN5_W

Bit 0 - This bit enables slot 5 for ADC conversions.

impl W<u32, Reg<u32, _SL6CFG>>

pub fn adsel6(&mut self) -> ADSEL6_W

Bits 24:26 - Select the number of measurements to average in the accumulate divide module for this slot.

pub fn thsel6(&mut self) -> THSEL6_W

Bits 16:18 - Select track and hold delay for this slot. NOTE: The track and hold delay must be less than 50us for correct operation. When the ADC is configured to use the 1.5Mhz clock, the track and hold delay cannot exceed 64 clocks.

pub fn chsel6(&mut self) -> CHSEL6_W

Bits 8:11 - Select one of the 13 channel inputs for this slot.

pub fn wcen6(&mut self) -> WCEN6_W

Bit 1 - This bit enables the window compare function for slot 6.

pub fn slen6(&mut self) -> SLEN6_W

Bit 0 - This bit enables slot 6 for ADC conversions.

impl W<u32, Reg<u32, _SL7CFG>>

pub fn adsel7(&mut self) -> ADSEL7_W

Bits 24:26 - Select the number of measurements to average in the accumulate divide module for this slot.

pub fn thsel7(&mut self) -> THSEL7_W

Bits 16:18 - Select track and hold delay for this slot. NOTE: The track and hold delay must be less than 50us for correct operation. When the ADC is configured to use the 1.5Mhz clock, the track and hold delay cannot exceed 64 clocks.

pub fn chsel7(&mut self) -> CHSEL7_W

Bits 8:11 - Select one of the 13 channel inputs for this slot.

pub fn wcen7(&mut self) -> WCEN7_W

Bit 1 - This bit enables the window compare function for slot 7.

pub fn slen7(&mut self) -> SLEN7_W

Bit 0 - This bit enables slot 7 for ADC conversions.

impl W<u32, Reg<u32, _WLIM>>

pub fn ulim(&mut self) -> ULIM_W

Bits 16:31 - Sets the upper limit for the wondow comparator.

pub fn llim(&mut self) -> LLIM_W

Bits 0:15 - Sets the lower limit for the wondow comparator.

impl W<u32, Reg<u32, _FIFO>>

pub fn rsvd_27(&mut self) -> RSVD_27_W

Bits 27:31 - RESERVED.

pub fn slotnum(&mut self) -> SLOTNUM_W

Bits 24:26 - Slot number associated with this FIFO data.

pub fn rsvd_20(&mut self) -> RSVD_20_W

Bits 20:23 - RESERVED.

pub fn count(&mut self) -> COUNT_W

Bits 16:19 - Number of valid entries in the ADC FIFO.

pub fn data(&mut self) -> DATA_W

Bits 0:15 - Oldest data in the FIFO.

impl W<u32, Reg<u32, _INTEN>>

pub fn wcinc(&mut self) -> WCINC_W

Bit 5 - Window comparator voltage incursion interrupt.

pub fn wcexc(&mut self) -> WCEXC_W

Bit 4 - Window comparator voltage excursion interrupt.

pub fn fifoovr2(&mut self) -> FIFOOVR2_W

Bit 3 - FIFO 100 percent full interrupt.

pub fn fifoovr1(&mut self) -> FIFOOVR1_W

Bit 2 - FIFO 75 percent full interrupt.

pub fn scncmp(&mut self) -> SCNCMP_W

Bit 1 - ADC scan complete interrupt.

pub fn cnvcmp(&mut self) -> CNVCMP_W

Bit 0 - ADC conversion complete interrupt.

impl W<u32, Reg<u32, _INTSTAT>>

pub fn wcinc(&mut self) -> WCINC_W

Bit 5 - Window comparator voltage incursion interrupt.

pub fn wcexc(&mut self) -> WCEXC_W

Bit 4 - Window comparator voltage excursion interrupt.

pub fn fifoovr2(&mut self) -> FIFOOVR2_W

Bit 3 - FIFO 100 percent full interrupt.

pub fn fifoovr1(&mut self) -> FIFOOVR1_W

Bit 2 - FIFO 75 percent full interrupt.

pub fn scncmp(&mut self) -> SCNCMP_W

Bit 1 - ADC scan complete interrupt.

pub fn cnvcmp(&mut self) -> CNVCMP_W

Bit 0 - ADC conversion complete interrupt.

impl W<u32, Reg<u32, _INTCLR>>

pub fn wcinc(&mut self) -> WCINC_W

Bit 5 - Window comparator voltage incursion interrupt.

pub fn wcexc(&mut self) -> WCEXC_W

Bit 4 - Window comparator voltage excursion interrupt.

pub fn fifoovr2(&mut self) -> FIFOOVR2_W

Bit 3 - FIFO 100 percent full interrupt.

pub fn fifoovr1(&mut self) -> FIFOOVR1_W

Bit 2 - FIFO 75 percent full interrupt.

pub fn scncmp(&mut self) -> SCNCMP_W

Bit 1 - ADC scan complete interrupt.

pub fn cnvcmp(&mut self) -> CNVCMP_W

Bit 0 - ADC conversion complete interrupt.

impl W<u32, Reg<u32, _INTSET>>

pub fn wcinc(&mut self) -> WCINC_W

Bit 5 - Window comparator voltage incursion interrupt.

pub fn wcexc(&mut self) -> WCEXC_W

Bit 4 - Window comparator voltage excursion interrupt.

pub fn fifoovr2(&mut self) -> FIFOOVR2_W

Bit 3 - FIFO 100 percent full interrupt.

pub fn fifoovr1(&mut self) -> FIFOOVR1_W

Bit 2 - FIFO 75 percent full interrupt.

pub fn scncmp(&mut self) -> SCNCMP_W

Bit 1 - ADC scan complete interrupt.

pub fn cnvcmp(&mut self) -> CNVCMP_W

Bit 0 - ADC conversion complete interrupt.

impl W<u32, Reg<u32, _CALXT>>

pub fn calxt(&mut self) -> CALXT_W

Bits 0:10 - XT Oscillator calibration value

impl W<u32, Reg<u32, _CALRC>>

pub fn calrc(&mut self) -> CALRC_W

Bits 0:17 - LFRC Oscillator calibration value

impl W<u32, Reg<u32, _ACALCTR>>

pub fn acalctr(&mut self) -> ACALCTR_W

Bits 0:23 - Autocalibration Counter result.

impl W<u32, Reg<u32, _OCTRL>>

pub fn acal(&mut self) -> ACAL_W

Bits 8:10 - Autocalibration control

pub fn osel(&mut self) -> OSEL_W

Bit 7 - Selects the RTC oscillator (1 => LFRC, 0 => XT)

pub fn fos(&mut self) -> FOS_W

Bit 6 - Oscillator switch on failure function

pub fn stoprc(&mut self) -> STOPRC_W

Bit 1 - Stop the LFRC Oscillator to the RTC

pub fn stopxt(&mut self) -> STOPXT_W

Bit 0 - Stop the XT Oscillator to the RTC

impl W<u32, Reg<u32, _CLKOUT>>

pub fn cken(&mut self) -> CKEN_W

Bit 7 - Enable the CLKOUT signal

pub fn cksel(&mut self) -> CKSEL_W

Bits 0:5 - CLKOUT signal select

impl W<u32, Reg<u32, _CLKKEY>>

pub fn clkkey(&mut self) -> CLKKEY_W

Bits 0:31 - Key register value.

impl W<u32, Reg<u32, _CCTRL>>

pub fn memsel(&mut self) -> MEMSEL_W

Bit 3 - Flash Clock divisor

pub fn coresel(&mut self) -> CORESEL_W

Bits 0:2 - Core Clock divisor

impl W<u32, Reg<u32, _STATUS>>

pub fn oscf(&mut self) -> OSCF_W

Bit 1 - XT Oscillator is enabled but not oscillating

pub fn omode(&mut self) -> OMODE_W

Bit 0 - Current RTC oscillator (1 => LFRC, 0 => XT)

impl W<u32, Reg<u32, _HFADJ>>

pub fn hfwarmup(&mut self) -> HFWARMUP_W

Bit 19 - XT warmup period for HFRC adjustment

pub fn hfxtadj(&mut self) -> HFXTADJ_W

Bits 8:18 - Target HFRC adjustment value.

pub fn hfadjck(&mut self) -> HFADJCK_W

Bits 1:3 - Repeat period for HFRC adjustment

pub fn hfadjen(&mut self) -> HFADJEN_W

Bit 0 - HFRC adjustment control

impl W<u32, Reg<u32, _HFVAL>>

pub fn hftunerb(&mut self) -> HFTUNERB_W

Bits 0:10 - Current HFTUNE value

impl W<u32, Reg<u32, _CLOCKEN>>

pub fn clocken(&mut self) -> CLOCKEN_W

Bits 0:31 - Clock enable status

impl W<u32, Reg<u32, _UARTEN>>

pub fn uarten(&mut self) -> UARTEN_W

Bit 0 - UART system clock control

impl W<u32, Reg<u32, _INTEN>>

pub fn alm(&mut self) -> ALM_W

Bit 3 - RTC Alarm interrupt

pub fn of(&mut self) -> OF_W

Bit 2 - XT Oscillator Fail interrupt

pub fn acc(&mut self) -> ACC_W

Bit 1 - Autocalibration Complete interrupt

pub fn acf(&mut self) -> ACF_W

Bit 0 - Autocalibration Fail interrupt

impl W<u32, Reg<u32, _INTSTAT>>

pub fn alm(&mut self) -> ALM_W

Bit 3 - RTC Alarm interrupt

pub fn of(&mut self) -> OF_W

Bit 2 - XT Oscillator Fail interrupt

pub fn acc(&mut self) -> ACC_W

Bit 1 - Autocalibration Complete interrupt

pub fn acf(&mut self) -> ACF_W

Bit 0 - Autocalibration Fail interrupt

impl W<u32, Reg<u32, _INTCLR>>

pub fn alm(&mut self) -> ALM_W

Bit 3 - RTC Alarm interrupt

pub fn of(&mut self) -> OF_W

Bit 2 - XT Oscillator Fail interrupt

pub fn acc(&mut self) -> ACC_W

Bit 1 - Autocalibration Complete interrupt

pub fn acf(&mut self) -> ACF_W

Bit 0 - Autocalibration Fail interrupt

impl W<u32, Reg<u32, _INTSET>>

pub fn alm(&mut self) -> ALM_W

Bit 3 - RTC Alarm interrupt

pub fn of(&mut self) -> OF_W

Bit 2 - XT Oscillator Fail interrupt

pub fn acc(&mut self) -> ACC_W

Bit 1 - Autocalibration Complete interrupt

pub fn acf(&mut self) -> ACF_W

Bit 0 - Autocalibration Fail interrupt

impl W<u32, Reg<u32, _TMR0>>

pub fn cttmrb0(&mut self) -> CTTMRB0_W

Bits 16:31 - Counter/Timer B0.

pub fn cttmra0(&mut self) -> CTTMRA0_W

Bits 0:15 - Counter/Timer A0.

impl W<u32, Reg<u32, _CMPRA0>>

pub fn cmpr1a0(&mut self) -> CMPR1A0_W

Bits 16:31 - Counter/Timer A0 Compare Register 1. Holds the upper limit for timer half A.

pub fn cmpr0a0(&mut self) -> CMPR0A0_W

Bits 0:15 - Counter/Timer A0 Compare Register 0. Holds the lower limit for timer half A.

impl W<u32, Reg<u32, _CMPRB0>>

pub fn cmpr1b0(&mut self) -> CMPR1B0_W

Bits 16:31 - Counter/Timer B0 Compare Register 1. Holds the upper limit for timer half B.

pub fn cmpr0b0(&mut self) -> CMPR0B0_W

Bits 0:15 - Counter/Timer B0 Compare Register 0. Holds the lower limit for timer half B.

impl W<u32, Reg<u32, _CTRL0>>

pub fn ctlink0(&mut self) -> CTLINK0_W

Bit 31 - Counter/Timer A0/B0 Link bit.

pub fn tmrb0pol(&mut self) -> TMRB0POL_W

Bit 28 - Counter/Timer B0 output polarity.

pub fn tmrb0clr(&mut self) -> TMRB0CLR_W

Bit 27 - Counter/Timer B0 Clear bit.

pub fn tmrb0pe(&mut self) -> TMRB0PE_W

Bit 26 - Counter/Timer B0 Output Enable bit.

pub fn tmrb0ie(&mut self) -> TMRB0IE_W

Bit 25 - Counter/Timer B0 Interrupt Enable bit.

pub fn tmrb0fn(&mut self) -> TMRB0FN_W

Bits 22:24 - Counter/Timer B0 Function Select.

pub fn tmrb0clk(&mut self) -> TMRB0CLK_W

Bits 17:21 - Counter/Timer B0 Clock Select.

pub fn tmrb0en(&mut self) -> TMRB0EN_W

Bit 16 - Counter/Timer B0 Enable bit.

pub fn tmra0pol(&mut self) -> TMRA0POL_W

Bit 12 - Counter/Timer A0 output polarity.

pub fn tmra0clr(&mut self) -> TMRA0CLR_W

Bit 11 - Counter/Timer A0 Clear bit.

pub fn tmra0pe(&mut self) -> TMRA0PE_W

Bit 10 - Counter/Timer A0 Output Enable bit.

pub fn tmra0ie(&mut self) -> TMRA0IE_W

Bit 9 - Counter/Timer A0 Interrupt Enable bit.

pub fn tmra0fn(&mut self) -> TMRA0FN_W

Bits 6:8 - Counter/Timer A0 Function Select.

pub fn tmra0clk(&mut self) -> TMRA0CLK_W

Bits 1:5 - Counter/Timer A0 Clock Select.

pub fn tmra0en(&mut self) -> TMRA0EN_W

Bit 0 - Counter/Timer A0 Enable bit.

impl W<u32, Reg<u32, _TMR1>>

pub fn cttmrb1(&mut self) -> CTTMRB1_W

Bits 16:31 - Counter/Timer B1.

pub fn cttmra1(&mut self) -> CTTMRA1_W

Bits 0:15 - Counter/Timer A1.

impl W<u32, Reg<u32, _CMPRA1>>

pub fn cmpr1a1(&mut self) -> CMPR1A1_W

Bits 16:31 - Counter/Timer A1 Compare Register 1.

pub fn cmpr0a1(&mut self) -> CMPR0A1_W

Bits 0:15 - Counter/Timer A1 Compare Register 0.

impl W<u32, Reg<u32, _CMPRB1>>

pub fn cmpr1b1(&mut self) -> CMPR1B1_W

Bits 16:31 - Counter/Timer B1 Compare Register 1.

pub fn cmpr0b1(&mut self) -> CMPR0B1_W

Bits 0:15 - Counter/Timer B1 Compare Register 0.

impl W<u32, Reg<u32, _CTRL1>>

pub fn ctlink1(&mut self) -> CTLINK1_W

Bit 31 - Counter/Timer A1/B1 Link bit.

pub fn tmrb1pol(&mut self) -> TMRB1POL_W

Bit 28 - Counter/Timer B1 output polarity.

pub fn tmrb1clr(&mut self) -> TMRB1CLR_W

Bit 27 - Counter/Timer B1 Clear bit.

pub fn tmrb1pe(&mut self) -> TMRB1PE_W

Bit 26 - Counter/Timer B1 Output Enable bit.

pub fn tmrb1ie(&mut self) -> TMRB1IE_W

Bit 25 - Counter/Timer B1 Interrupt Enable bit.

pub fn tmrb1fn(&mut self) -> TMRB1FN_W

Bits 22:24 - Counter/Timer B1 Function Select.

pub fn tmrb1clk(&mut self) -> TMRB1CLK_W

Bits 17:21 - Counter/Timer B1 Clock Select.

pub fn tmrb1en(&mut self) -> TMRB1EN_W

Bit 16 - Counter/Timer B1 Enable bit.

pub fn tmra1pol(&mut self) -> TMRA1POL_W

Bit 12 - Counter/Timer A1 output polarity.

pub fn tmra1clr(&mut self) -> TMRA1CLR_W

Bit 11 - Counter/Timer A1 Clear bit.

pub fn tmra1pe(&mut self) -> TMRA1PE_W

Bit 10 - Counter/Timer A1 Output Enable bit.

pub fn tmra1ie(&mut self) -> TMRA1IE_W

Bit 9 - Counter/Timer A1 Interrupt Enable bit.

pub fn tmra1fn(&mut self) -> TMRA1FN_W

Bits 6:8 - Counter/Timer A1 Function Select.

pub fn tmra1clk(&mut self) -> TMRA1CLK_W

Bits 1:5 - Counter/Timer A1 Clock Select.

pub fn tmra1en(&mut self) -> TMRA1EN_W

Bit 0 - Counter/Timer A1 Enable bit.

impl W<u32, Reg<u32, _TMR2>>

pub fn cttmrb2(&mut self) -> CTTMRB2_W

Bits 16:31 - Counter/Timer B2.

pub fn cttmra2(&mut self) -> CTTMRA2_W

Bits 0:15 - Counter/Timer A2.

impl W<u32, Reg<u32, _CMPRA2>>

pub fn cmpr1a2(&mut self) -> CMPR1A2_W

Bits 16:31 - Counter/Timer A2 Compare Register 1.

pub fn cmpr0a2(&mut self) -> CMPR0A2_W

Bits 0:15 - Counter/Timer A2 Compare Register 0.

impl W<u32, Reg<u32, _CMPRB2>>

pub fn cmpr1b2(&mut self) -> CMPR1B2_W

Bits 16:31 - Counter/Timer B2 Compare Register 1.

pub fn cmpr0b2(&mut self) -> CMPR0B2_W

Bits 0:15 - Counter/Timer B2 Compare Register 0.

impl W<u32, Reg<u32, _CTRL2>>

pub fn ctlink2(&mut self) -> CTLINK2_W

Bit 31 - Counter/Timer A2/B2 Link bit.

pub fn tmrb2pol(&mut self) -> TMRB2POL_W

Bit 28 - Counter/Timer B2 output polarity.

pub fn tmrb2clr(&mut self) -> TMRB2CLR_W

Bit 27 - Counter/Timer B2 Clear bit.

pub fn tmrb2pe(&mut self) -> TMRB2PE_W

Bit 26 - Counter/Timer B2 Output Enable bit.

pub fn tmrb2ie(&mut self) -> TMRB2IE_W

Bit 25 - Counter/Timer B2 Interrupt Enable bit.

pub fn tmrb2fn(&mut self) -> TMRB2FN_W

Bits 22:24 - Counter/Timer B2 Function Select.

pub fn tmrb2clk(&mut self) -> TMRB2CLK_W

Bits 17:21 - Counter/Timer B2 Clock Select.

pub fn tmrb2en(&mut self) -> TMRB2EN_W

Bit 16 - Counter/Timer B2 Enable bit.

pub fn tmra2pol(&mut self) -> TMRA2POL_W

Bit 12 - Counter/Timer A2 output polarity.

pub fn tmra2clr(&mut self) -> TMRA2CLR_W

Bit 11 - Counter/Timer A2 Clear bit.

pub fn tmra2pe(&mut self) -> TMRA2PE_W

Bit 10 - Counter/Timer A2 Output Enable bit.

pub fn tmra2ie(&mut self) -> TMRA2IE_W

Bit 9 - Counter/Timer A2 Interrupt Enable bit.

pub fn tmra2fn(&mut self) -> TMRA2FN_W

Bits 6:8 - Counter/Timer A2 Function Select.

pub fn tmra2clk(&mut self) -> TMRA2CLK_W

Bits 1:5 - Counter/Timer A2 Clock Select.

pub fn tmra2en(&mut self) -> TMRA2EN_W

Bit 0 - Counter/Timer A2 Enable bit.

impl W<u32, Reg<u32, _TMR3>>

pub fn cttmrb3(&mut self) -> CTTMRB3_W

Bits 16:31 - Counter/Timer B3.

pub fn cttmra3(&mut self) -> CTTMRA3_W

Bits 0:15 - Counter/Timer A3.

impl W<u32, Reg<u32, _CMPRA3>>

pub fn cmpr1a3(&mut self) -> CMPR1A3_W

Bits 16:31 - Counter/Timer A3 Compare Register 1.

pub fn cmpr0a3(&mut self) -> CMPR0A3_W

Bits 0:15 - Counter/Timer A3 Compare Register 0.

impl W<u32, Reg<u32, _CMPRB3>>

pub fn cmpr1b3(&mut self) -> CMPR1B3_W

Bits 16:31 - Counter/Timer B3 Compare Register 1.

pub fn cmpr0b3(&mut self) -> CMPR0B3_W

Bits 0:15 - Counter/Timer B3 Compare Register 0.

impl W<u32, Reg<u32, _CTRL3>>

pub fn ctlink3(&mut self) -> CTLINK3_W

Bit 31 - Counter/Timer A/B Link bit.

pub fn tmrb3pol(&mut self) -> TMRB3POL_W

Bit 28 - Counter/Timer B3 output polarity.

pub fn tmrb3clr(&mut self) -> TMRB3CLR_W

Bit 27 - Counter/Timer B3 Clear bit.

pub fn tmrb3pe(&mut self) -> TMRB3PE_W

Bit 26 - Counter/Timer B3 Output Enable bit.

pub fn tmrb3ie(&mut self) -> TMRB3IE_W

Bit 25 - Counter/Timer B3 Interrupt Enable bit.

pub fn tmrb3fn(&mut self) -> TMRB3FN_W

Bits 22:24 - Counter/Timer B3 Function Select.

pub fn tmrb3clk(&mut self) -> TMRB3CLK_W

Bits 17:21 - Counter/Timer B3 Clock Select.

pub fn tmrb3en(&mut self) -> TMRB3EN_W

Bit 16 - Counter/Timer B3 Enable bit.

pub fn adcen(&mut self) -> ADCEN_W

Bit 15 - Special Timer A3 enable for ADC function.

pub fn tmra3pol(&mut self) -> TMRA3POL_W

Bit 12 - Counter/Timer A3 output polarity.

pub fn tmra3clr(&mut self) -> TMRA3CLR_W

Bit 11 - Counter/Timer A3 Clear bit.

pub fn tmra3pe(&mut self) -> TMRA3PE_W

Bit 10 - Counter/Timer A3 Output Enable bit.

pub fn tmra3ie(&mut self) -> TMRA3IE_W

Bit 9 - Counter/Timer A3 Interrupt Enable bit.

pub fn tmra3fn(&mut self) -> TMRA3FN_W

Bits 6:8 - Counter/Timer A3 Function Select.

pub fn tmra3clk(&mut self) -> TMRA3CLK_W

Bits 1:5 - Counter/Timer A3 Clock Select.

pub fn tmra3en(&mut self) -> TMRA3EN_W

Bit 0 - Counter/Timer A3 Enable bit.

impl W<u32, Reg<u32, _INTEN>>

pub fn ctmrb3int(&mut self) -> CTMRB3INT_W

Bit 7 - Counter/Timer B3 interrupt.

pub fn ctmra3int(&mut self) -> CTMRA3INT_W

Bit 6 - Counter/Timer A3 interrupt.

pub fn ctmrb2int(&mut self) -> CTMRB2INT_W

Bit 5 - Counter/Timer B2 interrupt.

pub fn ctmra2int(&mut self) -> CTMRA2INT_W

Bit 4 - Counter/Timer A2 interrupt.

pub fn ctmrb1int(&mut self) -> CTMRB1INT_W

Bit 3 - Counter/Timer B1 interrupt.

pub fn ctmra1int(&mut self) -> CTMRA1INT_W

Bit 2 - Counter/Timer A1 interrupt.

pub fn ctmrb0int(&mut self) -> CTMRB0INT_W

Bit 1 - Counter/Timer B0 interrupt.

pub fn ctmra0int(&mut self) -> CTMRA0INT_W

Bit 0 - Counter/Timer A0 interrupt.

impl W<u32, Reg<u32, _INTSTAT>>

pub fn ctmrb3int(&mut self) -> CTMRB3INT_W

Bit 7 - Counter/Timer B3 interrupt.

pub fn ctmra3int(&mut self) -> CTMRA3INT_W

Bit 6 - Counter/Timer A3 interrupt.

pub fn ctmrb2int(&mut self) -> CTMRB2INT_W

Bit 5 - Counter/Timer B2 interrupt.

pub fn ctmra2int(&mut self) -> CTMRA2INT_W

Bit 4 - Counter/Timer A2 interrupt.

pub fn ctmrb1int(&mut self) -> CTMRB1INT_W

Bit 3 - Counter/Timer B1 interrupt.

pub fn ctmra1int(&mut self) -> CTMRA1INT_W

Bit 2 - Counter/Timer A1 interrupt.

pub fn ctmrb0int(&mut self) -> CTMRB0INT_W

Bit 1 - Counter/Timer B0 interrupt.

pub fn ctmra0int(&mut self) -> CTMRA0INT_W

Bit 0 - Counter/Timer A0 interrupt.

impl W<u32, Reg<u32, _INTCLR>>

pub fn ctmrb3int(&mut self) -> CTMRB3INT_W

Bit 7 - Counter/Timer B3 interrupt.

pub fn ctmra3int(&mut self) -> CTMRA3INT_W

Bit 6 - Counter/Timer A3 interrupt.

pub fn ctmrb2int(&mut self) -> CTMRB2INT_W

Bit 5 - Counter/Timer B2 interrupt.

pub fn ctmra2int(&mut self) -> CTMRA2INT_W

Bit 4 - Counter/Timer A2 interrupt.

pub fn ctmrb1int(&mut self) -> CTMRB1INT_W

Bit 3 - Counter/Timer B1 interrupt.

pub fn ctmra1int(&mut self) -> CTMRA1INT_W

Bit 2 - Counter/Timer A1 interrupt.

pub fn ctmrb0int(&mut self) -> CTMRB0INT_W

Bit 1 - Counter/Timer B0 interrupt.

pub fn ctmra0int(&mut self) -> CTMRA0INT_W

Bit 0 - Counter/Timer A0 interrupt.

impl W<u32, Reg<u32, _INTSET>>

pub fn ctmrb3int(&mut self) -> CTMRB3INT_W

Bit 7 - Counter/Timer B3 interrupt.

pub fn ctmra3int(&mut self) -> CTMRA3INT_W

Bit 6 - Counter/Timer A3 interrupt.

pub fn ctmrb2int(&mut self) -> CTMRB2INT_W

Bit 5 - Counter/Timer B2 interrupt.

pub fn ctmra2int(&mut self) -> CTMRA2INT_W

Bit 4 - Counter/Timer A2 interrupt.

pub fn ctmrb1int(&mut self) -> CTMRB1INT_W

Bit 3 - Counter/Timer B1 interrupt.

pub fn ctmra1int(&mut self) -> CTMRA1INT_W

Bit 2 - Counter/Timer A1 interrupt.

pub fn ctmrb0int(&mut self) -> CTMRB0INT_W

Bit 1 - Counter/Timer B0 interrupt.

pub fn ctmra0int(&mut self) -> CTMRA0INT_W

Bit 0 - Counter/Timer A0 interrupt.

impl W<u32, Reg<u32, _PADREGA>>

pub fn pad3pwrup(&mut self) -> PAD3PWRUP_W

Bit 31 - Pad 3 upper power switch enable

pub fn pad3fncsel(&mut self) -> PAD3FNCSEL_W

Bits 27:29 - Pad 3 function select

pub fn pad3strng(&mut self) -> PAD3STRNG_W

Bit 26 - Pad 3 drive strength.

pub fn pad3inpen(&mut self) -> PAD3INPEN_W

Bit 25 - Pad 3 input enable.

pub fn pad3pull(&mut self) -> PAD3PULL_W

Bit 24 - Pad 3 pullup enable

pub fn pad2fncsel(&mut self) -> PAD2FNCSEL_W

Bits 19:21 - Pad 2 function select

pub fn pad2strng(&mut self) -> PAD2STRNG_W

Bit 18 - Pad 2 drive strength

pub fn pad2inpen(&mut self) -> PAD2INPEN_W

Bit 17 - Pad 2 input enable

pub fn pad2pull(&mut self) -> PAD2PULL_W

Bit 16 - Pad 2 pullup enable

pub fn pad1fncsel(&mut self) -> PAD1FNCSEL_W

Bits 11:13 - Pad 1 function select

pub fn pad1strng(&mut self) -> PAD1STRNG_W

Bit 10 - Pad 1 drive strength

pub fn pad1inpen(&mut self) -> PAD1INPEN_W

Bit 9 - Pad 1 input enable

pub fn pad1pull(&mut self) -> PAD1PULL_W

Bit 8 - Pad 1 pullup enable

pub fn pad0fncsel(&mut self) -> PAD0FNCSEL_W

Bits 3:5 - Pad 0 function select

pub fn pad0strng(&mut self) -> PAD0STRNG_W

Bit 2 - Pad 0 drive strength

pub fn pad0inpen(&mut self) -> PAD0INPEN_W

Bit 1 - Pad 0 input enable

pub fn pad0pull(&mut self) -> PAD0PULL_W

Bit 0 - Pad 0 pullup enable

impl W<u32, Reg<u32, _PADREGB>>

pub fn pad7fncsel(&mut self) -> PAD7FNCSEL_W

Bits 27:29 - Pad 7 function select

pub fn pad7strng(&mut self) -> PAD7STRNG_W

Bit 26 - Pad 7 drive strentgh

pub fn pad7inpen(&mut self) -> PAD7INPEN_W

Bit 25 - Pad 7 input enable

pub fn pad7pull(&mut self) -> PAD7PULL_W

Bit 24 - Pad 7 pullup enable

pub fn pad6rsel(&mut self) -> PAD6RSEL_W

Bits 22:23 - Pad 6 pullup resistor selection.

pub fn pad6fncsel(&mut self) -> PAD6FNCSEL_W

Bits 19:21 - Pad 6 function select

pub fn pad6strng(&mut self) -> PAD6STRNG_W

Bit 18 - Pad 6 drive strength

pub fn pad6inpen(&mut self) -> PAD6INPEN_W

Bit 17 - Pad 6 input enable

pub fn pad6pull(&mut self) -> PAD6PULL_W

Bit 16 - Pad 6 pullup enable

pub fn pad5rsel(&mut self) -> PAD5RSEL_W

Bits 14:15 - Pad 5 pullup resistor selection.

pub fn pad5fncsel(&mut self) -> PAD5FNCSEL_W

Bits 11:13 - Pad 5 function select

pub fn pad5strng(&mut self) -> PAD5STRNG_W

Bit 10 - Pad 5 drive strength

pub fn pad5inpen(&mut self) -> PAD5INPEN_W

Bit 9 - Pad 5 input enable

pub fn pad5pull(&mut self) -> PAD5PULL_W

Bit 8 - Pad 5 pullup enable

pub fn pad4pwrup(&mut self) -> PAD4PWRUP_W

Bit 7 - Pad 4 upper power switch enable

pub fn pad4fncsel(&mut self) -> PAD4FNCSEL_W

Bits 3:5 - Pad 4 function select

pub fn pad4strng(&mut self) -> PAD4STRNG_W

Bit 2 - Pad 4 drive strength

pub fn pad4inpen(&mut self) -> PAD4INPEN_W

Bit 1 - Pad 4 input enable

pub fn pad4pull(&mut self) -> PAD4PULL_W

Bit 0 - Pad 4 pullup enable

impl W<u32, Reg<u32, _PADREGC>>

pub fn pad11pwrdn(&mut self) -> PAD11PWRDN_W

Bit 30 - Pad 11 lower power switch enable

pub fn pad11fncsel(&mut self) -> PAD11FNCSEL_W

Bits 27:28 - Pad 11 function select

pub fn pad11strng(&mut self) -> PAD11STRNG_W

Bit 26 - Pad 11 drive strentgh

pub fn pad11inpen(&mut self) -> PAD11INPEN_W

Bit 25 - Pad 11 input enable

pub fn pad11pull(&mut self) -> PAD11PULL_W

Bit 24 - Pad 11 pullup enable

pub fn pad10fncsel(&mut self) -> PAD10FNCSEL_W

Bits 19:21 - Pad 10 function select

pub fn pad10strng(&mut self) -> PAD10STRNG_W

Bit 18 - Pad 10 drive strength

pub fn pad10inpen(&mut self) -> PAD10INPEN_W

Bit 17 - Pad 10 input enable

pub fn pad10pull(&mut self) -> PAD10PULL_W

Bit 16 - Pad 10 pullup enable

pub fn pad9rsel(&mut self) -> PAD9RSEL_W

Bits 14:15 - Pad 9 pullup resistor selection

pub fn pad9fncsel(&mut self) -> PAD9FNCSEL_W

Bits 11:13 - Pad 9 function select

pub fn pad9strng(&mut self) -> PAD9STRNG_W

Bit 10 - Pad 9 drive strength

pub fn pad9inpen(&mut self) -> PAD9INPEN_W

Bit 9 - Pad 9 input enable

pub fn pad9pull(&mut self) -> PAD9PULL_W

Bit 8 - Pad 9 pullup enable

pub fn pad8rsel(&mut self) -> PAD8RSEL_W

Bits 6:7 - Pad 8 pullup resistor selection.

pub fn pad8fncsel(&mut self) -> PAD8FNCSEL_W

Bits 3:5 - Pad 8 function select

pub fn pad8strng(&mut self) -> PAD8STRNG_W

Bit 2 - Pad 8 drive strength

pub fn pad8inpen(&mut self) -> PAD8INPEN_W

Bit 1 - Pad 8 input enable

pub fn pad8pull(&mut self) -> PAD8PULL_W

Bit 0 - Pad 8 pullup enable

impl W<u32, Reg<u32, _PADREGD>>

pub fn pad15fncsel(&mut self) -> PAD15FNCSEL_W

Bits 27:29 - Pad 15 function select

pub fn pad15strng(&mut self) -> PAD15STRNG_W

Bit 26 - Pad 15 drive strentgh

pub fn pad15inpen(&mut self) -> PAD15INPEN_W

Bit 25 - Pad 15 input enable

pub fn pad15pull(&mut self) -> PAD15PULL_W

Bit 24 - Pad 15 pullup enable

pub fn pad14fncsel(&mut self) -> PAD14FNCSEL_W

Bits 19:21 - Pad 14 function select

pub fn pad14strng(&mut self) -> PAD14STRNG_W

Bit 18 - Pad 14 drive strength

pub fn pad14inpen(&mut self) -> PAD14INPEN_W

Bit 17 - Pad 14 input enable

pub fn pad14pull(&mut self) -> PAD14PULL_W

Bit 16 - Pad 14 pullup enable

pub fn pad13fncsel(&mut self) -> PAD13FNCSEL_W

Bits 11:13 - Pad 13 function select

pub fn pad13strng(&mut self) -> PAD13STRNG_W

Bit 10 - Pad 13 drive strength

pub fn pad13inpen(&mut self) -> PAD13INPEN_W

Bit 9 - Pad 13 input enable

pub fn pad13pull(&mut self) -> PAD13PULL_W

Bit 8 - Pad 13 pullup enable

pub fn pad12fncsel(&mut self) -> PAD12FNCSEL_W

Bits 3:4 - Pad 12 function select

pub fn pad12strng(&mut self) -> PAD12STRNG_W

Bit 2 - Pad 12 drive strength

pub fn pad12inpen(&mut self) -> PAD12INPEN_W

Bit 1 - Pad 12 input enable

pub fn pad12pull(&mut self) -> PAD12PULL_W

Bit 0 - Pad 12 pullup enable

impl W<u32, Reg<u32, _PADREGE>>

pub fn pad19fncsel(&mut self) -> PAD19FNCSEL_W

Bits 27:28 - Pad 19 function select

pub fn pad19strng(&mut self) -> PAD19STRNG_W

Bit 26 - Pad 19 drive strentgh

pub fn pad19inpen(&mut self) -> PAD19INPEN_W

Bit 25 - Pad 19 input enable

pub fn pad19pull(&mut self) -> PAD19PULL_W

Bit 24 - Pad 19 pullup enable

pub fn pad18fncsel(&mut self) -> PAD18FNCSEL_W

Bits 19:20 - Pad 18 function select

pub fn pad18strng(&mut self) -> PAD18STRNG_W

Bit 18 - Pad 18 drive strength

pub fn pad18inpen(&mut self) -> PAD18INPEN_W

Bit 17 - Pad 18 input enable

pub fn pad18pull(&mut self) -> PAD18PULL_W

Bit 16 - Pad 18 pullup enable

pub fn pad17fncsel(&mut self) -> PAD17FNCSEL_W

Bits 11:13 - Pad 17 function select

pub fn pad17strng(&mut self) -> PAD17STRNG_W

Bit 10 - Pad 17 drive strength

pub fn pad17inpen(&mut self) -> PAD17INPEN_W

Bit 9 - Pad 17 input enable

pub fn pad17pull(&mut self) -> PAD17PULL_W

Bit 8 - Pad 17 pullup enable

pub fn pad16fncsel(&mut self) -> PAD16FNCSEL_W

Bits 3:4 - Pad 16 function select

pub fn pad16strng(&mut self) -> PAD16STRNG_W

Bit 2 - Pad 16 drive strength

pub fn pad16inpen(&mut self) -> PAD16INPEN_W

Bit 1 - Pad 16 input enable

pub fn pad16pull(&mut self) -> PAD16PULL_W

Bit 0 - Pad 16 pullup enable

impl W<u32, Reg<u32, _PADREGF>>

pub fn pad23fncsel(&mut self) -> PAD23FNCSEL_W

Bits 27:28 - Pad 23 function select

pub fn pad23strng(&mut self) -> PAD23STRNG_W

Bit 26 - Pad 23 drive strentgh

pub fn pad23inpen(&mut self) -> PAD23INPEN_W

Bit 25 - Pad 23 input enable

pub fn pad23pull(&mut self) -> PAD23PULL_W

Bit 24 - Pad 23 pullup enable

pub fn pad22fncsel(&mut self) -> PAD22FNCSEL_W

Bits 19:20 - Pad 22 function select

pub fn pad22strng(&mut self) -> PAD22STRNG_W

Bit 18 - Pad 22 drive strength

pub fn pad22inpen(&mut self) -> PAD22INPEN_W

Bit 17 - Pad 22 input enable

pub fn pad22pull(&mut self) -> PAD22PULL_W

Bit 16 - Pad 22 pullup enable

pub fn pad21fncsel(&mut self) -> PAD21FNCSEL_W

Bits 11:12 - Pad 21 function select

pub fn pad21strng(&mut self) -> PAD21STRNG_W

Bit 10 - Pad 21 drive strength

pub fn pad21inpen(&mut self) -> PAD21INPEN_W

Bit 9 - Pad 21 input enable

pub fn pad21pull(&mut self) -> PAD21PULL_W

Bit 8 - Pad 21 pullup enable

pub fn pad20fncsel(&mut self) -> PAD20FNCSEL_W

Bits 3:4 - Pad 20 function select

pub fn pad20strng(&mut self) -> PAD20STRNG_W

Bit 2 - Pad 20 drive strength

pub fn pad20inpen(&mut self) -> PAD20INPEN_W

Bit 1 - Pad 20 input enable

pub fn pad20pull(&mut self) -> PAD20PULL_W

Bit 0 - Pad 20 pulldown enable

impl W<u32, Reg<u32, _PADREGG>>

pub fn pad27fncsel(&mut self) -> PAD27FNCSEL_W

Bits 27:28 - Pad 27 function select

pub fn pad27strng(&mut self) -> PAD27STRNG_W

Bit 26 - Pad 27 drive strentgh

pub fn pad27inpen(&mut self) -> PAD27INPEN_W

Bit 25 - Pad 27 input enable

pub fn pad27pull(&mut self) -> PAD27PULL_W

Bit 24 - Pad 27 pullup enable

pub fn pad26fncsel(&mut self) -> PAD26FNCSEL_W

Bits 19:20 - Pad 26 function select

pub fn pad26strng(&mut self) -> PAD26STRNG_W

Bit 18 - Pad 26 drive strength

pub fn pad26inpen(&mut self) -> PAD26INPEN_W

Bit 17 - Pad 26 input enable

pub fn pad26pull(&mut self) -> PAD26PULL_W

Bit 16 - Pad 26 pullup enable

pub fn pad25fncsel(&mut self) -> PAD25FNCSEL_W

Bits 11:12 - Pad 25 function select

pub fn pad25strng(&mut self) -> PAD25STRNG_W

Bit 10 - Pad 25 drive strength

pub fn pad25inpen(&mut self) -> PAD25INPEN_W

Bit 9 - Pad 25 input enable

pub fn pad25pull(&mut self) -> PAD25PULL_W

Bit 8 - Pad 25 pullup enable

pub fn pad24fncsel(&mut self) -> PAD24FNCSEL_W

Bits 3:4 - Pad 24 function select

pub fn pad24strng(&mut self) -> PAD24STRNG_W

Bit 2 - Pad 24 drive strength

pub fn pad24inpen(&mut self) -> PAD24INPEN_W

Bit 1 - Pad 24 input enable

pub fn pad24pull(&mut self) -> PAD24PULL_W

Bit 0 - Pad 24 pullup enable

impl W<u32, Reg<u32, _PADREGH>>

pub fn pad31fncsel(&mut self) -> PAD31FNCSEL_W

Bits 27:28 - Pad 31 function select

pub fn pad31strng(&mut self) -> PAD31STRNG_W

Bit 26 - Pad 31 drive strentgh

pub fn pad31inpen(&mut self) -> PAD31INPEN_W

Bit 25 - Pad 31 input enable

pub fn pad31pull(&mut self) -> PAD31PULL_W

Bit 24 - Pad 31 pullup enable

pub fn pad30fncsel(&mut self) -> PAD30FNCSEL_W

Bits 19:20 - Pad 30 function select

pub fn pad30strng(&mut self) -> PAD30STRNG_W

Bit 18 - Pad 30 drive strength

pub fn pad30inpen(&mut self) -> PAD30INPEN_W

Bit 17 - Pad 30 input enable

pub fn pad30pull(&mut self) -> PAD30PULL_W

Bit 16 - Pad 30 pullup enable

pub fn pad29fncsel(&mut self) -> PAD29FNCSEL_W

Bits 11:12 - Pad 29 function select

pub fn pad29strng(&mut self) -> PAD29STRNG_W

Bit 10 - Pad 29 drive strength

pub fn pad29inpen(&mut self) -> PAD29INPEN_W

Bit 9 - Pad 29 input enable

pub fn pad29pull(&mut self) -> PAD29PULL_W

Bit 8 - Pad 29 pullup enable

pub fn pad28fncsel(&mut self) -> PAD28FNCSEL_W

Bits 3:4 - Pad 28 function select

pub fn pad28strng(&mut self) -> PAD28STRNG_W

Bit 2 - Pad 28 drive strength

pub fn pad28inpen(&mut self) -> PAD28INPEN_W

Bit 1 - Pad 28 input enable

pub fn pad28pull(&mut self) -> PAD28PULL_W

Bit 0 - Pad 28 pullup enable

impl W<u32, Reg<u32, _PADREGI>>

pub fn pad35fncsel(&mut self) -> PAD35FNCSEL_W

Bits 27:28 - Pad 35 function select

pub fn pad35strng(&mut self) -> PAD35STRNG_W

Bit 26 - Pad 35 drive strentgh

pub fn pad35inpen(&mut self) -> PAD35INPEN_W

Bit 25 - Pad 35 input enable

pub fn pad35pull(&mut self) -> PAD35PULL_W

Bit 24 - Pad 35 pullup enable

pub fn pad34fncsel(&mut self) -> PAD34FNCSEL_W

Bits 19:20 - Pad 34 function select

pub fn pad34strng(&mut self) -> PAD34STRNG_W

Bit 18 - Pad 34 drive strength

pub fn pad34inpen(&mut self) -> PAD34INPEN_W

Bit 17 - Pad 34 input enable

pub fn pad34pull(&mut self) -> PAD34PULL_W

Bit 16 - Pad 34 pullup enable

pub fn pad33fncsel(&mut self) -> PAD33FNCSEL_W

Bits 11:12 - Pad 33 function select

pub fn pad33strng(&mut self) -> PAD33STRNG_W

Bit 10 - Pad 33 drive strength

pub fn pad33inpen(&mut self) -> PAD33INPEN_W

Bit 9 - Pad 33 input enable

pub fn pad33pull(&mut self) -> PAD33PULL_W

Bit 8 - Pad 33 pullup enable

pub fn pad32fncsel(&mut self) -> PAD32FNCSEL_W

Bits 3:4 - Pad 32 function select

pub fn pad32strng(&mut self) -> PAD32STRNG_W

Bit 2 - Pad 32 drive strength

pub fn pad32inpen(&mut self) -> PAD32INPEN_W

Bit 1 - Pad 32 input enable

pub fn pad32pull(&mut self) -> PAD32PULL_W

Bit 0 - Pad 32 pullup enable

impl W<u32, Reg<u32, _PADREGJ>>

pub fn pad39fncsel(&mut self) -> PAD39FNCSEL_W

Bits 27:28 - Pad 39 function select

pub fn pad39strng(&mut self) -> PAD39STRNG_W

Bit 26 - Pad 39 drive strentgh

pub fn pad39inpen(&mut self) -> PAD39INPEN_W

Bit 25 - Pad 39 input enable

pub fn pad39pull(&mut self) -> PAD39PULL_W

Bit 24 - Pad 39 pullup enable

pub fn pad38fncsel(&mut self) -> PAD38FNCSEL_W

Bits 19:20 - Pad 38 function select

pub fn pad38strng(&mut self) -> PAD38STRNG_W

Bit 18 - Pad 38 drive strength

pub fn pad38inpen(&mut self) -> PAD38INPEN_W

Bit 17 - Pad 38 input enable

pub fn pad38pull(&mut self) -> PAD38PULL_W

Bit 16 - Pad 38 pullup enable

pub fn pad37fncsel(&mut self) -> PAD37FNCSEL_W

Bits 11:12 - Pad 37 function select

pub fn pad37strng(&mut self) -> PAD37STRNG_W

Bit 10 - Pad 37 drive strength

pub fn pad37inpen(&mut self) -> PAD37INPEN_W

Bit 9 - Pad 37 input enable

pub fn pad37pull(&mut self) -> PAD37PULL_W

Bit 8 - Pad 37 pullup enable

pub fn pad36fncsel(&mut self) -> PAD36FNCSEL_W

Bits 3:4 - Pad 36 function select

pub fn pad36strng(&mut self) -> PAD36STRNG_W

Bit 2 - Pad 36 drive strength

pub fn pad36inpen(&mut self) -> PAD36INPEN_W

Bit 1 - Pad 36 input enable

pub fn pad36pull(&mut self) -> PAD36PULL_W

Bit 0 - Pad 36 pullup enable

impl W<u32, Reg<u32, _PADREGK>>

pub fn pad43fncsel(&mut self) -> PAD43FNCSEL_W

Bits 27:28 - Pad 43 function select

pub fn pad43strng(&mut self) -> PAD43STRNG_W

Bit 26 - Pad 43 drive strentgh

pub fn pad43inpen(&mut self) -> PAD43INPEN_W

Bit 25 - Pad 43 input enable

pub fn pad43pull(&mut self) -> PAD43PULL_W

Bit 24 - Pad 43 pullup enable

pub fn pad42fncsel(&mut self) -> PAD42FNCSEL_W

Bits 19:20 - Pad 42 function select

pub fn pad42strng(&mut self) -> PAD42STRNG_W

Bit 18 - Pad 42 drive strength

pub fn pad42inpen(&mut self) -> PAD42INPEN_W

Bit 17 - Pad 42 input enable

pub fn pad42pull(&mut self) -> PAD42PULL_W

Bit 16 - Pad 42 pullup enable

pub fn pad41fncsel(&mut self) -> PAD41FNCSEL_W

Bits 11:12 - Pad 41 function select

pub fn pad41strng(&mut self) -> PAD41STRNG_W

Bit 10 - Pad 41 drive strength

pub fn pad41inpen(&mut self) -> PAD41INPEN_W

Bit 9 - Pad 41 input enable

pub fn pad41pull(&mut self) -> PAD41PULL_W

Bit 8 - Pad 41 pullup enable

pub fn pad40fncsel(&mut self) -> PAD40FNCSEL_W

Bits 3:4 - Pad 40 function select

pub fn pad40strng(&mut self) -> PAD40STRNG_W

Bit 2 - Pad 40 drive strength

pub fn pad40inpen(&mut self) -> PAD40INPEN_W

Bit 1 - Pad 40 input enable

pub fn pad40pull(&mut self) -> PAD40PULL_W

Bit 0 - Pad 40 pullup enable

impl W<u32, Reg<u32, _PADREGL>>

pub fn pad47fncsel(&mut self) -> PAD47FNCSEL_W

Bits 27:28 - Pad 47 function select

pub fn pad47strng(&mut self) -> PAD47STRNG_W

Bit 26 - Pad 47 drive strentgh

pub fn pad47inpen(&mut self) -> PAD47INPEN_W

Bit 25 - Pad 47 input enable

pub fn pad47pull(&mut self) -> PAD47PULL_W

Bit 24 - Pad 47 pullup enable

pub fn pad46fncsel(&mut self) -> PAD46FNCSEL_W

Bits 19:20 - Pad 46 function select

pub fn pad46strng(&mut self) -> PAD46STRNG_W

Bit 18 - Pad 46 drive strength

pub fn pad46inpen(&mut self) -> PAD46INPEN_W

Bit 17 - Pad 46 input enable

pub fn pad46pull(&mut self) -> PAD46PULL_W

Bit 16 - Pad 46 pullup enable

pub fn pad45fncsel(&mut self) -> PAD45FNCSEL_W

Bits 11:12 - Pad 45 function select

pub fn pad45strng(&mut self) -> PAD45STRNG_W

Bit 10 - Pad 45 drive strength

pub fn pad45inpen(&mut self) -> PAD45INPEN_W

Bit 9 - Pad 45 input enable

pub fn pad45pull(&mut self) -> PAD45PULL_W

Bit 8 - Pad 45 pullup enable

pub fn pad44fncsel(&mut self) -> PAD44FNCSEL_W

Bits 3:4 - Pad 44 function select

pub fn pad44strng(&mut self) -> PAD44STRNG_W

Bit 2 - Pad 44 drive strength

pub fn pad44inpen(&mut self) -> PAD44INPEN_W

Bit 1 - Pad 44 input enable

pub fn pad44pull(&mut self) -> PAD44PULL_W

Bit 0 - Pad 44 pullup enable

impl W<u32, Reg<u32, _PADREGM>>

pub fn pad49fncsel(&mut self) -> PAD49FNCSEL_W

Bits 11:12 - Pad 49 function select

pub fn pad49strng(&mut self) -> PAD49STRNG_W

Bit 10 - Pad 49 drive strength

pub fn pad49inpen(&mut self) -> PAD49INPEN_W

Bit 9 - Pad 49 input enable

pub fn pad49pull(&mut self) -> PAD49PULL_W

Bit 8 - Pad 49 pullup enable

pub fn pad48fncsel(&mut self) -> PAD48FNCSEL_W

Bits 3:4 - Pad 48 function select

pub fn pad48strng(&mut self) -> PAD48STRNG_W

Bit 2 - Pad 48 drive strength

pub fn pad48inpen(&mut self) -> PAD48INPEN_W

Bit 1 - Pad 48 input enable

pub fn pad48pull(&mut self) -> PAD48PULL_W

Bit 0 - Pad 48 pullup enable

impl W<u32, Reg<u32, _CFGA>>

pub fn gpio7intd(&mut self) -> GPIO7INTD_W

Bit 31 - GPIO7 interrupt direction.

pub fn gpio7outcfg(&mut self) -> GPIO7OUTCFG_W

Bits 29:30 - GPIO7 output configuration.

pub fn gpio7incfg(&mut self) -> GPIO7INCFG_W

Bit 28 - GPIO7 input enable.

pub fn gpio6intd(&mut self) -> GPIO6INTD_W

Bit 27 - GPIO6 interrupt direction.

pub fn gpio6outcfg(&mut self) -> GPIO6OUTCFG_W

Bits 25:26 - GPIO6 output configuration.

pub fn gpio6incfg(&mut self) -> GPIO6INCFG_W

Bit 24 - GPIO6 input enable.

pub fn gpio5intd(&mut self) -> GPIO5INTD_W

Bit 23 - GPIO5 interrupt direction.

pub fn gpio5outcfg(&mut self) -> GPIO5OUTCFG_W

Bits 21:22 - GPIO5 output configuration.

pub fn gpio5incfg(&mut self) -> GPIO5INCFG_W

Bit 20 - GPIO5 input enable.

pub fn gpio4intd(&mut self) -> GPIO4INTD_W

Bit 19 - GPIO4 interrupt direction.

pub fn gpio4outcfg(&mut self) -> GPIO4OUTCFG_W

Bits 17:18 - GPIO4 output configuration.

pub fn gpio4incfg(&mut self) -> GPIO4INCFG_W

Bit 16 - GPIO4 input enable.

pub fn gpio3intd(&mut self) -> GPIO3INTD_W

Bit 15 - GPIO3 interrupt direction.

pub fn gpio3outcfg(&mut self) -> GPIO3OUTCFG_W

Bits 13:14 - GPIO3 output configuration.

pub fn gpio3incfg(&mut self) -> GPIO3INCFG_W

Bit 12 - GPIO3 input enable.

pub fn gpio2intd(&mut self) -> GPIO2INTD_W

Bit 11 - GPIO2 interrupt direction.

pub fn gpio2outcfg(&mut self) -> GPIO2OUTCFG_W

Bits 9:10 - GPIO2 output configuration.

pub fn gpio2incfg(&mut self) -> GPIO2INCFG_W

Bit 8 - GPIO2 input enable.

pub fn gpio1intd(&mut self) -> GPIO1INTD_W

Bit 7 - GPIO1 interrupt direction.

pub fn gpio1outcfg(&mut self) -> GPIO1OUTCFG_W

Bits 5:6 - GPIO1 output configuration.

pub fn gpio1incfg(&mut self) -> GPIO1INCFG_W

Bit 4 - GPIO1 input enable.

pub fn gpio0intd(&mut self) -> GPIO0INTD_W

Bit 3 - GPIO0 interrupt direction.

pub fn gpio0outcfg(&mut self) -> GPIO0OUTCFG_W

Bits 1:2 - GPIO0 output configuration.

pub fn gpio0incfg(&mut self) -> GPIO0INCFG_W

Bit 0 - GPIO0 input enable.

impl W<u32, Reg<u32, _CFGB>>

pub fn gpio15intd(&mut self) -> GPIO15INTD_W

Bit 31 - GPIO15 interrupt direction.

pub fn gpio15outcfg(&mut self) -> GPIO15OUTCFG_W

Bits 29:30 - GPIO15 output configuration.

pub fn gpio15incfg(&mut self) -> GPIO15INCFG_W

Bit 28 - GPIO15 input enable.

pub fn gpio14intd(&mut self) -> GPIO14INTD_W

Bit 27 - GPIO14 interrupt direction.

pub fn gpio14outcfg(&mut self) -> GPIO14OUTCFG_W

Bits 25:26 - GPIO14 output configuration.

pub fn gpio14incfg(&mut self) -> GPIO14INCFG_W

Bit 24 - GPIO14 input enable.

pub fn gpio13intd(&mut self) -> GPIO13INTD_W

Bit 23 - GPIO13 interrupt direction.

pub fn gpio13outcfg(&mut self) -> GPIO13OUTCFG_W

Bits 21:22 - GPIO13 output configuration.

pub fn gpio13incfg(&mut self) -> GPIO13INCFG_W

Bit 20 - GPIO13 input enable.

pub fn gpio12intd(&mut self) -> GPIO12INTD_W

Bit 19 - GPIO12 interrupt direction.

pub fn gpio12outcfg(&mut self) -> GPIO12OUTCFG_W

Bits 17:18 - GPIO12 output configuration.

pub fn gpio12incfg(&mut self) -> GPIO12INCFG_W

Bit 16 - GPIO12 input enable.

pub fn gpio11intd(&mut self) -> GPIO11INTD_W

Bit 15 - GPIO11 interrupt direction.

pub fn gpio11outcfg(&mut self) -> GPIO11OUTCFG_W

Bits 13:14 - GPIO11 output configuration.

pub fn gpio11incfg(&mut self) -> GPIO11INCFG_W

Bit 12 - GPIO11 input enable.

pub fn gpio10intd(&mut self) -> GPIO10INTD_W

Bit 11 - GPIO10 interrupt direction.

pub fn gpio10outcfg(&mut self) -> GPIO10OUTCFG_W

Bits 9:10 - GPIO10 output configuration.

pub fn gpio10incfg(&mut self) -> GPIO10INCFG_W

Bit 8 - GPIO10 input enable.

pub fn gpio9intd(&mut self) -> GPIO9INTD_W

Bit 7 - GPIO9 interrupt direction.

pub fn gpio9outcfg(&mut self) -> GPIO9OUTCFG_W

Bits 5:6 - GPIO9 output configuration.

pub fn gpio9incfg(&mut self) -> GPIO9INCFG_W

Bit 4 - GPIO9 input enable.

pub fn gpio8intd(&mut self) -> GPIO8INTD_W

Bit 3 - GPIO8 interrupt direction.

pub fn gpio8outcfg(&mut self) -> GPIO8OUTCFG_W

Bits 1:2 - GPIO8 output configuration.

pub fn gpio8incfg(&mut self) -> GPIO8INCFG_W

Bit 0 - GPIO8 input enable.

impl W<u32, Reg<u32, _CFGC>>

pub fn gpio23intd(&mut self) -> GPIO23INTD_W

Bit 31 - GPIO23 interrupt direction.

pub fn gpio23outcfg(&mut self) -> GPIO23OUTCFG_W

Bits 29:30 - GPIO23 output configuration.

pub fn gpio23incfg(&mut self) -> GPIO23INCFG_W

Bit 28 - GPIO23 input enable.

pub fn gpio22intd(&mut self) -> GPIO22INTD_W

Bit 27 - GPIO22 interrupt direction.

pub fn gpio22outcfg(&mut self) -> GPIO22OUTCFG_W

Bits 25:26 - GPIO22 output configuration.

pub fn gpio22incfg(&mut self) -> GPIO22INCFG_W

Bit 24 - GPIO22 input enable.

pub fn gpio21intd(&mut self) -> GPIO21INTD_W

Bit 23 - GPIO21 interrupt direction.

pub fn gpio21outcfg(&mut self) -> GPIO21OUTCFG_W

Bits 21:22 - GPIO21 output configuration.

pub fn gpio21incfg(&mut self) -> GPIO21INCFG_W

Bit 20 - GPIO21 input enable.

pub fn gpio20intd(&mut self) -> GPIO20INTD_W

Bit 19 - GPIO20 interrupt direction.

pub fn gpio20outcfg(&mut self) -> GPIO20OUTCFG_W

Bits 17:18 - GPIO20 output configuration.

pub fn gpio20incfg(&mut self) -> GPIO20INCFG_W

Bit 16 - GPIO20 input enable.

pub fn gpio19intd(&mut self) -> GPIO19INTD_W

Bit 15 - GPIO19 interrupt direction.

pub fn gpio19outcfg(&mut self) -> GPIO19OUTCFG_W

Bits 13:14 - GPIO19 output configuration.

pub fn gpio19incfg(&mut self) -> GPIO19INCFG_W

Bit 12 - GPIO19 input enable.

pub fn gpio18intd(&mut self) -> GPIO18INTD_W

Bit 11 - GPIO18 interrupt direction.

pub fn gpio18outcfg(&mut self) -> GPIO18OUTCFG_W

Bits 9:10 - GPIO18 output configuration.

pub fn gpio18incfg(&mut self) -> GPIO18INCFG_W

Bit 8 - GPIO18 input enable.

pub fn gpio17intd(&mut self) -> GPIO17INTD_W

Bit 7 - GPIO17 interrupt direction.

pub fn gpio17outcfg(&mut self) -> GPIO17OUTCFG_W

Bits 5:6 - GPIO17 output configuration.

pub fn gpio17incfg(&mut self) -> GPIO17INCFG_W

Bit 4 - GPIO17 input enable.

pub fn gpio16intd(&mut self) -> GPIO16INTD_W

Bit 3 - GPIO16 interrupt direction.

pub fn gpio16outcfg(&mut self) -> GPIO16OUTCFG_W

Bits 1:2 - GPIO16 output configuration.

pub fn gpio16incfg(&mut self) -> GPIO16INCFG_W

Bit 0 - GPIO16 input enable.

impl W<u32, Reg<u32, _CFGD>>

pub fn gpio31intd(&mut self) -> GPIO31INTD_W

Bit 31 - GPIO31 interrupt direction.

pub fn gpio31outcfg(&mut self) -> GPIO31OUTCFG_W

Bits 29:30 - GPIO31 output configuration.

pub fn gpio31incfg(&mut self) -> GPIO31INCFG_W

Bit 28 - GPIO31 input enable.

pub fn gpio30intd(&mut self) -> GPIO30INTD_W

Bit 27 - GPIO30 interrupt direction.

pub fn gpio30outcfg(&mut self) -> GPIO30OUTCFG_W

Bits 25:26 - GPIO30 output configuration.

pub fn gpio30incfg(&mut self) -> GPIO30INCFG_W

Bit 24 - GPIO30 input enable.

pub fn gpio29intd(&mut self) -> GPIO29INTD_W

Bit 23 - GPIO29 interrupt direction.

pub fn gpio29outcfg(&mut self) -> GPIO29OUTCFG_W

Bits 21:22 - GPIO29 output configuration.

pub fn gpio29incfg(&mut self) -> GPIO29INCFG_W

Bit 20 - GPIO29 input enable.

pub fn gpio28intd(&mut self) -> GPIO28INTD_W

Bit 19 - GPIO28 interrupt direction.

pub fn gpio28outcfg(&mut self) -> GPIO28OUTCFG_W

Bits 17:18 - GPIO28 output configuration.

pub fn gpio28incfg(&mut self) -> GPIO28INCFG_W

Bit 16 - GPIO28 input enable.

pub fn gpio27intd(&mut self) -> GPIO27INTD_W

Bit 15 - GPIO27 interrupt direction.

pub fn gpio27outcfg(&mut self) -> GPIO27OUTCFG_W

Bits 13:14 - GPIO27 output configuration.

pub fn gpio27incfg(&mut self) -> GPIO27INCFG_W

Bit 12 - GPIO27 input enable.

pub fn gpio26intd(&mut self) -> GPIO26INTD_W

Bit 11 - GPIO26 interrupt direction.

pub fn gpio26outcfg(&mut self) -> GPIO26OUTCFG_W

Bits 9:10 - GPIO26 output configuration.

pub fn gpio26incfg(&mut self) -> GPIO26INCFG_W

Bit 8 - GPIO26 input enable.

pub fn gpio25intd(&mut self) -> GPIO25INTD_W

Bit 7 - GPIO25 interrupt direction.

pub fn gpio25outcfg(&mut self) -> GPIO25OUTCFG_W

Bits 5:6 - GPIO25 output configuration.

pub fn gpio25incfg(&mut self) -> GPIO25INCFG_W

Bit 4 - GPIO25 input enable.

pub fn gpio24intd(&mut self) -> GPIO24INTD_W

Bit 3 - GPIO24 interrupt direction.

pub fn gpio24outcfg(&mut self) -> GPIO24OUTCFG_W

Bits 1:2 - GPIO24 output configuration.

pub fn gpio24incfg(&mut self) -> GPIO24INCFG_W

Bit 0 - GPIO24 input enable.

impl W<u32, Reg<u32, _CFGE>>

pub fn gpio39intd(&mut self) -> GPIO39INTD_W

Bit 31 - GPIO39 interrupt direction.

pub fn gpio39outcfg(&mut self) -> GPIO39OUTCFG_W

Bits 29:30 - GPIO39 output configuration.

pub fn gpio39incfg(&mut self) -> GPIO39INCFG_W

Bit 28 - GPIO39 input enable.

pub fn gpio38intd(&mut self) -> GPIO38INTD_W

Bit 27 - GPIO38 interrupt direction.

pub fn gpio38outcfg(&mut self) -> GPIO38OUTCFG_W

Bits 25:26 - GPIO38 output configuration.

pub fn gpio38incfg(&mut self) -> GPIO38INCFG_W

Bit 24 - GPIO38 input enable.

pub fn gpio37intd(&mut self) -> GPIO37INTD_W

Bit 23 - GPIO37 interrupt direction.

pub fn gpio37outcfg(&mut self) -> GPIO37OUTCFG_W

Bits 21:22 - GPIO37 output configuration.

pub fn gpio37incfg(&mut self) -> GPIO37INCFG_W

Bit 20 - GPIO37 input enable.

pub fn gpio36intd(&mut self) -> GPIO36INTD_W

Bit 19 - GPIO36 interrupt direction.

pub fn gpio36outcfg(&mut self) -> GPIO36OUTCFG_W

Bits 17:18 - GPIO36 output configuration.

pub fn gpio36incfg(&mut self) -> GPIO36INCFG_W

Bit 16 - GPIO36 input enable.

pub fn gpio35intd(&mut self) -> GPIO35INTD_W

Bit 15 - GPIO35 interrupt direction.

pub fn gpio35outcfg(&mut self) -> GPIO35OUTCFG_W

Bits 13:14 - GPIO35 output configuration.

pub fn gpio35incfg(&mut self) -> GPIO35INCFG_W

Bit 12 - GPIO35 input enable.

pub fn gpio34intd(&mut self) -> GPIO34INTD_W

Bit 11 - GPIO34 interrupt direction.

pub fn gpio34outcfg(&mut self) -> GPIO34OUTCFG_W

Bits 9:10 - GPIO34 output configuration.

pub fn gpio34incfg(&mut self) -> GPIO34INCFG_W

Bit 8 - GPIO34 input enable.

pub fn gpio33intd(&mut self) -> GPIO33INTD_W

Bit 7 - GPIO33 interrupt direction.

pub fn gpio33outcfg(&mut self) -> GPIO33OUTCFG_W

Bits 5:6 - GPIO33 output configuration.

pub fn gpio33incfg(&mut self) -> GPIO33INCFG_W

Bit 4 - GPIO33 input enable.

pub fn gpio32intd(&mut self) -> GPIO32INTD_W

Bit 3 - GPIO32 interrupt direction.

pub fn gpio32outcfg(&mut self) -> GPIO32OUTCFG_W

Bits 1:2 - GPIO32 output configuration.

pub fn gpio32incfg(&mut self) -> GPIO32INCFG_W

Bit 0 - GPIO32 input enable.

impl W<u32, Reg<u32, _CFGF>>

pub fn gpio47intd(&mut self) -> GPIO47INTD_W

Bit 31 - GPIO47 interrupt direction.

pub fn gpio47outcfg(&mut self) -> GPIO47OUTCFG_W

Bits 29:30 - GPIO47 output configuration.

pub fn gpio47incfg(&mut self) -> GPIO47INCFG_W

Bit 28 - GPIO47 input enable.

pub fn gpio46intd(&mut self) -> GPIO46INTD_W

Bit 27 - GPIO46 interrupt direction.

pub fn gpio46outcfg(&mut self) -> GPIO46OUTCFG_W

Bits 25:26 - GPIO46 output configuration.

pub fn gpio46incfg(&mut self) -> GPIO46INCFG_W

Bit 24 - GPIO46 input enable.

pub fn gpio45intd(&mut self) -> GPIO45INTD_W

Bit 23 - GPIO45 interrupt direction.

pub fn gpio45outcfg(&mut self) -> GPIO45OUTCFG_W

Bits 21:22 - GPIO45 output configuration.

pub fn gpio45incfg(&mut self) -> GPIO45INCFG_W

Bit 20 - GPIO45 input enable.

pub fn gpio44intd(&mut self) -> GPIO44INTD_W

Bit 19 - GPIO44 interrupt direction.

pub fn gpio44outcfg(&mut self) -> GPIO44OUTCFG_W

Bits 17:18 - GPIO44 output configuration.

pub fn gpio44incfg(&mut self) -> GPIO44INCFG_W

Bit 16 - GPIO44 input enable.

pub fn gpio43intd(&mut self) -> GPIO43INTD_W

Bit 15 - GPIO43 interrupt direction.

pub fn gpio43outcfg(&mut self) -> GPIO43OUTCFG_W

Bits 13:14 - GPIO43 output configuration.

pub fn gpio43incfg(&mut self) -> GPIO43INCFG_W

Bit 12 - GPIO43 input enable.

pub fn gpio42intd(&mut self) -> GPIO42INTD_W

Bit 11 - GPIO42 interrupt direction.

pub fn gpio42outcfg(&mut self) -> GPIO42OUTCFG_W

Bits 9:10 - GPIO42 output configuration.

pub fn gpio42incfg(&mut self) -> GPIO42INCFG_W

Bit 8 - GPIO42 input enable.

pub fn gpio41intd(&mut self) -> GPIO41INTD_W

Bit 7 - GPIO41 interrupt direction.

pub fn gpio41outcfg(&mut self) -> GPIO41OUTCFG_W

Bits 5:6 - GPIO41 output configuration.

pub fn gpio41incfg(&mut self) -> GPIO41INCFG_W

Bit 4 - GPIO41 input enable.

pub fn gpio40intd(&mut self) -> GPIO40INTD_W

Bit 3 - GPIO40 interrupt direction.

pub fn gpio40outcfg(&mut self) -> GPIO40OUTCFG_W

Bits 1:2 - GPIO40 output configuration.

pub fn gpio40incfg(&mut self) -> GPIO40INCFG_W

Bit 0 - GPIO40 input enable.

impl W<u32, Reg<u32, _CFGG>>

pub fn gpio49intd(&mut self) -> GPIO49INTD_W

Bit 7 - GPIO49 interrupt direction.

pub fn gpio49outcfg(&mut self) -> GPIO49OUTCFG_W

Bits 5:6 - GPIO49 output configuration.

pub fn gpio49incfg(&mut self) -> GPIO49INCFG_W

Bit 4 - GPIO49 input enable.

pub fn gpio48intd(&mut self) -> GPIO48INTD_W

Bit 3 - GPIO48 interrupt direction.

pub fn gpio48outcfg(&mut self) -> GPIO48OUTCFG_W

Bits 1:2 - GPIO48 output configuration.

pub fn gpio48incfg(&mut self) -> GPIO48INCFG_W

Bit 0 - GPIO48 input enable.

impl W<u32, Reg<u32, _PADKEY>>

pub fn padkey(&mut self) -> PADKEY_W

Bits 0:31 - Key register value.

impl W<u32, Reg<u32, _RDA>>

pub fn rda(&mut self) -> RDA_W

Bits 0:31 - GPIO31-0 read data.

impl W<u32, Reg<u32, _RDB>>

pub fn rdb(&mut self) -> RDB_W

Bits 0:17 - GPIO49-32 read data.

impl W<u32, Reg<u32, _WTA>>

pub fn wta(&mut self) -> WTA_W

Bits 0:31 - GPIO31-0 write data.

impl W<u32, Reg<u32, _WTB>>

pub fn wtb(&mut self) -> WTB_W

Bits 0:17 - GPIO49-32 write data.

impl W<u32, Reg<u32, _WTSA>>

pub fn wtsa(&mut self) -> WTSA_W

Bits 0:31 - Set the GPIO31-0 write data.

impl W<u32, Reg<u32, _WTSB>>

pub fn wtsb(&mut self) -> WTSB_W

Bits 0:17 - Set the GPIO49-32 write data.

impl W<u32, Reg<u32, _WTCA>>

pub fn wtca(&mut self) -> WTCA_W

Bits 0:31 - Clear the GPIO31-0 write data.

impl W<u32, Reg<u32, _WTCB>>

pub fn wtcb(&mut self) -> WTCB_W

Bits 0:17 - Clear the GPIO49-32 write data.

impl W<u32, Reg<u32, _ENA>>

pub fn ena(&mut self) -> ENA_W

Bits 0:31 - GPIO31-0 output enables

impl W<u32, Reg<u32, _ENB>>

pub fn enb(&mut self) -> ENB_W

Bits 0:17 - GPIO49-32 output enables

impl W<u32, Reg<u32, _ENSA>>

pub fn ensa(&mut self) -> ENSA_W

Bits 0:31 - Set the GPIO31-0 output enables

impl W<u32, Reg<u32, _ENSB>>

pub fn ensb(&mut self) -> ENSB_W

Bits 0:17 - Set the GPIO49-32 output enables

impl W<u32, Reg<u32, _ENCA>>

pub fn enca(&mut self) -> ENCA_W

Bits 0:31 - Clear the GPIO31-0 output enables

impl W<u32, Reg<u32, _ENCB>>

pub fn encb(&mut self) -> ENCB_W

Bits 0:17 - Clear the GPIO49-32 output enables

impl W<u32, Reg<u32, _INT0EN>>

pub fn gpio31(&mut self) -> GPIO31_W

Bit 31 - GPIO31 interrupt.

pub fn gpio30(&mut self) -> GPIO30_W

Bit 30 - GPIO30 interrupt.

pub fn gpio29(&mut self) -> GPIO29_W

Bit 29 - GPIO29 interrupt.

pub fn gpio28(&mut self) -> GPIO28_W

Bit 28 - GPIO28 interrupt.

pub fn gpio27(&mut self) -> GPIO27_W

Bit 27 - GPIO27 interrupt.

pub fn gpio26(&mut self) -> GPIO26_W

Bit 26 - GPIO26 interrupt.

pub fn gpio25(&mut self) -> GPIO25_W

Bit 25 - GPIO25 interrupt.

pub fn gpio24(&mut self) -> GPIO24_W

Bit 24 - GPIO24 interrupt.

pub fn gpio23(&mut self) -> GPIO23_W

Bit 23 - GPIO23 interrupt.

pub fn gpio22(&mut self) -> GPIO22_W

Bit 22 - GPIO22 interrupt.

pub fn gpio21(&mut self) -> GPIO21_W

Bit 21 - GPIO21 interrupt.

pub fn gpio20(&mut self) -> GPIO20_W

Bit 20 - GPIO20 interrupt.

pub fn gpio19(&mut self) -> GPIO19_W

Bit 19 - GPIO19 interrupt.

pub fn gpio18(&mut self) -> GPIO18_W

Bit 18 - GPIO18interrupt.

pub fn gpio17(&mut self) -> GPIO17_W

Bit 17 - GPIO17 interrupt.

pub fn gpio16(&mut self) -> GPIO16_W

Bit 16 - GPIO16 interrupt.

pub fn gpio15(&mut self) -> GPIO15_W

Bit 15 - GPIO15 interrupt.

pub fn gpio14(&mut self) -> GPIO14_W

Bit 14 - GPIO14 interrupt.

pub fn gpio13(&mut self) -> GPIO13_W

Bit 13 - GPIO13 interrupt.

pub fn gpio12(&mut self) -> GPIO12_W

Bit 12 - GPIO12 interrupt.

pub fn gpio11(&mut self) -> GPIO11_W

Bit 11 - GPIO11 interrupt.

pub fn gpio10(&mut self) -> GPIO10_W

Bit 10 - GPIO10 interrupt.

pub fn gpio9(&mut self) -> GPIO9_W

Bit 9 - GPIO9 interrupt.

pub fn gpio8(&mut self) -> GPIO8_W

Bit 8 - GPIO8 interrupt.

pub fn gpio7(&mut self) -> GPIO7_W

Bit 7 - GPIO7 interrupt.

pub fn gpio6(&mut self) -> GPIO6_W

Bit 6 - GPIO6 interrupt.

pub fn gpio5(&mut self) -> GPIO5_W

Bit 5 - GPIO5 interrupt.

pub fn gpio4(&mut self) -> GPIO4_W

Bit 4 - GPIO4 interrupt.

pub fn gpio3(&mut self) -> GPIO3_W

Bit 3 - GPIO3 interrupt.

pub fn gpio2(&mut self) -> GPIO2_W

Bit 2 - GPIO2 interrupt.

pub fn gpio1(&mut self) -> GPIO1_W

Bit 1 - GPIO1 interrupt.

pub fn gpio0(&mut self) -> GPIO0_W

Bit 0 - GPIO0 interrupt.

impl W<u32, Reg<u32, _INT0STAT>>

pub fn gpio31(&mut self) -> GPIO31_W

Bit 31 - GPIO31 interrupt.

pub fn gpio30(&mut self) -> GPIO30_W

Bit 30 - GPIO30 interrupt.

pub fn gpio29(&mut self) -> GPIO29_W

Bit 29 - GPIO29 interrupt.

pub fn gpio28(&mut self) -> GPIO28_W

Bit 28 - GPIO28 interrupt.

pub fn gpio27(&mut self) -> GPIO27_W

Bit 27 - GPIO27 interrupt.

pub fn gpio26(&mut self) -> GPIO26_W

Bit 26 - GPIO26 interrupt.

pub fn gpio25(&mut self) -> GPIO25_W

Bit 25 - GPIO25 interrupt.

pub fn gpio24(&mut self) -> GPIO24_W

Bit 24 - GPIO24 interrupt.

pub fn gpio23(&mut self) -> GPIO23_W

Bit 23 - GPIO23 interrupt.

pub fn gpio22(&mut self) -> GPIO22_W

Bit 22 - GPIO22 interrupt.

pub fn gpio21(&mut self) -> GPIO21_W

Bit 21 - GPIO21 interrupt.

pub fn gpio20(&mut self) -> GPIO20_W

Bit 20 - GPIO20 interrupt.

pub fn gpio19(&mut self) -> GPIO19_W

Bit 19 - GPIO19 interrupt.

pub fn gpio18(&mut self) -> GPIO18_W

Bit 18 - GPIO18interrupt.

pub fn gpio17(&mut self) -> GPIO17_W

Bit 17 - GPIO17 interrupt.

pub fn gpio16(&mut self) -> GPIO16_W

Bit 16 - GPIO16 interrupt.

pub fn gpio15(&mut self) -> GPIO15_W

Bit 15 - GPIO15 interrupt.

pub fn gpio14(&mut self) -> GPIO14_W

Bit 14 - GPIO14 interrupt.

pub fn gpio13(&mut self) -> GPIO13_W

Bit 13 - GPIO13 interrupt.

pub fn gpio12(&mut self) -> GPIO12_W

Bit 12 - GPIO12 interrupt.

pub fn gpio11(&mut self) -> GPIO11_W

Bit 11 - GPIO11 interrupt.

pub fn gpio10(&mut self) -> GPIO10_W

Bit 10 - GPIO10 interrupt.

pub fn gpio9(&mut self) -> GPIO9_W

Bit 9 - GPIO9 interrupt.

pub fn gpio8(&mut self) -> GPIO8_W

Bit 8 - GPIO8 interrupt.

pub fn gpio7(&mut self) -> GPIO7_W

Bit 7 - GPIO7 interrupt.

pub fn gpio6(&mut self) -> GPIO6_W

Bit 6 - GPIO6 interrupt.

pub fn gpio5(&mut self) -> GPIO5_W

Bit 5 - GPIO5 interrupt.

pub fn gpio4(&mut self) -> GPIO4_W

Bit 4 - GPIO4 interrupt.

pub fn gpio3(&mut self) -> GPIO3_W

Bit 3 - GPIO3 interrupt.

pub fn gpio2(&mut self) -> GPIO2_W

Bit 2 - GPIO2 interrupt.

pub fn gpio1(&mut self) -> GPIO1_W

Bit 1 - GPIO1 interrupt.

pub fn gpio0(&mut self) -> GPIO0_W

Bit 0 - GPIO0 interrupt.

impl W<u32, Reg<u32, _INT0CLR>>

pub fn gpio31(&mut self) -> GPIO31_W

Bit 31 - GPIO31 interrupt.

pub fn gpio30(&mut self) -> GPIO30_W

Bit 30 - GPIO30 interrupt.

pub fn gpio29(&mut self) -> GPIO29_W

Bit 29 - GPIO29 interrupt.

pub fn gpio28(&mut self) -> GPIO28_W

Bit 28 - GPIO28 interrupt.

pub fn gpio27(&mut self) -> GPIO27_W

Bit 27 - GPIO27 interrupt.

pub fn gpio26(&mut self) -> GPIO26_W

Bit 26 - GPIO26 interrupt.

pub fn gpio25(&mut self) -> GPIO25_W

Bit 25 - GPIO25 interrupt.

pub fn gpio24(&mut self) -> GPIO24_W

Bit 24 - GPIO24 interrupt.

pub fn gpio23(&mut self) -> GPIO23_W

Bit 23 - GPIO23 interrupt.

pub fn gpio22(&mut self) -> GPIO22_W

Bit 22 - GPIO22 interrupt.

pub fn gpio21(&mut self) -> GPIO21_W

Bit 21 - GPIO21 interrupt.

pub fn gpio20(&mut self) -> GPIO20_W

Bit 20 - GPIO20 interrupt.

pub fn gpio19(&mut self) -> GPIO19_W

Bit 19 - GPIO19 interrupt.

pub fn gpio18(&mut self) -> GPIO18_W

Bit 18 - GPIO18interrupt.

pub fn gpio17(&mut self) -> GPIO17_W

Bit 17 - GPIO17 interrupt.

pub fn gpio16(&mut self) -> GPIO16_W

Bit 16 - GPIO16 interrupt.

pub fn gpio15(&mut self) -> GPIO15_W

Bit 15 - GPIO15 interrupt.

pub fn gpio14(&mut self) -> GPIO14_W

Bit 14 - GPIO14 interrupt.

pub fn gpio13(&mut self) -> GPIO13_W

Bit 13 - GPIO13 interrupt.

pub fn gpio12(&mut self) -> GPIO12_W

Bit 12 - GPIO12 interrupt.

pub fn gpio11(&mut self) -> GPIO11_W

Bit 11 - GPIO11 interrupt.

pub fn gpio10(&mut self) -> GPIO10_W

Bit 10 - GPIO10 interrupt.

pub fn gpio9(&mut self) -> GPIO9_W

Bit 9 - GPIO9 interrupt.

pub fn gpio8(&mut self) -> GPIO8_W

Bit 8 - GPIO8 interrupt.

pub fn gpio7(&mut self) -> GPIO7_W

Bit 7 - GPIO7 interrupt.

pub fn gpio6(&mut self) -> GPIO6_W

Bit 6 - GPIO6 interrupt.

pub fn gpio5(&mut self) -> GPIO5_W

Bit 5 - GPIO5 interrupt.

pub fn gpio4(&mut self) -> GPIO4_W

Bit 4 - GPIO4 interrupt.

pub fn gpio3(&mut self) -> GPIO3_W

Bit 3 - GPIO3 interrupt.

pub fn gpio2(&mut self) -> GPIO2_W

Bit 2 - GPIO2 interrupt.

pub fn gpio1(&mut self) -> GPIO1_W

Bit 1 - GPIO1 interrupt.

pub fn gpio0(&mut self) -> GPIO0_W

Bit 0 - GPIO0 interrupt.

impl W<u32, Reg<u32, _INT0SET>>

pub fn gpio31(&mut self) -> GPIO31_W

Bit 31 - GPIO31 interrupt.

pub fn gpio30(&mut self) -> GPIO30_W

Bit 30 - GPIO30 interrupt.

pub fn gpio29(&mut self) -> GPIO29_W

Bit 29 - GPIO29 interrupt.

pub fn gpio28(&mut self) -> GPIO28_W

Bit 28 - GPIO28 interrupt.

pub fn gpio27(&mut self) -> GPIO27_W

Bit 27 - GPIO27 interrupt.

pub fn gpio26(&mut self) -> GPIO26_W

Bit 26 - GPIO26 interrupt.

pub fn gpio25(&mut self) -> GPIO25_W

Bit 25 - GPIO25 interrupt.

pub fn gpio24(&mut self) -> GPIO24_W

Bit 24 - GPIO24 interrupt.

pub fn gpio23(&mut self) -> GPIO23_W

Bit 23 - GPIO23 interrupt.

pub fn gpio22(&mut self) -> GPIO22_W

Bit 22 - GPIO22 interrupt.

pub fn gpio21(&mut self) -> GPIO21_W

Bit 21 - GPIO21 interrupt.

pub fn gpio20(&mut self) -> GPIO20_W

Bit 20 - GPIO20 interrupt.

pub fn gpio19(&mut self) -> GPIO19_W

Bit 19 - GPIO19 interrupt.

pub fn gpio18(&mut self) -> GPIO18_W

Bit 18 - GPIO18interrupt.

pub fn gpio17(&mut self) -> GPIO17_W

Bit 17 - GPIO17 interrupt.

pub fn gpio16(&mut self) -> GPIO16_W

Bit 16 - GPIO16 interrupt.

pub fn gpio15(&mut self) -> GPIO15_W

Bit 15 - GPIO15 interrupt.

pub fn gpio14(&mut self) -> GPIO14_W

Bit 14 - GPIO14 interrupt.

pub fn gpio13(&mut self) -> GPIO13_W

Bit 13 - GPIO13 interrupt.

pub fn gpio12(&mut self) -> GPIO12_W

Bit 12 - GPIO12 interrupt.

pub fn gpio11(&mut self) -> GPIO11_W

Bit 11 - GPIO11 interrupt.

pub fn gpio10(&mut self) -> GPIO10_W

Bit 10 - GPIO10 interrupt.

pub fn gpio9(&mut self) -> GPIO9_W

Bit 9 - GPIO9 interrupt.

pub fn gpio8(&mut self) -> GPIO8_W

Bit 8 - GPIO8 interrupt.

pub fn gpio7(&mut self) -> GPIO7_W

Bit 7 - GPIO7 interrupt.

pub fn gpio6(&mut self) -> GPIO6_W

Bit 6 - GPIO6 interrupt.

pub fn gpio5(&mut self) -> GPIO5_W

Bit 5 - GPIO5 interrupt.

pub fn gpio4(&mut self) -> GPIO4_W

Bit 4 - GPIO4 interrupt.

pub fn gpio3(&mut self) -> GPIO3_W

Bit 3 - GPIO3 interrupt.

pub fn gpio2(&mut self) -> GPIO2_W

Bit 2 - GPIO2 interrupt.

pub fn gpio1(&mut self) -> GPIO1_W

Bit 1 - GPIO1 interrupt.

pub fn gpio0(&mut self) -> GPIO0_W

Bit 0 - GPIO0 interrupt.

impl W<u32, Reg<u32, _INT1EN>>

pub fn gpio49(&mut self) -> GPIO49_W

Bit 17 - GPIO49 interrupt.

pub fn gpio48(&mut self) -> GPIO48_W

Bit 16 - GPIO48 interrupt.

pub fn gpio47(&mut self) -> GPIO47_W

Bit 15 - GPIO47 interrupt.

pub fn gpio46(&mut self) -> GPIO46_W

Bit 14 - GPIO46 interrupt.

pub fn gpio45(&mut self) -> GPIO45_W

Bit 13 - GPIO45 interrupt.

pub fn gpio44(&mut self) -> GPIO44_W

Bit 12 - GPIO44 interrupt.

pub fn gpio43(&mut self) -> GPIO43_W

Bit 11 - GPIO43 interrupt.

pub fn gpio42(&mut self) -> GPIO42_W

Bit 10 - GPIO42 interrupt.

pub fn gpio41(&mut self) -> GPIO41_W

Bit 9 - GPIO41 interrupt.

pub fn gpio40(&mut self) -> GPIO40_W

Bit 8 - GPIO40 interrupt.

pub fn gpio39(&mut self) -> GPIO39_W

Bit 7 - GPIO39 interrupt.

pub fn gpio38(&mut self) -> GPIO38_W

Bit 6 - GPIO38 interrupt.

pub fn gpio37(&mut self) -> GPIO37_W

Bit 5 - GPIO37 interrupt.

pub fn gpio36(&mut self) -> GPIO36_W

Bit 4 - GPIO36 interrupt.

pub fn gpio35(&mut self) -> GPIO35_W

Bit 3 - GPIO35 interrupt.

pub fn gpio34(&mut self) -> GPIO34_W

Bit 2 - GPIO34 interrupt.

pub fn gpio33(&mut self) -> GPIO33_W

Bit 1 - GPIO33 interrupt.

pub fn gpio32(&mut self) -> GPIO32_W

Bit 0 - GPIO32 interrupt.

impl W<u32, Reg<u32, _INT1STAT>>

pub fn gpio49(&mut self) -> GPIO49_W

Bit 17 - GPIO49 interrupt.

pub fn gpio48(&mut self) -> GPIO48_W

Bit 16 - GPIO48 interrupt.

pub fn gpio47(&mut self) -> GPIO47_W

Bit 15 - GPIO47 interrupt.

pub fn gpio46(&mut self) -> GPIO46_W

Bit 14 - GPIO46 interrupt.

pub fn gpio45(&mut self) -> GPIO45_W

Bit 13 - GPIO45 interrupt.

pub fn gpio44(&mut self) -> GPIO44_W

Bit 12 - GPIO44 interrupt.

pub fn gpio43(&mut self) -> GPIO43_W

Bit 11 - GPIO43 interrupt.

pub fn gpio42(&mut self) -> GPIO42_W

Bit 10 - GPIO42 interrupt.

pub fn gpio41(&mut self) -> GPIO41_W

Bit 9 - GPIO41 interrupt.

pub fn gpio40(&mut self) -> GPIO40_W

Bit 8 - GPIO40 interrupt.

pub fn gpio39(&mut self) -> GPIO39_W

Bit 7 - GPIO39 interrupt.

pub fn gpio38(&mut self) -> GPIO38_W

Bit 6 - GPIO38 interrupt.

pub fn gpio37(&mut self) -> GPIO37_W

Bit 5 - GPIO37 interrupt.

pub fn gpio36(&mut self) -> GPIO36_W

Bit 4 - GPIO36 interrupt.

pub fn gpio35(&mut self) -> GPIO35_W

Bit 3 - GPIO35 interrupt.

pub fn gpio34(&mut self) -> GPIO34_W

Bit 2 - GPIO34 interrupt.

pub fn gpio33(&mut self) -> GPIO33_W

Bit 1 - GPIO33 interrupt.

pub fn gpio32(&mut self) -> GPIO32_W

Bit 0 - GPIO32 interrupt.

impl W<u32, Reg<u32, _INT1CLR>>

pub fn gpio49(&mut self) -> GPIO49_W

Bit 17 - GPIO49 interrupt.

pub fn gpio48(&mut self) -> GPIO48_W

Bit 16 - GPIO48 interrupt.

pub fn gpio47(&mut self) -> GPIO47_W

Bit 15 - GPIO47 interrupt.

pub fn gpio46(&mut self) -> GPIO46_W

Bit 14 - GPIO46 interrupt.

pub fn gpio45(&mut self) -> GPIO45_W

Bit 13 - GPIO45 interrupt.

pub fn gpio44(&mut self) -> GPIO44_W

Bit 12 - GPIO44 interrupt.

pub fn gpio43(&mut self) -> GPIO43_W

Bit 11 - GPIO43 interrupt.

pub fn gpio42(&mut self) -> GPIO42_W

Bit 10 - GPIO42 interrupt.

pub fn gpio41(&mut self) -> GPIO41_W

Bit 9 - GPIO41 interrupt.

pub fn gpio40(&mut self) -> GPIO40_W

Bit 8 - GPIO40 interrupt.

pub fn gpio39(&mut self) -> GPIO39_W

Bit 7 - GPIO39 interrupt.

pub fn gpio38(&mut self) -> GPIO38_W

Bit 6 - GPIO38 interrupt.

pub fn gpio37(&mut self) -> GPIO37_W

Bit 5 - GPIO37 interrupt.

pub fn gpio36(&mut self) -> GPIO36_W

Bit 4 - GPIO36 interrupt.

pub fn gpio35(&mut self) -> GPIO35_W

Bit 3 - GPIO35 interrupt.

pub fn gpio34(&mut self) -> GPIO34_W

Bit 2 - GPIO34 interrupt.

pub fn gpio33(&mut self) -> GPIO33_W

Bit 1 - GPIO33 interrupt.

pub fn gpio32(&mut self) -> GPIO32_W

Bit 0 - GPIO32 interrupt.

impl W<u32, Reg<u32, _INT1SET>>

pub fn gpio49(&mut self) -> GPIO49_W

Bit 17 - GPIO49 interrupt.

pub fn gpio48(&mut self) -> GPIO48_W

Bit 16 - GPIO48 interrupt.

pub fn gpio47(&mut self) -> GPIO47_W

Bit 15 - GPIO47 interrupt.

pub fn gpio46(&mut self) -> GPIO46_W

Bit 14 - GPIO46 interrupt.

pub fn gpio45(&mut self) -> GPIO45_W

Bit 13 - GPIO45 interrupt.

pub fn gpio44(&mut self) -> GPIO44_W

Bit 12 - GPIO44 interrupt.

pub fn gpio43(&mut self) -> GPIO43_W

Bit 11 - GPIO43 interrupt.

pub fn gpio42(&mut self) -> GPIO42_W

Bit 10 - GPIO42 interrupt.

pub fn gpio41(&mut self) -> GPIO41_W

Bit 9 - GPIO41 interrupt.

pub fn gpio40(&mut self) -> GPIO40_W

Bit 8 - GPIO40 interrupt.

pub fn gpio39(&mut self) -> GPIO39_W

Bit 7 - GPIO39 interrupt.

pub fn gpio38(&mut self) -> GPIO38_W

Bit 6 - GPIO38 interrupt.

pub fn gpio37(&mut self) -> GPIO37_W

Bit 5 - GPIO37 interrupt.

pub fn gpio36(&mut self) -> GPIO36_W

Bit 4 - GPIO36 interrupt.

pub fn gpio35(&mut self) -> GPIO35_W

Bit 3 - GPIO35 interrupt.

pub fn gpio34(&mut self) -> GPIO34_W

Bit 2 - GPIO34 interrupt.

pub fn gpio33(&mut self) -> GPIO33_W

Bit 1 - GPIO33 interrupt.

pub fn gpio32(&mut self) -> GPIO32_W

Bit 0 - GPIO32 interrupt.

impl W<u32, Reg<u32, _FIFO>>

pub fn fifo(&mut self) -> FIFO_W

Bits 0:31 - FIFO access port.

impl W<u32, Reg<u32, _FIFOPTR>>

pub fn fiforem(&mut self) -> FIFOREM_W

Bits 16:22 - The number of bytes remaining in the FIFO (i.e. 64-FIFOSIZ).

pub fn fifosiz(&mut self) -> FIFOSIZ_W

Bits 0:6 - The number of bytes currently in the FIFO.

impl W<u32, Reg<u32, _TLNGTH>>

pub fn tlngth(&mut self) -> TLNGTH_W

Bits 0:11 - Remaining transfer length.

impl W<u32, Reg<u32, _FIFOTHR>>

pub fn fifowthr(&mut self) -> FIFOWTHR_W

Bits 8:13 - FIFO write threshold.

pub fn fiforthr(&mut self) -> FIFORTHR_W

Bits 0:5 - FIFO read threshold.

impl W<u32, Reg<u32, _CLKCFG>>

pub fn totper(&mut self) -> TOTPER_W

Bits 24:31 - Clock total count minus 1.

pub fn lowper(&mut self) -> LOWPER_W

Bits 16:23 - Clock low count minus 1.

pub fn diven(&mut self) -> DIVEN_W

Bit 12 - Enable clock division by TOTPER.

pub fn div3(&mut self) -> DIV3_W

Bit 11 - Enable divide by 3.

pub fn fsel(&mut self) -> FSEL_W

Bits 8:10 - Select the input clock frequency.

impl W<u32, Reg<u32, _CMD>>

pub fn cmd(&mut self) -> CMD_W

Bits 0:31 - This register is the I/O Command.

impl W<u32, Reg<u32, _CMDRPT>>

pub fn cmdrpt(&mut self) -> CMDRPT_W

Bits 0:4 - These bits hold the Command repeat count.

impl W<u32, Reg<u32, _STATUS>>

pub fn idlest(&mut self) -> IDLEST_W

Bit 2 - This bit indicates if the I/O state machine is IDLE.

pub fn cmdact(&mut self) -> CMDACT_W

Bit 1 - This bit indicates if the I/O Command is active.

pub fn err(&mut self) -> ERR_W

Bit 0 - This bit indicates if an error interrupt has occurred.

impl W<u32, Reg<u32, _CFG>>

pub fn ifcen(&mut self) -> IFCEN_W

Bit 31 - This bit enables the IO Master.

pub fn spha(&mut self) -> SPHA_W

Bit 2 - This bit selects SPI phase.

pub fn spol(&mut self) -> SPOL_W

Bit 1 - This bit selects SPI polarity.

pub fn ifcsel(&mut self) -> IFCSEL_W

Bit 0 - This bit selects the I/O interface.

impl W<u32, Reg<u32, _INTEN>>

pub fn arb(&mut self) -> ARB_W

Bit 10 - This is the arbitration loss interrupt.

pub fn stop(&mut self) -> STOP_W

Bit 9 - This is the STOP command interrupt.

pub fn start(&mut self) -> START_W

Bit 8 - This is the START command interrupt.

pub fn icmd(&mut self) -> ICMD_W

Bit 7 - This is the illegal command interrupt.

pub fn iacc(&mut self) -> IACC_W

Bit 6 - This is the illegal FIFO access interrupt.

pub fn wtlen(&mut self) -> WTLEN_W

Bit 5 - This is the write length mismatch interrupt.

pub fn nak(&mut self) -> NAK_W

Bit 4 - This is the I2C NAK interrupt.

pub fn fovfl(&mut self) -> FOVFL_W

Bit 3 - This is the Read FIFO Overflow interrupt.

pub fn fundfl(&mut self) -> FUNDFL_W

Bit 2 - This is the Write FIFO Underflow interrupt.

pub fn thr(&mut self) -> THR_W

Bit 1 - This is the FIFO Threshold interrupt.

pub fn cmdcmp(&mut self) -> CMDCMP_W

Bit 0 - This is the Command Complete interrupt.

impl W<u32, Reg<u32, _INTSTAT>>

pub fn arb(&mut self) -> ARB_W

Bit 10 - This is the arbitration loss interrupt.

pub fn stop(&mut self) -> STOP_W

Bit 9 - This is the STOP command interrupt.

pub fn start(&mut self) -> START_W

Bit 8 - This is the START command interrupt.

pub fn icmd(&mut self) -> ICMD_W

Bit 7 - This is the illegal command interrupt.

pub fn iacc(&mut self) -> IACC_W

Bit 6 - This is the illegal FIFO access interrupt.

pub fn wtlen(&mut self) -> WTLEN_W

Bit 5 - This is the write length mismatch interrupt.

pub fn nak(&mut self) -> NAK_W

Bit 4 - This is the I2C NAK interrupt.

pub fn fovfl(&mut self) -> FOVFL_W

Bit 3 - This is the Read FIFO Overflow interrupt.

pub fn fundfl(&mut self) -> FUNDFL_W

Bit 2 - This is the Write FIFO Underflow interrupt.

pub fn thr(&mut self) -> THR_W

Bit 1 - This is the FIFO Threshold interrupt.

pub fn cmdcmp(&mut self) -> CMDCMP_W

Bit 0 - This is the Command Complete interrupt.

impl W<u32, Reg<u32, _INTCLR>>

pub fn arb(&mut self) -> ARB_W

Bit 10 - This is the arbitration loss interrupt.

pub fn stop(&mut self) -> STOP_W

Bit 9 - This is the STOP command interrupt.

pub fn start(&mut self) -> START_W

Bit 8 - This is the START command interrupt.

pub fn icmd(&mut self) -> ICMD_W

Bit 7 - This is the illegal command interrupt.

pub fn iacc(&mut self) -> IACC_W

Bit 6 - This is the illegal FIFO access interrupt.

pub fn wtlen(&mut self) -> WTLEN_W

Bit 5 - This is the write length mismatch interrupt.

pub fn nak(&mut self) -> NAK_W

Bit 4 - This is the I2C NAK interrupt.

pub fn fovfl(&mut self) -> FOVFL_W

Bit 3 - This is the Read FIFO Overflow interrupt.

pub fn fundfl(&mut self) -> FUNDFL_W

Bit 2 - This is the Write FIFO Underflow interrupt.

pub fn thr(&mut self) -> THR_W

Bit 1 - This is the FIFO Threshold interrupt.

pub fn cmdcmp(&mut self) -> CMDCMP_W

Bit 0 - This is the Command Complete interrupt.

impl W<u32, Reg<u32, _INTSET>>

pub fn arb(&mut self) -> ARB_W

Bit 10 - This is the arbitration loss interrupt.

pub fn stop(&mut self) -> STOP_W

Bit 9 - This is the STOP command interrupt.

pub fn start(&mut self) -> START_W

Bit 8 - This is the START command interrupt.

pub fn icmd(&mut self) -> ICMD_W

Bit 7 - This is the illegal command interrupt.

pub fn iacc(&mut self) -> IACC_W

Bit 6 - This is the illegal FIFO access interrupt.

pub fn wtlen(&mut self) -> WTLEN_W

Bit 5 - This is the write length mismatch interrupt.

pub fn nak(&mut self) -> NAK_W

Bit 4 - This is the I2C NAK interrupt.

pub fn fovfl(&mut self) -> FOVFL_W

Bit 3 - This is the Read FIFO Overflow interrupt.

pub fn fundfl(&mut self) -> FUNDFL_W

Bit 2 - This is the Write FIFO Underflow interrupt.

pub fn thr(&mut self) -> THR_W

Bit 1 - This is the FIFO Threshold interrupt.

pub fn cmdcmp(&mut self) -> CMDCMP_W

Bit 0 - This is the Command Complete interrupt.

impl W<u32, Reg<u32, _FIFOPTR>>

pub fn fifosiz(&mut self) -> FIFOSIZ_W

Bits 8:15 - The number of bytes currently in the hardware FIFO.

pub fn fifoptr(&mut self) -> FIFOPTR_W

Bits 0:7 - Current FIFO pointer.

impl W<u32, Reg<u32, _FIFOCFG>>

pub fn robase(&mut self) -> ROBASE_W

Bits 24:29 - Defines the read-only area. The IO Slave read-only area is situated in LRAM at (ROBASE8) to (FIFOOBASE8-1)

pub fn fifomax(&mut self) -> FIFOMAX_W

Bits 8:13 - These bits hold the maximum FIFO address in 8 byte segments. It is also the beginning of the RAM area of the LRAM. Note that no RAM area is configured if FIFOMAX is set to 0x1F.

pub fn fifobase(&mut self) -> FIFOBASE_W

Bits 0:4 - These bits hold the base address of the I/O FIFO in 8 byte segments. The IO Slave FIFO is situated in LRAM at (FIFOBASE8) to (FIFOMAX8-1).

impl W<u32, Reg<u32, _FIFOTHR>>

pub fn fifothr(&mut self) -> FIFOTHR_W

Bits 0:7 - FIFO size interrupt threshold.

impl W<u32, Reg<u32, _FUPD>>

pub fn ioread(&mut self) -> IOREAD_W

Bit 1 - This bitfield indicates an IO read is active.

pub fn fifoupd(&mut self) -> FIFOUPD_W

Bit 0 - This bit indicates that a FIFO update is underway.

impl W<u32, Reg<u32, _FIFOCTR>>

pub fn fifoctr(&mut self) -> FIFOCTR_W

Bits 0:9 - Virtual FIFO byte count

impl W<u32, Reg<u32, _FIFOINC>>

pub fn fifoinc(&mut self) -> FIFOINC_W

Bits 0:9 - Increment the Overall FIFO Counter by this value on a write

impl W<u32, Reg<u32, _CFG>>

pub fn ifcen(&mut self) -> IFCEN_W

Bit 31 - IOSLAVE interface enable.

pub fn i2caddr(&mut self) -> I2CADDR_W

Bits 8:19 - 7-bit or 10-bit I2C device address.

pub fn startrd(&mut self) -> STARTRD_W

Bit 4 - This bit holds the cycle to initiate an I/O RAM read.

pub fn lsb(&mut self) -> LSB_W

Bit 2 - This bit selects the transfer bit ordering.

pub fn spol(&mut self) -> SPOL_W

Bit 1 - This bit selects SPI polarity.

pub fn ifcsel(&mut self) -> IFCSEL_W

Bit 0 - This bit selects the I/O interface.

impl W<u32, Reg<u32, _PRENC>>

pub fn prenc(&mut self) -> PRENC_W

Bits 0:4 - These bits hold the priority encode of the REGACC interrupts.

impl W<u32, Reg<u32, _IOINTCTL>>

pub fn iointset(&mut self) -> IOINTSET_W

Bits 24:31 - These bits set the IOINT interrupts when written with a 1.

pub fn iointclr(&mut self) -> IOINTCLR_W

Bit 16 - This bit clears all of the IOINT interrupts when written with a 1.

pub fn ioint(&mut self) -> IOINT_W

Bits 8:15 - These bits read the IOINT interrupts.

pub fn iointen(&mut self) -> IOINTEN_W

Bits 0:7 - These bits setread the IOINT interrupt enables.

impl W<u32, Reg<u32, _GENADD>>

pub fn gadata(&mut self) -> GADATA_W

Bits 0:7 - The data supplied on the last General Address reference.

impl W<u32, Reg<u32, _INTEN>>

pub fn iointw(&mut self) -> IOINTW_W

Bit 5 - I2C Interrupt Write interrupt.

pub fn genad(&mut self) -> GENAD_W

Bit 4 - I2C General Address interrupt.

pub fn frderr(&mut self) -> FRDERR_W

Bit 3 - FIFO Read Error interrupt.

pub fn fundfl(&mut self) -> FUNDFL_W

Bit 2 - FIFO Underflow interrupt.

pub fn fovfl(&mut self) -> FOVFL_W

Bit 1 - FIFO Overflow interrupt.

pub fn fsize(&mut self) -> FSIZE_W

Bit 0 - FIFO Size interrupt.

impl W<u32, Reg<u32, _INTSTAT>>

pub fn iointw(&mut self) -> IOINTW_W

Bit 5 - I2C Interrupt Write interrupt.

pub fn genad(&mut self) -> GENAD_W

Bit 4 - I2C General Address interrupt.

pub fn frderr(&mut self) -> FRDERR_W

Bit 3 - FIFO Read Error interrupt.

pub fn fundfl(&mut self) -> FUNDFL_W

Bit 2 - FIFO Underflow interrupt.

pub fn fovfl(&mut self) -> FOVFL_W

Bit 1 - FIFO Overflow interrupt.

pub fn fsize(&mut self) -> FSIZE_W

Bit 0 - FIFO Size interrupt.

impl W<u32, Reg<u32, _INTCLR>>

pub fn iointw(&mut self) -> IOINTW_W

Bit 5 - I2C Interrupt Write interrupt.

pub fn genad(&mut self) -> GENAD_W

Bit 4 - I2C General Address interrupt.

pub fn frderr(&mut self) -> FRDERR_W

Bit 3 - FIFO Read Error interrupt.

pub fn fundfl(&mut self) -> FUNDFL_W

Bit 2 - FIFO Underflow interrupt.

pub fn fovfl(&mut self) -> FOVFL_W

Bit 1 - FIFO Overflow interrupt.

pub fn fsize(&mut self) -> FSIZE_W

Bit 0 - FIFO Size interrupt.

impl W<u32, Reg<u32, _INTSET>>

pub fn iointw(&mut self) -> IOINTW_W

Bit 5 - I2C Interrupt Write interrupt.

pub fn genad(&mut self) -> GENAD_W

Bit 4 - I2C General Address interrupt.

pub fn frderr(&mut self) -> FRDERR_W

Bit 3 - FIFO Read Error interrupt.

pub fn fundfl(&mut self) -> FUNDFL_W

Bit 2 - FIFO Underflow interrupt.

pub fn fovfl(&mut self) -> FOVFL_W

Bit 1 - FIFO Overflow interrupt.

pub fn fsize(&mut self) -> FSIZE_W

Bit 0 - FIFO Size interrupt.

impl W<u32, Reg<u32, _REGACCINTEN>>

pub fn regacc(&mut self) -> REGACC_W

Bits 0:31 - Register access interrupts.

impl W<u32, Reg<u32, _REGACCINTSTAT>>

pub fn regacc(&mut self) -> REGACC_W

Bits 0:31 - Register access interrupts.

impl W<u32, Reg<u32, _REGACCINTCLR>>

pub fn regacc(&mut self) -> REGACC_W

Bits 0:31 - Register access interrupts.

impl W<u32, Reg<u32, _REGACCINTSET>>

pub fn regacc(&mut self) -> REGACC_W

Bits 0:31 - Register access interrupts.

impl W<u32, Reg<u32, _CHIP_INFO>>

pub fn class(&mut self) -> CLASS_W

Bits 24:31 - Device class.

pub fn flash(&mut self) -> FLASH_W

Bits 20:23 - Device flash size.

pub fn ram(&mut self) -> RAM_W

Bits 16:19 - Device RAM size.

pub fn majorrev(&mut self) -> MAJORREV_W

Bits 12:15 - Major device revision number.

pub fn minorrev(&mut self) -> MINORREV_W

Bits 8:11 - Minor device revision number.

pub fn pkg(&mut self) -> PKG_W

Bits 6:7 - Device package type.

pub fn pins(&mut self) -> PINS_W

Bits 3:5 - Number of pins.

pub fn temp(&mut self) -> TEMP_W

Bits 1:2 - Device temperature range.

pub fn qual(&mut self) -> QUAL_W

Bit 0 - Device qualified.

impl W<u32, Reg<u32, _CHIPID0>>

pub fn value(&mut self) -> VALUE_W

Bits 0:31 - Unique chip ID 0.

impl W<u32, Reg<u32, _CHIPID1>>

pub fn value(&mut self) -> VALUE_W

Bits 0:31 - Unique chip ID 1.

impl W<u32, Reg<u32, _CHIPREV>>

pub fn revision(&mut self) -> REVISION_W

Bits 0:7 - Chip Revision Number.

impl W<u32, Reg<u32, _SUPPLYSRC>>

pub fn corebucken(&mut self) -> COREBUCKEN_W

Bit 1 - Enables and Selects the Core Buck as the supply for the low-voltage power domain.

pub fn membucken(&mut self) -> MEMBUCKEN_W

Bit 0 - Enables and select the Memory Buck as the supply for the Flash and SRAM power domain.

impl W<u32, Reg<u32, _SUPPLYSTATUS>>

pub fn corebuckon(&mut self) -> COREBUCKON_W

Bit 1 - Indicates whether the Core low-voltage domain is supplied from the LDO or the Buck.

pub fn membuckon(&mut self) -> MEMBUCKON_W

Bit 0 - Indicate whether the Memory power domain is supplied from the LDO or the Buck.

impl W<u32, Reg<u32, _BANDGAPEN>>

pub fn bgpen(&mut self) -> BGPEN_W

Bit 0 - Bandgap Enable

impl W<u32, Reg<u32, _SRAMPWDINSLEEP>>

pub fn bank7(&mut self) -> BANK7_W

Bit 7 - Force SRAM Bank 7 to powerdown in deep sleep mode, causing the contents of the bank to be lost.

pub fn bank6(&mut self) -> BANK6_W

Bit 6 - Force SRAM Bank 6 to powerdown in deep sleep mode, causing the contents of the bank to be lost.

pub fn bank5(&mut self) -> BANK5_W

Bit 5 - Force SRAM Bank 5 to powerdown in deep sleep mode, causing the contents of the bank to be lost.

pub fn bank4(&mut self) -> BANK4_W

Bit 4 - Force SRAM Bank 4 to powerdown in deep sleep mode, causing the contents of the bank to be lost.

pub fn bank3(&mut self) -> BANK3_W

Bit 3 - Force SRAM Bank 3 to powerdown in deep sleep mode, causing the contents of the bank to be lost.

pub fn bank2(&mut self) -> BANK2_W

Bit 2 - Force SRAM Bank 2 to powerdown in deep sleep mode, causing the contents of the bank to be lost.

pub fn bank1(&mut self) -> BANK1_W

Bit 1 - Force SRAM Bank 1 to powerdown in deep sleep mode, causing the contents of the bank to be lost.

pub fn bank0(&mut self) -> BANK0_W

Bit 0 - Force SRAM Bank 0 to powerdown in deep sleep mode, causing the contents of the bank to be lost.

impl W<u32, Reg<u32, _SRAMPWRDIS>>

pub fn bank7(&mut self) -> BANK7_W

Bit 7 - Remove power from SRAM Bank 7 which will cause an access to its address space to generate a Hard Fault.

pub fn bank6(&mut self) -> BANK6_W

Bit 6 - Remove power from SRAM Bank 6 which will cause an access to its address space to generate a Hard Fault.

pub fn bank5(&mut self) -> BANK5_W

Bit 5 - Remove power from SRAM Bank 5 which will cause an access to its address space to generate a Hard Fault.

pub fn bank4(&mut self) -> BANK4_W

Bit 4 - Remove power from SRAM Bank 4 which will cause an access to its address space to generate a Hard Fault.

pub fn bank3(&mut self) -> BANK3_W

Bit 3 - Remove power from SRAM Bank 3 which will cause an access to its address space to generate a Hard Fault.

pub fn bank2(&mut self) -> BANK2_W

Bit 2 - Remove power from SRAM Bank 2 which will cause an access to its address space to generate a Hard Fault.

pub fn bank1(&mut self) -> BANK1_W

Bit 1 - Remove power from SRAM Bank 1 which will cause an access to its address space to generate a Hard Fault.

pub fn bank0(&mut self) -> BANK0_W

Bit 0 - Remove power from SRAM Bank 0 which will cause an access to its address space to generate a Hard Fault.

impl W<u32, Reg<u32, _FLASHPWRDIS>>

pub fn bank1(&mut self) -> BANK1_W

Bit 1 - Remove power from Flash Bank 1 which will cause an access to its address space to generate a Hard Fault.

pub fn bank0(&mut self) -> BANK0_W

Bit 0 - Remove power from Flash Bank 0 which will cause an access to its address space to generate a Hard Fault.

impl W<u32, Reg<u32, _ICODEFAULTADDR>>

pub fn addr(&mut self) -> ADDR_W

Bits 0:31 - The ICODE bus address observed when a Bus Fault occurred. Once an address is captured in this field, it is held until the corresponding Fault Observed bit is cleared in the FAULTSTATUS register.

impl W<u32, Reg<u32, _DCODEFAULTADDR>>

pub fn addr(&mut self) -> ADDR_W

Bits 0:31 - The DCODE bus address observed when a Bus Fault occurred. Once an address is captured in this field, it is held until the corresponding Fault Observed bit is cleared in the FAULTSTATUS register.

impl W<u32, Reg<u32, _SYSFAULTADDR>>

pub fn addr(&mut self) -> ADDR_W

Bits 0:31 - SYS bus address observed when a Bus Fault occurred. Once an address is captured in this field, it is held until the corresponding Fault Observed bit is cleared in the FAULTSTATUS register.

impl W<u32, Reg<u32, _FAULTSTATUS>>

pub fn sys(&mut self) -> SYS_W

Bit 2 - SYS Bus Decoder Fault Detected bit. When set, a fault has been detected, and the SYSFAULTADDR register will contain the bus address which generated the fault.

pub fn dcode(&mut self) -> DCODE_W

Bit 1 - DCODE Bus Decoder Fault Detected bit. When set, a fault has been detected, and the DCODEFAULTADDR register will contain the bus address which generated the fault.

pub fn icode(&mut self) -> ICODE_W

Bit 0 - The ICODE Bus Decoder Fault Detected bit. When set, a fault has been detected, and the ICODEFAULTADDR register will contain the bus address which generated the fault.

impl W<u32, Reg<u32, _FAULTCAPTUREEN>>

pub fn enable(&mut self) -> ENABLE_W

Bit 0 - Fault Capture Enable field. When set, the Fault Capture monitors are enabled and addresses which generate a hard fault are captured into the FAULTADDR registers.

impl W<u32, Reg<u32, _TPIUCTRL>>

pub fn clksel(&mut self) -> CLKSEL_W

Bits 8:9 - This field selects the frequency of the ARM M4 TPIU port.

pub fn enable(&mut self) -> ENABLE_W

Bit 0 - TPIU Enable field. When set, the ARM M4 TPIU is enabled and data can be streamed out of the MCU's SWO port using the ARM ITM and TPIU modules.

impl W<u32, Reg<u32, _CFG>>

pub fn wdren(&mut self) -> WDREN_W

Bit 1 - Watchdog Timer Reset Enable. NOTE: The WDT module must also be configured for WDT reset.

pub fn bodhren(&mut self) -> BODHREN_W

Bit 0 - Brown out high (2.1v) reset enable.

impl W<u32, Reg<u32, _SWPOI>>

pub fn swpoikey(&mut self) -> SWPOIKEY_W

Bits 0:7 - 0x1B generates a software POI reset.

impl W<u32, Reg<u32, _SWPOR>>

pub fn swporkey(&mut self) -> SWPORKEY_W

Bits 0:7 - 0xD4 generates a software POR reset.

impl W<u32, Reg<u32, _STAT>>

pub fn wdrstat(&mut self) -> WDRSTAT_W

Bit 6 - Reset was initiated by a Watchdog Timer Reset.

pub fn dbgrstat(&mut self) -> DBGRSTAT_W

Bit 5 - Reset was a initiated by Debugger Reset.

pub fn poirstat(&mut self) -> POIRSTAT_W

Bit 4 - Reset was a initiated by Software POI Reset.

pub fn swrstat(&mut self) -> SWRSTAT_W

Bit 3 - Reset was a initiated by SW POR or AIRCR Reset.

pub fn borstat(&mut self) -> BORSTAT_W

Bit 2 - Reset was initiated by a Brown-Out Reset.

pub fn porstat(&mut self) -> PORSTAT_W

Bit 1 - Reset was initiated by a Power-On Reset.

pub fn exrstat(&mut self) -> EXRSTAT_W

Bit 0 - Reset was initiated by an External Reset.

impl W<u32, Reg<u32, _CLRSTAT>>

pub fn clrstat(&mut self) -> CLRSTAT_W

Bit 0 - Writing a 1 to this bit clears all bits in the RST_STAT.

impl W<u32, Reg<u32, _INTEN>>

pub fn bodh(&mut self) -> BODH_W

Bit 0 - Enables an interrupt that triggers when VCC is below BODH level.

impl W<u32, Reg<u32, _INTSTAT>>

pub fn bodh(&mut self) -> BODH_W

Bit 0 - Enables an interrupt that triggers when VCC is below BODH level.

impl W<u32, Reg<u32, _INTCLR>>

pub fn bodh(&mut self) -> BODH_W

Bit 0 - Enables an interrupt that triggers when VCC is below BODH level.

impl W<u32, Reg<u32, _INTSET>>

pub fn bodh(&mut self) -> BODH_W

Bit 0 - Enables an interrupt that triggers when VCC is below BODH level.

impl W<u32, Reg<u32, _CTRLOW>>

pub fn ctrhr(&mut self) -> CTRHR_W

Bits 24:29 - Hours Counter

pub fn ctrmin(&mut self) -> CTRMIN_W

Bits 16:22 - Minutes Counter

pub fn ctrsec(&mut self) -> CTRSEC_W

Bits 8:14 - Seconds Counter

pub fn ctr100(&mut self) -> CTR100_W

Bits 0:7 - 100ths of a second Counter

impl W<u32, Reg<u32, _CTRUP>>

pub fn cterr(&mut self) -> CTERR_W

Bit 31 - Counter read error status

pub fn ceb(&mut self) -> CEB_W

Bit 28 - Century enable

pub fn cb(&mut self) -> CB_W

Bit 27 - Century

pub fn ctrwkdy(&mut self) -> CTRWKDY_W

Bits 24:26 - Weekdays Counter

pub fn ctryr(&mut self) -> CTRYR_W

Bits 16:23 - Years Counter

pub fn ctrmo(&mut self) -> CTRMO_W

Bits 8:12 - Months Counter

pub fn ctrdate(&mut self) -> CTRDATE_W

Bits 0:5 - Date Counter

impl W<u32, Reg<u32, _ALMLOW>>

pub fn almhr(&mut self) -> ALMHR_W

Bits 24:29 - Hours Alarm

pub fn almmin(&mut self) -> ALMMIN_W

Bits 16:22 - Minutes Alarm

pub fn almsec(&mut self) -> ALMSEC_W

Bits 8:14 - Seconds Alarm

pub fn alm100(&mut self) -> ALM100_W

Bits 0:7 - 100ths of a second Alarm

impl W<u32, Reg<u32, _ALMUP>>

pub fn almwkdy(&mut self) -> ALMWKDY_W

Bits 16:18 - Weekdays Alarm

pub fn almmo(&mut self) -> ALMMO_W

Bits 8:12 - Months Alarm

pub fn almdate(&mut self) -> ALMDATE_W

Bits 0:5 - Date Alarm

impl W<u32, Reg<u32, _RTCCTL>>

pub fn hr1224(&mut self) -> HR1224_W

Bit 5 - Hours Counter mode

pub fn rstop(&mut self) -> RSTOP_W

Bit 4 - RTC input clock control

pub fn rpt(&mut self) -> RPT_W

Bits 1:3 - Alarm repeat interval

pub fn wrtc(&mut self) -> WRTC_W

Bit 0 - Counter write control

impl W<u32, Reg<u32, _INTEN>>

pub fn alm(&mut self) -> ALM_W

Bit 3 - RTC Alarm interrupt

pub fn of(&mut self) -> OF_W

Bit 2 - XT Oscillator Fail interrupt

pub fn acc(&mut self) -> ACC_W

Bit 1 - Autocalibration Complete interrupt

pub fn acf(&mut self) -> ACF_W

Bit 0 - Autocalibration Fail interrupt

impl W<u32, Reg<u32, _INTSTAT>>

pub fn alm(&mut self) -> ALM_W

Bit 3 - RTC Alarm interrupt

pub fn of(&mut self) -> OF_W

Bit 2 - XT Oscillator Fail interrupt

pub fn acc(&mut self) -> ACC_W

Bit 1 - Autocalibration Complete interrupt

pub fn acf(&mut self) -> ACF_W

Bit 0 - Autocalibration Fail interrupt

impl W<u32, Reg<u32, _INTCLR>>

pub fn alm(&mut self) -> ALM_W

Bit 3 - RTC Alarm interrupt

pub fn of(&mut self) -> OF_W

Bit 2 - XT Oscillator Fail interrupt

pub fn acc(&mut self) -> ACC_W

Bit 1 - Autocalibration Complete interrupt

pub fn acf(&mut self) -> ACF_W

Bit 0 - Autocalibration Fail interrupt

impl W<u32, Reg<u32, _INTSET>>

pub fn alm(&mut self) -> ALM_W

Bit 3 - RTC Alarm interrupt

pub fn of(&mut self) -> OF_W

Bit 2 - XT Oscillator Fail interrupt

pub fn acc(&mut self) -> ACC_W

Bit 1 - Autocalibration Complete interrupt

pub fn acf(&mut self) -> ACF_W

Bit 0 - Autocalibration Fail interrupt

impl W<u32, Reg<u32, _DR>>

pub fn oedata(&mut self) -> OEDATA_W

Bit 11 - This is the overrun error indicator.

pub fn bedata(&mut self) -> BEDATA_W

Bit 10 - This is the break error indicator.

pub fn pedata(&mut self) -> PEDATA_W

Bit 9 - This is the parity error indicator.

pub fn fedata(&mut self) -> FEDATA_W

Bit 8 - This is the framing error indicator.

pub fn data(&mut self) -> DATA_W

Bits 0:7 - This is the UART data port.

impl W<u32, Reg<u32, _RSR>>

pub fn oestat(&mut self) -> OESTAT_W

Bit 3 - This is the overrun error indicator.

pub fn bestat(&mut self) -> BESTAT_W

Bit 2 - This is the break error indicator.

pub fn pestat(&mut self) -> PESTAT_W

Bit 1 - This is the parity error indicator.

pub fn festat(&mut self) -> FESTAT_W

Bit 0 - This is the framing error indicator.

impl W<u32, Reg<u32, _FR>>

pub fn ri(&mut self) -> RI_W

Bit 8 - This bit holds the ring indicator.

pub fn txfe(&mut self) -> TXFE_W

Bit 7 - This bit holds the transmit FIFO empty indicator.

pub fn rxff(&mut self) -> RXFF_W

Bit 6 - This bit holds the receive FIFO full indicator.

pub fn txff(&mut self) -> TXFF_W

Bit 5 - This bit holds the transmit FIFO full indicator.

pub fn rxfe(&mut self) -> RXFE_W

Bit 4 - This bit holds the receive FIFO empty indicator.

pub fn busy(&mut self) -> BUSY_W

Bit 3 - This bit holds the busy indicator.

pub fn dcd(&mut self) -> DCD_W

Bit 2 - This bit holds the data carrier detect indicator.

pub fn dsr(&mut self) -> DSR_W

Bit 1 - This bit holds the data set ready indicator.

pub fn cts(&mut self) -> CTS_W

Bit 0 - This bit holds the clear to send indicator.

impl W<u32, Reg<u32, _ILPR>>

pub fn ilpdvsr(&mut self) -> ILPDVSR_W

Bits 0:7 - These bits hold the IrDA counter divisor.

impl W<u32, Reg<u32, _IBRD>>

pub fn divint(&mut self) -> DIVINT_W

Bits 0:15 - These bits hold the baud integer divisor.

impl W<u32, Reg<u32, _FBRD>>

pub fn divfrac(&mut self) -> DIVFRAC_W

Bits 0:5 - These bits hold the baud fractional divisor.

impl W<u32, Reg<u32, _LCRH>>

pub fn sps(&mut self) -> SPS_W

Bit 7 - This bit holds the stick parity select.

pub fn wlen(&mut self) -> WLEN_W

Bits 5:6 - These bits hold the write length.

pub fn fen(&mut self) -> FEN_W

Bit 4 - This bit holds the FIFO enable.

pub fn stp2(&mut self) -> STP2_W

Bit 3 - This bit holds the two stop bits select.

pub fn eps(&mut self) -> EPS_W

Bit 2 - This bit holds the even parity select.

pub fn pen(&mut self) -> PEN_W

Bit 1 - This bit holds the parity enable.

pub fn brk(&mut self) -> BRK_W

Bit 0 - This bit holds the break set.

impl W<u32, Reg<u32, _CR>>

pub fn ctsen(&mut self) -> CTSEN_W

Bit 15 - This bit enables CTS hardware flow control.

pub fn rtsen(&mut self) -> RTSEN_W

Bit 14 - This bit enables RTS hardware flow control.

pub fn out2(&mut self) -> OUT2_W

Bit 13 - This bit holds modem Out2.

pub fn out1(&mut self) -> OUT1_W

Bit 12 - This bit holds modem Out1.

pub fn rts(&mut self) -> RTS_W

Bit 11 - This bit enables request to send.

pub fn dtr(&mut self) -> DTR_W

Bit 10 - This bit enables data transmit ready.

pub fn rxe(&mut self) -> RXE_W

Bit 9 - This bit is the receive enable.

pub fn txe(&mut self) -> TXE_W

Bit 8 - This bit is the transmit enable.

pub fn lbe(&mut self) -> LBE_W

Bit 7 - This bit is the loopback enable.

pub fn clksel(&mut self) -> CLKSEL_W

Bits 4:6 - This bitfield is the UART clock select.

pub fn clken(&mut self) -> CLKEN_W

Bit 3 - This bit is the UART clock enable.

pub fn sirlp(&mut self) -> SIRLP_W

Bit 2 - This bit is the SIR low power select.

pub fn siren(&mut self) -> SIREN_W

Bit 1 - This bit is the SIR ENDEC enable.

pub fn uarten(&mut self) -> UARTEN_W

Bit 0 - This bit is the UART enable.

impl W<u32, Reg<u32, _IFLS>>

pub fn rxiflsel(&mut self) -> RXIFLSEL_W

Bits 3:5 - These bits hold the receive FIFO interrupt level.

pub fn txiflsel(&mut self) -> TXIFLSEL_W

Bits 0:2 - These bits hold the transmit FIFO interrupt level.

impl W<u32, Reg<u32, _IER>>

pub fn oeim(&mut self) -> OEIM_W

Bit 10 - This bit holds the overflow interrupt enable.

pub fn beim(&mut self) -> BEIM_W

Bit 9 - This bit holds the break error interrupt enable.

pub fn peim(&mut self) -> PEIM_W

Bit 8 - This bit holds the parity error interrupt enable.

pub fn feim(&mut self) -> FEIM_W

Bit 7 - This bit holds the framing error interrupt enable.

pub fn rtim(&mut self) -> RTIM_W

Bit 6 - This bit holds the receive timeout interrupt enable.

pub fn txim(&mut self) -> TXIM_W

Bit 5 - This bit holds the transmit interrupt enable.

pub fn rxim(&mut self) -> RXIM_W

Bit 4 - This bit holds the receive interrupt enable.

pub fn dsrmim(&mut self) -> DSRMIM_W

Bit 3 - This bit holds the modem DSR interrupt enable.

pub fn dcdmim(&mut self) -> DCDMIM_W

Bit 2 - This bit holds the modem DCD interrupt enable.

pub fn ctsmim(&mut self) -> CTSMIM_W

Bit 1 - This bit holds the modem CTS interrupt enable.

pub fn rimim(&mut self) -> RIMIM_W

Bit 0 - This bit holds the modem RI interrupt enable.

impl W<u32, Reg<u32, _IES>>

pub fn oeris(&mut self) -> OERIS_W

Bit 10 - This bit holds the overflow interrupt status.

pub fn beris(&mut self) -> BERIS_W

Bit 9 - This bit holds the break error interrupt status.

pub fn peris(&mut self) -> PERIS_W

Bit 8 - This bit holds the parity error interrupt status.

pub fn feris(&mut self) -> FERIS_W

Bit 7 - This bit holds the framing error interrupt status.

pub fn rtris(&mut self) -> RTRIS_W

Bit 6 - This bit holds the receive timeout interrupt status.

pub fn txris(&mut self) -> TXRIS_W

Bit 5 - This bit holds the transmit interrupt status.

pub fn rxris(&mut self) -> RXRIS_W

Bit 4 - This bit holds the receive interrupt status.

pub fn dsrmris(&mut self) -> DSRMRIS_W

Bit 3 - This bit holds the modem DSR interrupt status.

pub fn dcdmris(&mut self) -> DCDMRIS_W

Bit 2 - This bit holds the modem DCD interrupt status.

pub fn ctsmris(&mut self) -> CTSMRIS_W

Bit 1 - This bit holds the modem CTS interrupt status.

pub fn rimris(&mut self) -> RIMRIS_W

Bit 0 - This bit holds the modem RI interrupt status.

impl W<u32, Reg<u32, _MIS>>

pub fn oemis(&mut self) -> OEMIS_W

Bit 10 - This bit holds the overflow interrupt status masked.

pub fn bemis(&mut self) -> BEMIS_W

Bit 9 - This bit holds the break error interrupt status masked.

pub fn pemis(&mut self) -> PEMIS_W

Bit 8 - This bit holds the parity error interrupt status masked.

pub fn femis(&mut self) -> FEMIS_W

Bit 7 - This bit holds the framing error interrupt status masked.

pub fn rtmis(&mut self) -> RTMIS_W

Bit 6 - This bit holds the receive timeout interrupt status masked.

pub fn txmis(&mut self) -> TXMIS_W

Bit 5 - This bit holds the transmit interrupt status masked.

pub fn rxmis(&mut self) -> RXMIS_W

Bit 4 - This bit holds the receive interrupt status masked.

pub fn dsrmmis(&mut self) -> DSRMMIS_W

Bit 3 - This bit holds the modem DSR interrupt status masked.

pub fn dcdmmis(&mut self) -> DCDMMIS_W

Bit 2 - This bit holds the modem DCD interrupt status masked.

pub fn ctsmmis(&mut self) -> CTSMMIS_W

Bit 1 - This bit holds the modem CTS interrupt status masked.

pub fn rimmis(&mut self) -> RIMMIS_W

Bit 0 - This bit holds the modem RI interrupt status masked.

impl W<u32, Reg<u32, _IEC>>

pub fn oeic(&mut self) -> OEIC_W

Bit 10 - This bit holds the overflow interrupt clear.

pub fn beic(&mut self) -> BEIC_W

Bit 9 - This bit holds the break error interrupt clear.

pub fn peic(&mut self) -> PEIC_W

Bit 8 - This bit holds the parity error interrupt clear.

pub fn feic(&mut self) -> FEIC_W

Bit 7 - This bit holds the framing error interrupt clear.

pub fn rtic(&mut self) -> RTIC_W

Bit 6 - This bit holds the receive timeout interrupt clear.

pub fn txic(&mut self) -> TXIC_W

Bit 5 - This bit holds the transmit interrupt clear.

pub fn rxic(&mut self) -> RXIC_W

Bit 4 - This bit holds the receive interrupt clear.

pub fn dsrmic(&mut self) -> DSRMIC_W

Bit 3 - This bit holds the modem DSR interrupt clear.

pub fn dcdmic(&mut self) -> DCDMIC_W

Bit 2 - This bit holds the modem DCD interrupt clear.

pub fn ctsmic(&mut self) -> CTSMIC_W

Bit 1 - This bit holds the modem CTS interrupt clear.

pub fn rimic(&mut self) -> RIMIC_W

Bit 0 - This bit holds the modem RI interrupt clear.

impl W<u32, Reg<u32, _CFG>>

pub fn lvlsel(&mut self) -> LVLSEL_W

Bits 16:19 - When the reference input NSEL is set to NSEL_DAC, this bitfield selects the voltage level for the negative input to the comparator.

pub fn nsel(&mut self) -> NSEL_W

Bits 8:9 - This bitfield selects the negative input to the comparator.

pub fn psel(&mut self) -> PSEL_W

Bits 0:1 - This bitfield selects the positive input to the comparator.

impl W<u32, Reg<u32, _STAT>>

pub fn pwdstat(&mut self) -> PWDSTAT_W

Bit 1 - This bit indicates the power down state of the voltage comparator.

pub fn cmpout(&mut self) -> CMPOUT_W

Bit 0 - This bit is 1 if the positive input of the comparator is greater than the negative input.

impl W<u32, Reg<u32, _PWDKEY>>

pub fn pwdkey(&mut self) -> PWDKEY_W

Bits 0:31 - Key register value.

impl W<u32, Reg<u32, _INTEN>>

pub fn outhi(&mut self) -> OUTHI_W

Bit 1 - This bit is the vcompout high interrupt.

pub fn outlow(&mut self) -> OUTLOW_W

Bit 0 - This bit is the vcompout low interrupt.

impl W<u32, Reg<u32, _INTSTAT>>

pub fn outhi(&mut self) -> OUTHI_W

Bit 1 - This bit is the vcompout high interrupt.

pub fn outlow(&mut self) -> OUTLOW_W

Bit 0 - This bit is the vcompout low interrupt.

impl W<u32, Reg<u32, _INTCLR>>

pub fn outhi(&mut self) -> OUTHI_W

Bit 1 - This bit is the vcompout high interrupt.

pub fn outlow(&mut self) -> OUTLOW_W

Bit 0 - This bit is the vcompout low interrupt.

impl W<u32, Reg<u32, _INTSET>>

pub fn outhi(&mut self) -> OUTHI_W

Bit 1 - This bit is the vcompout high interrupt.

pub fn outlow(&mut self) -> OUTLOW_W

Bit 0 - This bit is the vcompout low interrupt.

impl W<u32, Reg<u32, _CFG>>

pub fn intval(&mut self) -> INTVAL_W

Bits 16:23 - This bitfield is the compare value for counter bits 7:0 to generate a watchdog interrupt.

pub fn resval(&mut self) -> RESVAL_W

Bits 8:15 - This bitfield is the compare value for counter bits 7:0 to generate a watchdog reset.

pub fn resen(&mut self) -> RESEN_W

Bit 2 - This bitfield enables the WDT reset.

pub fn inten(&mut self) -> INTEN_W

Bit 1 - This bitfield enables the WDT interrupt. Note : This bit must be set before the interrupt status bit will reflect a watchdog timer expiration. The IER interrupt register must also be enabled for a WDT interrupt to be sent to the NVIC.

pub fn wdten(&mut self) -> WDTEN_W

Bit 0 - This bitfield enables the WDT.

impl W<u32, Reg<u32, _RSTRT>>

pub fn rstrt(&mut self) -> RSTRT_W

Bits 0:7 - Writing 0xB2 to WDTRSTRT restarts the watchdog timer.

impl W<u32, Reg<u32, _LOCK>>

pub fn lock(&mut self) -> LOCK_W

Bits 0:7 - Writing 0x3A locks the watchdog timer. Once locked, the WDTCFG reg cannot be written and WDTEN is set.

impl W<u32, Reg<u32, _INTEN>>

pub fn wdtint(&mut self) -> WDTINT_W

Bit 0 - Watchdog Timer Interrupt.

impl W<u32, Reg<u32, _INTSTAT>>

pub fn wdtint(&mut self) -> WDTINT_W

Bit 0 - Watchdog Timer Interrupt.

impl W<u32, Reg<u32, _INTCLR>>

pub fn wdtint(&mut self) -> WDTINT_W

Bit 0 - Watchdog Timer Interrupt.

impl W<u32, Reg<u32, _INTSET>>

pub fn wdtint(&mut self) -> WDTINT_W

Bit 0 - Watchdog Timer Interrupt.