[−][src]Struct ambiq_apollo1_pac::adc::cfg::LPMODE_W

pub struct LPMODE_W<'a> { /* fields omitted */ }

Write proxy for field LPMODE

Methods

impl<'a> LPMODE_W<'a>[src]

pub fn variant(self, variant: LPMODE_A) -> &'a mut W[src]

Writes variant to the field

pub fn mode0(self) -> &'a mut W[src]

Low Power Mode 0 (2'b00). Leaves the ADC fully powered between scans with no latency between a trigger event and sample data collection.

pub fn mode1(self) -> &'a mut W[src]

Low Power Mode 1 (2'b01). Enables a low power mode for the ADC between scans requiring 50us initialization time (latency) between a trigger event and the scan (assuming the HFRC remains running and the MCU is not in deepsleep mode in which case additional startup latency for HFRC startup is required).

pub fn mode2(self) -> &'a mut W[src]

Low Power Mode 2 (2'b10). Disconnects power and clocks to the ADC effectively eliminating all active power associated with the ADC between scans. This mode requires 150us initialization (again, assuming the HFRC remains running and the MCU is not in deepsleep mode in which case additional startup latency for HFRC startup is required).

pub fn mode_undefined(self) -> &'a mut W[src]

Undefined Mode (2'b11)

pub fn bits(self, value: u8) -> &'a mut W[src]

Writes raw bits to the field

Auto Trait Implementations

impl<'a> Send for LPMODE_W<'a>

impl<'a> !Sync for LPMODE_W<'a>

impl<'a> Unpin for LPMODE_W<'a>

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized, [src]

impl<T> Borrow<T> for T where
    T: ?Sized, [src]

impl<T> BorrowMut<T> for T where
    T: ?Sized, [src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, [src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, [src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.