Struct ambiq_apollo1_pac::clkgen::clkout::CKSEL_W

pub struct CKSEL_W<'a> { /* fields omitted */ }

Write proxy for field CKSEL

Methods

impl<'a> CKSEL_W<'a>

pub fn variant(self, variant: CKSEL_A) -> &'a mut W

Writes variant to the field

pub fn lfrc(self) -> &'a mut W

LFRC

pub fn xt_div2(self) -> &'a mut W

XT / 2

pub fn xt_div4(self) -> &'a mut W

XT / 4

pub fn xt_div8(self) -> &'a mut W

XT / 8

pub fn xt_div16(self) -> &'a mut W

XT / 16

pub fn xt_div32(self) -> &'a mut W

XT / 32

pub fn rtc_1hz(self) -> &'a mut W

1 Hz as selected in RTC

pub fn xt_div2m(self) -> &'a mut W

XT / 2^21

pub fn xt(self) -> &'a mut W

XT

pub fn cg_100hz(self) -> &'a mut W

100 Hz as selected in CLKGEN

pub fn hfrc(self) -> &'a mut W

HFRC

pub fn hfrc_div2(self) -> &'a mut W

HFRC / 2

pub fn hfrc_div4(self) -> &'a mut W

HFRC / 4

pub fn hfrc_div8(self) -> &'a mut W

HFRC / 8

pub fn hfrc_div32(self) -> &'a mut W

HFRC / 32

pub fn hfrc_div64(self) -> &'a mut W

HFRC / 64

pub fn hfrc_div128(self) -> &'a mut W

HFRC / 128

pub fn hfrc_div256(self) -> &'a mut W

HFRC / 256

pub fn flash_clk(self) -> &'a mut W

Flash Clock

pub fn lfrc_div2(self) -> &'a mut W

LFRC / 2

pub fn lfrc_div32(self) -> &'a mut W

LFRC / 32

pub fn lfrc_div512(self) -> &'a mut W

LFRC / 512

pub fn lfrc_div32k(self) -> &'a mut W

LFRC / 32768

pub fn xt_div256(self) -> &'a mut W

XT / 256

pub fn xt_div8k(self) -> &'a mut W

XT / 8192

pub fn xt_div64k(self) -> &'a mut W

XT / 2^16

pub fn ulfrc_div16(self) -> &'a mut W

Uncal LFRC / 16

pub fn ulfrc_div128(self) -> &'a mut W

Uncal LFRC / 128

pub fn ulfrc_1hz(self) -> &'a mut W

Uncal LFRC / 1024

pub fn ulfrc_div4k(self) -> &'a mut W

Uncal LFRC / 4096

pub fn ulfrc_div1m(self) -> &'a mut W

Uncal LFRC / 2^20

pub fn hfrc_div64k(self) -> &'a mut W

HFRC / 2^16

pub fn hfrc_div16m(self) -> &'a mut W

HFRC / 2^24

pub fn lfrc_div2m(self) -> &'a mut W

LFRC / 2^20

pub fn hfrcne(self) -> &'a mut W

HFRC (not autoenabled)

pub fn hfrcne_div8(self) -> &'a mut W

HFRC / 8 (not autoenabled)

pub fn xtne(self) -> &'a mut W

XT (not autoenabled)

pub fn xtne_div16(self) -> &'a mut W

XT / 16 (not autoenabled)

pub fn lfrcne_div32(self) -> &'a mut W

LFRC / 32 (not autoenabled)

pub fn lfrcne(self) -> &'a mut W

LFRC (not autoenabled) - Default for undefined values

pub unsafe fn bits(self, value: u8) -> &'a mut W

Writes raw bits to the field