Crate zynq7000

Crate zynq7000 

Source
Expand description

§Rust peripheral acess crate to the AMD Zynq 7000 SoCs

This crate provides a low-level register access API building on the derive-mmio crate. However, its structure is similar to the crates auto-generated by svd2rust.

This crate is purposely kept low-level to allow building higher level abstractions like HALs on top of it. The Zynq7000 HAL library contains such a HAL which builds on this PAC.

Modules§

ddrc
devcfg
eth
Gigabit Ethernet Module (GEM) register module.
gic
GIC (Generic Interrupt Controller) register module.
gpio
GPIO register module.
gtc
Global timer counter module.
i2c
SPI register module.
l2_cache
mpcore
Application Processing Unit Registers (mpcore)
priv_tim
CPU private timer module.
qspi
slcr
System Level Control Registers (slcr)
spi
SPI register module.
ttc
Triple-timer counter (TTC) register module.
uart
PS UART register module.
xadc

Structs§

Peripherals
This is a collection of processing system peripherals.

Enums§

SpiClockPhase
SpiClockPolarity

Constants§

MPCORE_BASE_ADDR