Struct yaxpeax_x86::real_mode::InstDecoder [−][src]
pub struct InstDecoder { /* fields omitted */ }
Expand description
an x86
instruction decoder.
fundamentally this is one or two primitives with no additional state kept during decoding. it
can be copied cheaply, hashed cheaply, compared cheaply. if you really want to share an
InstDecoder
between threads, you could - but you might want to clone it instead.
unless you’re using an Arc<Mutex<InstDecoder>>
, which is fine but i’d be very curious about
the design requiring that.
Implementations
instantiates an x86 decoder that decodes the bare minimum of real-mode x86.
pedantic and only decodes what the spec says is well-defined, rejecting undefined sequences and any instructions defined by extensions.
helper to decode an instruction directly from a byte slice.
this lets callers avoid the work of setting up a yaxpeax_arch::U8Reader
for the slice
to decode.
bmi2
indicates support for the BZHI
, MULX
, PDEP
, PEXT
, RORX
, SARX
, SHRX
,
and SHLX
instructions. bmi2
is implemented in all x86 chips that implement bmi
,
except the amd piledriver
and steamroller
microarchitectures.
enable all avx512
features on this InstDecoder
. no real CPU, at time of writing,
actually has such a feature comination, but this is a useful overestimate for avx512
generally.
lahfsahf
is only unset for early revisions of 64-bit amd and intel chips. unfortunately
the clearest documentation on when these instructions were reintroduced into 64-bit
architectures seems to be
wikipedia:
Early AMD64 and Intel 64 CPUs lacked LAHF and SAHF instructions in 64-bit mode. AMD introduced these instructions (also in 64-bit mode) with their Athlon 64, Opteron and Turion 64 revision D processors in March 2005[48][49][50] while Intel introduced the instructions with the Pentium 4 G1 stepping in December 2005. The 64-bit version of Windows 8.1 requires this feature.[47]
this puts reintroduction of these instructions somewhere in the middle of prescott and k8 lifecycles, for intel and amd respectively. because there is no specific uarch where these features become enabled, prescott and k8 default to not supporting these instructions, where later uarches support these instructions.
Trait Implementations
decode one instruction for this architecture from the yaxpeax_arch::Reader
of this
architecture’s Word
. Read more
decode one instruction for this architecture from the yaxpeax_arch::Reader
of this
architecture’s Word
, writing into the provided inst
. Read more
This method tests for self
and other
values to be equal, and is used
by ==
. Read more
This method tests for !=
.
This method returns an ordering between self
and other
values if one exists. Read more
This method tests less than (for self
and other
) and is used by the <
operator. Read more
This method tests less than or equal to (for self
and other
) and is used by the <=
operator. Read more
This method tests greater than (for self
and other
) and is used by the >
operator. Read more
Auto Trait Implementations
impl RefUnwindSafe for InstDecoder
impl Send for InstDecoder
impl Sync for InstDecoder
impl Unpin for InstDecoder
impl UnwindSafe for InstDecoder
Blanket Implementations
Mutably borrows from an owned value. Read more