Struct xmc4100::scu_clk::RegisterBlock
source · #[repr(C)]pub struct RegisterBlock {Show 22 fields
pub clkstat: CLKSTAT,
pub clkset: CLKSET,
pub clkclr: CLKCLR,
pub sysclkcr: SYSCLKCR,
pub cpuclkcr: CPUCLKCR,
pub pbclkcr: PBCLKCR,
pub usbclkcr: USBCLKCR,
pub ccuclkcr: CCUCLKCR,
pub wdtclkcr: WDTCLKCR,
pub extclkcr: EXTCLKCR,
pub mlinkclkcr: MLINKCLKCR,
pub sleepcr: SLEEPCR,
pub dsleepcr: DSLEEPCR,
pub cgatstat0: CGATSTAT0,
pub cgatset0: CGATSET0,
pub cgatclr0: CGATCLR0,
pub cgatstat1: CGATSTAT1,
pub cgatset1: CGATSET1,
pub cgatclr1: CGATCLR1,
pub cgatstat2: CGATSTAT2,
pub cgatset2: CGATSET2,
pub cgatclr2: CGATCLR2,
/* private fields */
}Expand description
Register block
Fields
clkstat: CLKSTAT0x00 - Clock Status Register
clkset: CLKSET0x04 - CLK Set Register
clkclr: CLKCLR0x08 - CLK Clear Register
sysclkcr: SYSCLKCR0x0c - System Clock Control Register
cpuclkcr: CPUCLKCR0x10 - CPU Clock Control Register
pbclkcr: PBCLKCR0x14 - Peripheral Bus Clock Control Register
usbclkcr: USBCLKCR0x18 - USB Clock Control Register
ccuclkcr: CCUCLKCR0x20 - CCU Clock Control Register
wdtclkcr: WDTCLKCR0x24 - WDT Clock Control Register
extclkcr: EXTCLKCR0x28 - External Clock Control
mlinkclkcr: MLINKCLKCR0x2c - Multi-Link Clock Control
sleepcr: SLEEPCR0x30 - Sleep Control Register
dsleepcr: DSLEEPCR0x34 - Deep Sleep Control Register
cgatstat0: CGATSTAT00x40 - Peripheral 0 Clock Gating Status
cgatset0: CGATSET00x44 - Peripheral 0 Clock Gating Set
cgatclr0: CGATCLR00x48 - Peripheral 0 Clock Gating Clear
cgatstat1: CGATSTAT10x4c - Peripheral 1 Clock Gating Status
cgatset1: CGATSET10x50 - Peripheral 1 Clock Gating Set
cgatclr1: CGATCLR10x54 - Peripheral 1 Clock Gating Clear
cgatstat2: CGATSTAT20x58 - Peripheral 2 Clock Gating Status
cgatset2: CGATSET20x5c - Peripheral 2 Clock Gating Set
cgatclr2: CGATCLR20x60 - Peripheral 2 Clock Gating Clear