Struct xmc1000::usic0_ch0::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub ccfg: CCFG,
    pub kscfg: KSCFG,
    pub fdr: FDR,
    pub brg: BRG,
    pub inpr: INPR,
    pub dx0cr: DX0CR,
    pub dx1cr: DX1CR,
    pub dx2cr: DX2CR,
    pub dx3cr: DX3CR,
    pub dx4cr: DX4CR,
    pub dx5cr: DX5CR,
    pub sctr: SCTR,
    pub tcsr: TCSR,
    pub pcr: PCR,
    pub ccr: CCR,
    pub cmtr: CMTR,
    pub psr: PSR,
    pub pscr: PSCR,
    pub rbufsr: RBUFSR,
    pub rbuf: RBUF,
    pub rbufd: RBUFD,
    pub rbuf0: RBUF0,
    pub rbuf1: RBUF1,
    pub rbuf01sr: RBUF01SR,
    pub fmr: FMR,
    pub tbuf: [TBUF; 32],
    pub byp: BYP,
    pub bypcr: BYPCR,
    pub tbctr: TBCTR,
    pub rbctr: RBCTR,
    pub trbptr: TRBPTR,
    pub trbsr: TRBSR,
    pub trbscr: TRBSCR,
    pub outr: OUTR,
    pub outdr: OUTDR,
    pub in_: [IN; 32],
    // some fields omitted
}

Register block

Fields

ccfg: CCFG

0x04 - Channel Configuration Register

kscfg: KSCFG

0x0c - Kernel State Configuration Register

fdr: FDR

0x10 - Fractional Divider Register

brg: BRG

0x14 - Baud Rate Generator Register

inpr: INPR

0x18 - Interrupt Node Pointer Register

dx0cr: DX0CR

0x1c - Input Control Register 0

dx1cr: DX1CR

0x20 - Input Control Register 1

dx2cr: DX2CR

0x24 - Input Control Register 2

dx3cr: DX3CR

0x28 - Input Control Register 3

dx4cr: DX4CR

0x2c - Input Control Register 4

dx5cr: DX5CR

0x30 - Input Control Register 5

sctr: SCTR

0x34 - Shift Control Register

tcsr: TCSR

0x38 - Transmit Control/Status Register

pcr: PCR

0x3c - Protocol Control Register

ccr: CCR

0x40 - Channel Control Register

cmtr: CMTR

0x44 - Capture Mode Timer Register

psr: PSR

0x48 - Protocol Status Register

pscr: PSCR

0x4c - Protocol Status Clear Register

rbufsr: RBUFSR

0x50 - Receiver Buffer Status Register

rbuf: RBUF

0x54 - Receiver Buffer Register

rbufd: RBUFD

0x58 - Receiver Buffer Register for Debugger

rbuf0: RBUF0

0x5c - Receiver Buffer Register 0

rbuf1: RBUF1

0x60 - Receiver Buffer Register 1

rbuf01sr: RBUF01SR

0x64 - Receiver Buffer 01 Status Register

fmr: FMR

0x68 - Flag Modification Register

tbuf: [TBUF; 32]

0x80 - Transmit Buffer

byp: BYP

0x100 - Bypass Data Register

bypcr: BYPCR

0x104 - Bypass Control Register

tbctr: TBCTR

0x108 - Transmitter Buffer Control Register

rbctr: RBCTR

0x10c - Receiver Buffer Control Register

trbptr: TRBPTR

0x110 - Transmit/Receive Buffer Pointer Register

trbsr: TRBSR

0x114 - Transmit/Receive Buffer Status Register

trbscr: TRBSCR

0x118 - Transmit/Receive Buffer Status Clear Register

outr: OUTR

0x11c - Receiver Buffer Output Register

outdr: OUTDR

0x120 - Receiver Buffer Output Register L for Debugger

in_: [IN; 32]

0x180 - Transmit FIFO Buffer