Module xmc1000::usic0_ch0 [−][src]
Universal Serial Interface Controller 0
Modules
brg |
Baud Rate Generator Register |
byp |
Bypass Data Register |
bypcr |
Bypass Control Register |
ccfg |
Channel Configuration Register |
ccr |
Channel Control Register |
cmtr |
Capture Mode Timer Register |
dx0cr |
Input Control Register 0 |
dx1cr |
Input Control Register 1 |
dx2cr |
Input Control Register 2 |
dx3cr |
Input Control Register 3 |
dx4cr |
Input Control Register 4 |
dx5cr |
Input Control Register 5 |
fdr |
Fractional Divider Register |
fmr |
Flag Modification Register |
in_ |
Transmit FIFO Buffer |
inpr |
Interrupt Node Pointer Register |
kscfg |
Kernel State Configuration Register |
outdr |
Receiver Buffer Output Register L for Debugger |
outr |
Receiver Buffer Output Register |
pcr |
Protocol Control Register |
pcr_ascmode |
Protocol Control Register [ASC Mode] |
pcr_iicmode |
Protocol Control Register [IIC Mode] |
pcr_iismode |
Protocol Control Register [IIS Mode] |
pcr_sscmode |
Protocol Control Register [SSC Mode] |
pscr |
Protocol Status Clear Register |
psr |
Protocol Status Register |
psr_ascmode |
Protocol Status Register [ASC Mode] |
psr_iicmode |
Protocol Status Register [IIC Mode] |
psr_iismode |
Protocol Status Register [IIS Mode] |
psr_sscmode |
Protocol Status Register [SSC Mode] |
rbctr |
Receiver Buffer Control Register |
rbuf |
Receiver Buffer Register |
rbuf0 |
Receiver Buffer Register 0 |
rbuf1 |
Receiver Buffer Register 1 |
rbuf01sr |
Receiver Buffer 01 Status Register |
rbufd |
Receiver Buffer Register for Debugger |
rbufsr |
Receiver Buffer Status Register |
sctr |
Shift Control Register |
tbctr |
Transmitter Buffer Control Register |
tbuf |
Transmit Buffer |
tcsr |
Transmit Control/Status Register |
trbptr |
Transmit/Receive Buffer Pointer Register |
trbscr |
Transmit/Receive Buffer Status Clear Register |
trbsr |
Transmit/Receive Buffer Status Register |
Structs
BRG |
Baud Rate Generator Register |
BYP |
Bypass Data Register |
BYPCR |
Bypass Control Register |
CCFG |
Channel Configuration Register |
CCR |
Channel Control Register |
CMTR |
Capture Mode Timer Register |
DX0CR |
Input Control Register 0 |
DX1CR |
Input Control Register 1 |
DX2CR |
Input Control Register 2 |
DX3CR |
Input Control Register 3 |
DX4CR |
Input Control Register 4 |
DX5CR |
Input Control Register 5 |
FDR |
Fractional Divider Register |
FMR |
Flag Modification Register |
IN |
Transmit FIFO Buffer |
INPR |
Interrupt Node Pointer Register |
KSCFG |
Kernel State Configuration Register |
OUTDR |
Receiver Buffer Output Register L for Debugger |
OUTR |
Receiver Buffer Output Register |
PCR |
Protocol Control Register |
PCR_ASCMODE |
Protocol Control Register [ASC Mode] |
PCR_IICMODE |
Protocol Control Register [IIC Mode] |
PCR_IISMODE |
Protocol Control Register [IIS Mode] |
PCR_SSCMODE |
Protocol Control Register [SSC Mode] |
PSCR |
Protocol Status Clear Register |
PSR |
Protocol Status Register |
PSR_ASCMODE |
Protocol Status Register [ASC Mode] |
PSR_IICMODE |
Protocol Status Register [IIC Mode] |
PSR_IISMODE |
Protocol Status Register [IIS Mode] |
PSR_SSCMODE |
Protocol Status Register [SSC Mode] |
RBCTR |
Receiver Buffer Control Register |
RBUF |
Receiver Buffer Register |
RBUF0 |
Receiver Buffer Register 0 |
RBUF1 |
Receiver Buffer Register 1 |
RBUF01SR |
Receiver Buffer 01 Status Register |
RBUFD |
Receiver Buffer Register for Debugger |
RBUFSR |
Receiver Buffer Status Register |
RegisterBlock |
Register block |
SCTR |
Shift Control Register |
TBCTR |
Transmitter Buffer Control Register |
TBUF |
Transmit Buffer |
TCSR |
Transmit Control/Status Register |
TRBPTR |
Transmit/Receive Buffer Pointer Register |
TRBSCR |
Transmit/Receive Buffer Status Clear Register |
TRBSR |
Transmit/Receive Buffer Status Register |