Struct Simd256Integer

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pub struct Simd256Integer<S: Simd256Scalar, const LANES: usize> {
    pub inner: Simd256IntegerInner,
    /* private fields */
}

Expand description

This type packs integer data into a 256 bit value and attempts to use AVX family instructions if available for all operations.

If AVX is not determined to be available, this struct has a fallback implementation that will be slower, but still mathematically correct, and may attempt to use SSE family instructions if possible.

Fields§

§inner: Simd256IntegerInner

Underlying bit storage.

Implementations§

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impl<S: Simd256Scalar, const LANES: usize> Simd256Integer<S, LANES>

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pub fn from_array(array: [S; LANES]) -> Self

Construct a Simd256Integer value from an array of scalar values.

This function will eventually be made const after https://github.com/rust-lang/rust/issues/80384 is resolved (it can’t currently since the compiler can’t/doesn’t prove that S cannot contain an unsafe cell).

Note that this function will fail at compile time if you attempt to construct a Simd256Integer with a number of LANES inconsistent with the size of the scalar type S. See below:

use x86_simd::integers::int256::Simd256Integer;
let splat = Simd256Integer::from_array([0; 50]);

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pub fn splat(s: S) -> Self

“splat” a given scalar across all lanes of this SIMD value.

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pub fn try_from_iter(iter: &mut impl Iterator<Item = S>) -> Option<Self>

Take LANES items from an Iterator into the lanes of a Simd256Integer.

If the Iterator::next ever returns None, immediately stop and return None (this means that the iterator will be partially consumed if the end of it is reached before a SIMD vector can be filled).

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pub const fn to_array(self) -> [S; LANES]

Turn this Simd256Integer into an array of its lanes.

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pub fn as_array_ref(&self) -> &[S; LANES]

Get a reference to the underlying data of this SIMD value as an array.

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pub const fn from_intrinsic(intrinsic: __m256i) -> Self

Wrap a given intrinsic value with this type.

To retrieve the intrinsic underlying this value (the reverse of this operation), use Simd256Integer::inner and Simd256IntegerInner::avx:

use x86_simd::integers::int256::{Simd256Integer, Simd256IntegerInner, u64x4};
 
let simd_value = u64x4::splat(0);
 
if std::is_x86_feature_detected!("avx2") {
    // SAFETY: We have confirmed that this field of the inner union is active by checking that the 
    // AVX2 CPU feature is available.
    let intrinsic = unsafe { simd_value.inner.avx };
}

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pub fn element_type_is<T: Simd256Scalar>() -> bool

Check if the element type of this Simd256Integer (S) matches the given type T using core::any::TypeId.

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pub unsafe fn avx2_vertical_add(a: Self, b: Self) -> Self

Available on (crate feature std or target feature avx2) and target feature avx2 only.

“vertically” Add two SIMD values to eachother using AVX2 instructions.

“vertical” means each lane of the resulting SIMD value contains the sum of the coresponding lanes of a and b.

§Safety

The caller must ensure that AVX2 CPU features are supported, otherwise calling this function will execute unsupoorted instructions (which is immediate undefined behaviour).

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pub unsafe fn avx2_vertical_saturating_add(a: Self, b: Self) -> Self
where S: Simd256SaturatingAdd,

Available on (crate feature std or target feature avx2) and target feature avx2 only.

Saturating vertical SIMD add using AVX2 instructions. Saturated adds are generally slower than Self::avx2_vertical_add so use only when needed if you care about performance (if you don’t care about performance then why are you using this SIMD library anyway).

§Safety

The caller must ensure that AVX2 CPU features are supported, otherwise calling this function will execute unsupoorted instructions (which is immediate undefined behaviour).

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pub fn saturating_add(a: Self, b: Self) -> Self
where S: Simd256SaturatingAdd,

Saturating add on two SIMD vectors backed by AVX2 operations or using fallback iterative/scalar instructions.

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pub unsafe fn avx2_vertical_cmp_eq(a: Self, b: Self) -> Self

Available on (crate feature std or target feature avx2) and target feature avx2 only.

Compare two SIMD vectors for equality of elements vertically. Lanes of the result are defined as so: If the elements of the coresponding lane of each of the input vectors are equal, then the output vector will have all 1 bits in that lane (e.g. an 0xFF value in the lane for u8x32 or i8x32). If not equal, then all 0 bits.

§Safety

The caller must ensure that AVX2 CPU features are supported, otherwise calling this function will execute unsupoorted instructions (which is immediate undefined behaviour).

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pub fn vertical_cmp_eq(a: Self, b: Self) -> Self

Compare the elements/lanes of two SIMD vectors for equality, setting each lane of the returned SIMD vector to all 1 bits if the coresponding elements of the input vectors are equal, and all 0 bits otherwise.

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pub unsafe fn avx2_vertical_abs(self) -> Self
where S: Simd256IntegerAbs,

Available on (crate feature std or target feature avx2) and target feature avx2 only.

Get the absolute value of each lane of this SIMD vector using AVX2 absolute value intrinsics.

§Safety

The caller must ensure that AVX2 CPU features are supported, otherwise calling this function will execute unsupoorted instructions (which is immediate undefined behaviour).

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pub fn abs(self) -> Self
where S: Simd256IntegerAbs,

Return a SIMD vector containing the absolute value of all of the elements of this SIMD vector.

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pub unsafe fn avx_load(ptr: *const __m256i) -> Self

Available on (crate feature std or target feature avx) and target feature avx only.

Load a SIMD Vector from the given pointer using AVX intrinsics.

§Safety

The caller must ensure that AVX CPU features are supported, otherwise calling this function will execute unsupoorted instructions (which is immediate undefined behaviour).

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