Struct InterruptDescriptorTable

#[repr(C, align(16))]
pub struct InterruptDescriptorTable {

    pub divide_by_zero_exception: Gate<InterruptUniversalFn>,
    pub debug_exception: Gate<InterruptUniversalFn>,
    pub non_maskable_interrupt_exeption: Gate<InterruptUniversalFn>,
    pub breakpoint_exception: Gate<InterruptUniversalFn>,
    pub overflow_exception: Gate<InterruptUniversalFn>,
    pub bound_range_exception: Gate<InterruptUniversalFn>,
    pub invalid_opcode_exception: Gate<InterruptUniversalFn>,
    pub device_not_available_exception: Gate<InterruptUniversalFn>,
    pub double_fault_exception: Gate<InterruptNoReturnWithErrorCodeFn>,
    pub coprocessor_segment_overrun_exception: Gate<InterruptUniversalFn>,
    pub invalid_tss_exception: Gate<InterruptWithErrorCodeFn>,
    pub segment_not_present_exception: Gate<InterruptWithErrorCodeFn>,
    pub stack_exception: Gate<InterruptNoReturnWithErrorCodeFn>,
    pub general_protection_exception: Gate<InterruptWithErrorCodeFn>,
    pub page_fault_exception: Gate<InterruptUniversalFn>,
    pub x87_floating_point_exception: Gate<InterruptUniversalFn>,
    pub alignment_check_exception: Gate<InterruptWithErrorCodeFn>,
    pub machine_check_exception: Gate<InterruptUniversalNoReturnFn>,
    pub simd_floating_point_exception: Gate<InterruptUniversalFn>,
    pub control_protection_exception: Gate<InterruptWithErrorCodeFn>,
    pub hypervisor_injection_exception: Gate<InterruptUniversalFn>,
    pub vmm_communication_exception: Gate<InterruptWithErrorCodeFn>,
    pub security_exception: Gate<InterruptUniversalFn>,
    pub other_interupts: [Gate<InterruptUniversalFn>; 224],
    /* private fields */
}

IDT table.

Before you implement the IDT, make sure you have a working GDT. Your bootloader may have set one up, check with it’s documentation. Limine does :)

If you don’t wish to look at the CPU developer documentation, but need to know a x86_64 interrupt, see the RESERVED_INTERRUPT_INFO_* family of constants for more information.

You can install this table with the crate::instructions::Instruction::perform() function.

See page 20/82 & 247/309: https://www.amd.com/system/files/TechDocs/24593.pdf

Fields

divide_by_zero_exception: Gate<InterruptUniversalFn>

Divide-by-Zero-Error (Vector 0)

Cause

DIV, IDIV, and AAM instructions.

debug_exception: Gate<InterruptUniversalFn>

Debug (Vector 1)

Cause

Instruction accesses and data accesses.

non_maskable_interrupt_exeption: Gate<InterruptUniversalFn>

Non-Naskable-Interrupt (Vector 2)

Cause

External NMI signal.

breakpoint_exception: Gate<InterruptUniversalFn>

Breakpoint (Vector 3)

Cause

INT3 instruciton.

overflow_exception: Gate<InterruptUniversalFn>

Overflow (Vector 4)

Cause

INTO instruction.

bound_range_exception: Gate<InterruptUniversalFn>

Bound-Range (Vector 5)

Cause

BOUND instruction.

invalid_opcode_exception: Gate<InterruptUniversalFn>

Invalid-Opcode (Vector 6)

Cause

An invalid opcode.

device_not_available_exception: Gate<InterruptUniversalFn>

Device-Not-Available (Vector 7)

Cause

The x87 floating point coprocessor is not available.

double_fault_exception: Gate<InterruptNoReturnWithErrorCodeFn>

Double-Fault (Vector 8)

Cause

Exception during the handling of another exception or interrupt.

coprocessor_segment_overrun_exception: Gate<InterruptUniversalFn>

(Intel Only) Coprocessor-Segment-Overrun (Vector 9)

Cause

An Intel 387 math coprocessor detected a page or segment violation while transferring the middle portion of an i387 math coprocessor operand. The P6 family, Pentium, and i486 processors do not generate this exception; instead, this condition is detected with a general protection exception.

invalid_tss_exception: Gate<InterruptWithErrorCodeFn>

Invalid-TSS (Vector 10)

Cause

Task-state segment access and task switch.

segment_not_present_exception: Gate<InterruptWithErrorCodeFn>

Segment-Not-Present (Vector 11)

Cause

Segment register loads.

stack_exception: Gate<InterruptNoReturnWithErrorCodeFn>

Stack (Vector 12)

Cause

SS register loads and stack references.

general_protection_exception: Gate<InterruptWithErrorCodeFn>

General-Protection (Vector 13)

Cause

Memory accesses and protection checks.

page_fault_exception: Gate<InterruptUniversalFn>

Page-Fault (Vector 14)

Cause

Memory accesses when paging enabled.

x87_floating_point_exception: Gate<InterruptUniversalFn>

x87 Floating-Point Exception-Pending (Vector 16)

Cause

x87 floating-point instructions.

alignment_check_exception: Gate<InterruptWithErrorCodeFn>

Alignment-Check (Vector 17)

Cause

Misaligned memory accesses.

machine_check_exception: Gate<InterruptUniversalNoReturnFn>

Machine-Check (Vector 18)

Cause

Occurs when a problem involving the computer’s hardware is detected. With most mass-market personal computers, an MCE indicates faulty or misconfigured hardware.

simd_floating_point_exception: Gate<InterruptUniversalFn>

SIMD Floating-Point (Vector 19)

Cause

SSE floating-point instructions.

control_protection_exception: Gate<InterruptWithErrorCodeFn>

Control-Protection Exception (Vector 21)

Cause

RET/IRET or other control transfer

hypervisor_injection_exception: Gate<InterruptUniversalFn>

Hypervisor Injection Exception (Vector 28)

Cause

Event injection.

vmm_communication_exception: Gate<InterruptWithErrorCodeFn>

VMM Communication Exception (Vector 29)

Cause

Virtualization event.

security_exception: Gate<InterruptUniversalFn>

Security Exception (Vector 30)

Cause

Security-sensitive event in host

other_interupts: [Gate<InterruptUniversalFn>; 224]

You can define these!

They can originate from either maskable external interrupts or from software running on the system. According to the x86_64 crate,

• System logic signals an external interrupt request to the processor. The signaling mechanism and the method of communicating the interrupt vector to the processor are implementation dependent.
• Software executes an INTn instruction. The INTn instruction operand provides the interrupt vector number.

The instruction pointer is not always the same, as it depends on the where the interrupt comes from. Again, according to the x86_64 crate,

• External interrupts are recognized on instruction boundaries. The saved instruction pointer points to the instruction immediately following the boundary where the external interrupt was recognized.
• If the interrupt occurs as a result of executing the INTn instruction, the saved instruction pointer points to the instruction after the INTn.

Implementations

impl InterruptDescriptorTable

pub fn new_empty() -> Self

Creates an empty Interrupt Descriptor Table.

All of the callbacks are point to NULL (0x0) via the Gate::new_missing() function.

pub fn install(&self)

Install the interupt descriptor table via the LIDT instruction.

Trait Implementations

impl Debug for InterruptDescriptorTable

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.