Module clock 

Clock definitions for WS63.

The WS63 uses a CLDO_CRG (Clock and Reset Generator) for peripheral clock gating. Clocks default to enabled out of reset, so the drivers do not gate them; this module keeps the Peripheral enum and its CKEN bit map (Peripheral::cken_info) as a peripheral → clock-gate reference, used by safety.rs’s drift checks and available to future clock-gating code.

CKEN-bit provenance (audited against fbb_ws63 porting + the WS63 SVD):

• SDK/SVD-confirmed: PWM CKEN_CTL0 bits [10:2] (base 2; pwm_porting.c), I2S CKEN_CTL0 bit 11 (bus) + bit 12 (clk) (sio_porting.c), UART0/1/2 CKEN_CTL1 bits 18/19/20 (clock_init.c + SVD uart_cken[20:18]), SPI CKEN_CTL1 bit 25 (spi_porting.c + SVD spi_cken[25]).
• Not individually gated by the SDK (rely on the reset-default clock; the bit is not attested by the SVD or porting code): I2C, Timer, LSADC, Tsensor, TRNG, Security, DMA, SDMA, SFC, SPI1 — cken_info returns None for these rather than fabricating a bit. WiFi/BT entry gates (CKEN_CTL1 13 / 8–12 / 29) are owned by the radio blobs and are not in this enum.

The earlier ClockControl / PeripheralGuard RAII layer was removed: it had zero consumers (the drivers rely on the reset-default clocks) and was dead scaffolding. Re-introduce a clock-gating API alongside a real consumer if one is needed, deriving the gate bits from Peripheral::cken_info.

Enums

Peripheral

Enumeration of all peripheral clocks.

Constants

PERIPHERAL_COUNT

Number of Peripheral enum variants. Update when adding variants.